Patents by Inventor Ziv Abraham

Ziv Abraham has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Generation of mask-constrained floating-point addition and subtraction test cases, and method and system therefor
    Patent number: 7028067
    Abstract: A method and system for generating numerical test cases for testing binary floating-point arithmetic units for addition and subtraction operations, in order to verify the proper operation of the units according to a specified standard. The space for eligible test-cases is compatible with masks which stipulate the allowable forms of the operands and the result, including constant as well as variable digits in both the exponent and significand fields. The test-cases, which are generated randomly, cover the entire solution space without excluding any eligible solutions. All standard rounding modes are supported, and if a valid solution does not exist for a given set of masks, this fact is reported. The method is general and can be applied to any standard, such as the IEEE floating-point standard, in any precision.
    Type: Grant
    Filed: February 20, 2002
    Date of Patent: April 11, 2006
    Assignee: International Business Machines Corporation
    Inventors: Ziv Abraham, Sigal Asaf, Anatoly Koyfman, Shay Zadok
  • Generation of mask-constrained floating-point addition and substraction test cases, and method and system therefor
    Publication number: 20030200244
    Abstract: A method and system for generating numerical test cases for testing binary floating-point arithmetic units for addition and subtraction operations, in order to verify the proper operation of the units according to a specified standard. The space for eligible test-cases is compatible with masks which stipulate the allowable forms of the operands and the result, including constant as well as variable digits in both the exponent and significand fields. The test-cases, which are generated randomly, cover the entire solution space without excluding any eligible solutions. All standard rounding modes are supported, and if a valid solution does not exist for a given set of masks, this fact is reported. The method is general and can be applied to any standard, such as the IEEE floating-point standard, in any precision.
    Type: Application
    Filed: February 20, 2002
    Publication date: October 23, 2003
    Applicant: International Business Machines Corp.
    Inventors: Ziv Abraham, Sigal Asaf, Anatoly Koyfman, Shay Zadok