Patents by Inventor Ziv Barak

Ziv Barak has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11057001
    Abstract: For example, an apparatus may include a Local Oscillator (LO) generator configured to generate a distributed modulated LO signal by modulating an LO signal based on a reset signal; and a plurality of Physical Layer (PHY) chains to receive the distributed modulated LO signal, which is distributed to the plurality of PHY chains by the LO generator, a PHY chain of the plurality of PHY chains including a reset detector configured to detect the reset signal based on the distributed modulated LO signal, and, based on a detection of the reset signal, to reset one or more Radio Frequency (RF) elements of the PHY chain.
    Type: Grant
    Filed: June 14, 2020
    Date of Patent: July 6, 2021
    Assignee: INTEL CORPORATION
    Inventors: Oren Shalita, Maor Saig, Ziv Barak, Hila Hazenshprung
  • Publication number: 20200313620
    Abstract: For example, an apparatus may include a Local Oscillator (LO) generator configured to generate a distributed modulated LO signal by modulating an LO signal based on a reset signal; and a plurality of Physical Layer (PHY) chains to receive the distributed modulated LO signal, which is distributed to the plurality of PHY chains by the LO generator, a PHY chain of the plurality of PHY chains including a reset detector configured to detect the reset signal based on the distributed modulated LO signal, and, based on a detection of the reset signal, to reset one or more Radio Frequency (RF) elements of the PHY chain.
    Type: Application
    Filed: June 14, 2020
    Publication date: October 1, 2020
    Applicant: INTEL CORPORATION
    Inventors: Oren Shalita, Maor Saig, Ziv Barak, Hila Hazenshprung
  • Patent number: 8416814
    Abstract: An improved system and method for achieving high precision clock recovery, i.e. reconstruction of the clock signal having the same frequency, over a packet switched network. The proposed method utilizes a minimum network delay approach, which overcomes the problems caused by delay variation of the network and filters out network jitter, such as noise jitter and other “singular” anomalies causing latency deviations. Minimum network delay is defined herein as the time delay in which a packet remains in the network under assumption that all transmission queues through which the packet passes are empty. The proposed system and method perform clock recovery by including an improvement in the form of dynamically varying thresholds. Reconstruction of the clock signal is performed in accordance with the minimum network delay estimation based on an adjustable threshold, i.e., the latency change threshold, which increases when the noise threshold increases and decreases when the noise threshold decreases.
    Type: Grant
    Filed: February 15, 2010
    Date of Patent: April 9, 2013
    Assignee: Axerra Networks, Ltd.
    Inventors: Alon Shtern, Alex Tal, Guy Kronenthal, Raz Korn, Ziv Barak, Osnat Shasha
  • Patent number: 8018968
    Abstract: An innovative system and method for achieving high precision clock recovery, i.e. reconstruction of the clock signal having the same frequency, over a packet switched network. The proposed method utilizes a minimum network delay approach, which overcomes the problems caused by delay variation of the network and filters out network jitter, such as noise jitter and other “singular” anomalies causing latency deviations. Minimum network delay is defined herein as the time delay in which a packet remains in the network under assumption that all transmission queues through which the packet passes are empty.
    Type: Grant
    Filed: December 30, 2009
    Date of Patent: September 13, 2011
    Assignee: Axerra Networks, Inc.
    Inventors: Israel Sasson, Alik Shimelmits, Alon Stern, Yoram Henik, Ziv Barak
  • Publication number: 20110044357
    Abstract: An improved system and method for achieving high precision clock recovery, i.e. reconstruction of the clock signal having the same frequency, over a packet switched network. The proposed method utilizes a minimum network delay approach, which overcomes the problems caused by delay variation of the network and filters out network jitter, such as noise jitter and other “singular” anomalies causing latency deviations. Minimum network delay is defined herein as the time delay in which a packet remains in the network under assumption that all transmission queues through which the packet passes are empty. The proposed system and method perform clock recovery by including an improvement in the form of dynamically varying thresholds. Reconstruction of the clock signal is performed in accordance with the minimum network delay estimation based on an adjustable threshold, i.e., the latency change threshold, which increases when the noise threshold increases and decreases when the noise threshold decreases.
    Type: Application
    Filed: February 15, 2010
    Publication date: February 24, 2011
    Inventors: Alon SHTERN, Alex Tal, Guy Kronenthal, Raz Korn, Ziv Barak, Osnat Shasha
  • Publication number: 20100135328
    Abstract: An innovative system and method for achieving high precision clock recovery, i.e. reconstruction of the clock signal having the same frequency, over a packet switched network. The proposed method utilizes a minimum network delay approach, which overcomes the problems caused by delay variation of the network and filters out network jitter, such as noise jitter and other “singular” anomalies causing latency deviations. Minimum network delay is defined herein as the time delay in which a packet remains in the network under assumption that all transmission queues through which the packet passes are empty.
    Type: Application
    Filed: December 30, 2009
    Publication date: June 3, 2010
    Inventors: ISRAEL SASSON, Alik Shimelmits, Alon Stern, Yoram Henik, Ziv Barak
  • Patent number: 7664118
    Abstract: An innovative system and method for achieving high precision clock recovery, i.e. reconstruction of the clock signal having the same frequency, over a packet switched network. The proposed method utilizes a minimum network delay approach, which overcomes the problems caused by delay variation of the network and filters out network jitter, such as noise jitter and other “singular” anomalies causing latency deviations. Minimum network delay is defined herein as the time delay in which a packet remains in the network under assumption that all transmission queues through which the packet passes are empty.
    Type: Grant
    Filed: June 28, 2005
    Date of Patent: February 16, 2010
    Assignee: Axerra Networks, Inc.
    Inventors: Israel Sasson, Alik Shimelmits, Alon Stern, Yoram Henik, Ziv Barak
  • Publication number: 20060291479
    Abstract: An innovative system and method for achieving high precision clock recovery, i.e. reconstruction of the clock signal having the same frequency, over a packet switched network. The proposed method utilizes a minimum network delay approach, which overcomes the problems caused by delay variation of the network and filters out network jitter, such as noise jitter and other “singular” anomalies causing latency deviations. Minimum network delay is defined herein as the time delay in which a packet remains in the network under assumption that all transmission queues through which the packet passes are empty.
    Type: Application
    Filed: June 28, 2005
    Publication date: December 28, 2006
    Inventors: Israel Sasson, Alik Shimelmits, Alon Stern, Yoram Henik, Ziv Barak