Patents by Inventor Ziv Kfir
Ziv Kfir has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11277346Abstract: A method and apparatus for offloading packet classification processing of an access point in a residential gateway. A residential gateway includes a wireless access point and a processing circuit. The processing circuit receives a data packet from a network via a network port, processes the data packet to obtain packet classification information for the data packet, and sends the data packet with the packet classification information to the access point. The access point may process the data packet based on the packet classification information received from the processing circuit. The packet classification information includes at least one of a basic service set identifier, a station identifier, and an access category. The processing circuit may include a packet accelerator. The packet accelerator may write a cookie including the packet classification information in a packet descriptor for the data packet.Type: GrantFiled: December 23, 2019Date of Patent: March 15, 2022Assignee: Intel CorporationInventors: Ziv Kfir, Barak Hermesh
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Patent number: 11172054Abstract: This disclosure relates to offloading processing intensive tasks in communication protocol specific operations off the device, e.g. to another network node connected to the device via a network. Such tasks may for example include flow control, segmentation/desegmentation, and/or error control. As part of error control, protocols of the transport protocol layer of the OSI protocol stack may include checksum calculation to ensure reliability of the (payload) data. The calculation of checksums may be processing intensive. For this reason, example client nodes that realize the offloading of processing intensive tasks in communication protocol specific operations to another network node may not utilize any transport layer protocol at all, but rely on flow control and error control implemented in most modern data link layer protocols (Layer 2 of the OSI protocol stack). Accordingly, the processing intensive tasks can be “shifted” from the client device to another device.Type: GrantFiled: January 3, 2017Date of Patent: November 9, 2021Assignee: MaxLinear, Inc.Inventors: Barak Hermesh, Avi Priev, Ziv Kfir, Artur Zaks
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Publication number: 20210099770Abstract: Example methods, apparatus, systems and articles of manufacture (e.g., physical storage media) to control digital video bandwidth utilization with a virtualized communication hub are disclosed. Example methods disclosed herein include monitoring, with a virtual access function of the virtualized communication hub, an aggregate load on a broadband access medium to detect bandwidth utilization events. Disclosed example methods also include sending, from the virtual access function, a first notification message to a virtual set-top box of the virtualized communication hub in response to detecting a first bandwidth utilization event. Disclosed example methods further include adjusting, at the virtual set-top box and based on the first notification message, an output bandwidth for streaming digital media from the virtual set-top box to a physical set-top box via a broadband access medium.Type: ApplicationFiled: May 8, 2020Publication date: April 1, 2021Inventors: Barak Hermesh, Ziv Kfir
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Patent number: 10856167Abstract: This disclosure describes systems, methods, and devices related to enhanced multiple access point (AP) coordination. A device may determine a first access point (AP) is an associated AP of a station device (STA). The device may identify a null data packet announce (NDPA) frame received from the first AP. The device may determine a propagation delay between the first AP and the device based on the NDPA frame. The device may identify a multi-AP trigger frame received from the first AP at a first time. The device may cause a data packet to be sent to the STA at a second time, wherein the second time is based on the propagation delay.Type: GrantFiled: December 26, 2018Date of Patent: December 1, 2020Assignee: Intel CorporationInventors: Jing Zhu, Juan Fang, Laurent Cariou, Dave Cavalcanti, Feng Jiang, Ziv Kfir
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Publication number: 20200195565Abstract: A method and apparatus for offloading packet classification processing of an access point in a residential gateway. A residential gateway includes a wireless access point and a processing circuit. The processing circuit receives a data packet from a network via a network port, processes the data packet to obtain packet classification information for the data packet, and sends the data packet with the packet classification information to the access point. The access point may process the data packet based on the packet classification information received from the processing circuit. The packet classification information includes at least one of a basic service set identifier, a station identifier, and an access category. The processing circuit may include a packet accelerator. The packet accelerator may write a cookie including the packet classification information in a packet descriptor for the data packet.Type: ApplicationFiled: December 23, 2019Publication date: June 18, 2020Inventors: Ziv Kfir, Barak Hermesh
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Patent number: 10652627Abstract: Example methods, apparatus, systems and articles of manufacture (e.g., physical storage media) to control digital video bandwidth utilization with a virtualized communication hub are disclosed. Example methods disclosed herein include monitoring, with a virtual access function of the virtualized communication hub, an aggregate load on a broadband access medium to detect bandwidth utilization events. Disclosed example methods also include sending, from the virtual access function, a first notification message to a virtual set-top box of the virtualized communication hub in response to detecting a first bandwidth utilization event. Disclosed example methods further include adjusting, at the virtual set-top box and based on the first notification message, an output bandwidth for streaming digital media from the virtual set-top box to a physical set-top box via a broadband access medium.Type: GrantFiled: March 31, 2017Date of Patent: May 12, 2020Assignee: Intel CorporationInventors: Barak Hermesh, Ziv Kfir
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Publication number: 20200068048Abstract: This disclosure relates to offloading processing intensive tasks in communication protocol specific operations off the device, e.g. to another network node connected to the device via a network. Such tasks may for example include flow control, segmentation/desegmentation, and/or error control. As part of error control, protocols of the transport protocol layer of the OSI protocol stack may include checksum calculation to ensure reliability of the (payload) data. The calculation of checksums may be processing intensive. For this reason, example client nodes that realize the offloading of processing intensive tasks in communication protocol specific operations to another network node may not utilize any transport layer protocol at all, but rely on flow control and error control implemented in most modern data link layer protocols (Layer 2 of the OSI protocol stack). Accordingly, the processing intensive tasks can be “shifted” from the client device to another device.Type: ApplicationFiled: January 3, 2017Publication date: February 27, 2020Inventors: Barak Hermesh, Avi Priev, Ziv Kfir, Artur Zaks
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Patent number: 10552343Abstract: Various systems and methods for queue management in computer memory are described herein. A system for implementing a zero thrash cache queue manager includes a processor subsystem to: receive a memory access request for a queue; write data to a queue tail cache line in a cache when the memory access request is to add data to the queue, the queue tail cache line protected from being evicted from the cache; and read data from a current queue head cache line in the cache when the memory access request is to remove data from the queue, the current queue head cache line protected from being evicted from the cache.Type: GrantFiled: November 29, 2017Date of Patent: February 4, 2020Assignee: Intel CorporationInventors: Barak Hermesh, Ziv Kfir, Amos Klimker, Doron Nakar, Lior Nevo
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Patent number: 10530698Abstract: A method and apparatus for offloading packet classification processing of an access point in a residential gateway. A residential gateway includes a wireless access point and a processing circuit. The processing circuit receives a data packet from a network via a network port, processes the data packet to obtain packet classification information for the data packet, and sends the data packet with the packet classification information to the access point. The access point may process the data packet based on the packet classification information received from the processing circuit. The packet classification information includes at least one of a basic service set identifier, a station identifier, and an access category. The processing circuit may include a packet accelerator. The packet accelerator may write a cookie including the packet classification information in a packet descriptor for the data packet.Type: GrantFiled: May 23, 2018Date of Patent: January 7, 2020Assignee: Intel CorporationInventors: Ziv Kfir, Barak Hermesh
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Publication number: 20190182532Abstract: The disclosure generally relates to a method and system for fast channel scan for DOCSIS cable modems. The disclosed exemplary embodiments are directed to hybrid fiber coaxial (HFC) modems and may be equally applied to other type of modems both wired and wireless. The disclosed embodiments enable locating the Physical Link Layer Chanel (PLC) quickly by using a beacon channel at a designated frequency offset from the PLC.Type: ApplicationFiled: November 9, 2018Publication date: June 13, 2019Applicant: Intel CorporationInventors: Bernard Arambepola, Ziv Kfir
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Publication number: 20190132762Abstract: This disclosure describes systems, methods, and devices related to enhanced multiple access point (AP) coordination. A device may determine a first access point (AP) is an associated AP of a station device (STA). The device may identify a null data packet announce (NDPA) frame received from the first AP. The device may determine a propagation delay between the first AP and the device based on the NDPA frame. The device may identify a multi-AP trigger frame received from the first AP at a first time. The device may cause a data packet to be sent to the STA at a second time, wherein the second time is based on the propagation delay.Type: ApplicationFiled: December 26, 2018Publication date: May 2, 2019Inventors: Jing Zhu, Juan Fang, Laurent Cariou, Dave Cavalcanti, Feng Jiang, Ziv Kfir
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Publication number: 20190044868Abstract: A method and apparatus for offloading packet classification processing of an access point in a residential gateway. A residential gateway includes a wireless access point and a processing circuit. The processing circuit receives a data packet from a network via a network port, processes the data packet to obtain packet classification information for the data packet, and sends the data packet with the packet classification information to the access point. The access point may process the data packet based on the packet classification information received from the processing circuit. The packet classification information includes at least one of a basic service set identifier, a station identifier, and an access category. The processing circuit may include a packet accelerator. The packet accelerator may write a cookie including the packet classification information in a packet descriptor for the data packet.Type: ApplicationFiled: May 23, 2018Publication date: February 7, 2019Inventors: Ziv Kfir, Barak Hermesh
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Publication number: 20190034351Abstract: Various systems and methods for queue management in computer memory are described herein. A system for implementing a zero thrash cache queue manager includes a processor subsystem to: receive a memory access request for a queue; write data to a queue tail cache line in a cache when the memory access request is to add data to the queue, the queue tail cache line protected from being evicted from the cache; and read data from a current queue head cache line in the cache when the memory access request is to remove data from the queue, the current queue head cache line protected from being evicted from the cache.Type: ApplicationFiled: November 29, 2017Publication date: January 31, 2019Inventors: Barak Hermesh, Ziv Kfir, Amos Klimker, Doron Nakar, Lior Nevo
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Publication number: 20180288493Abstract: Example methods, apparatus, systems and articles of manufacture (e.g., physical storage media) to control digital video bandwidth utilization with a virtualized communication hub are disclosed. Example methods disclosed herein include monitoring, with a virtual access function of the virtualized communication hub, an aggregate load on a broadband access medium to detect bandwidth utilization events. Disclosed example methods also include sending, from the virtual access function, a first notification message to a virtual set-top box of the virtualized communication hub in response to detecting a first bandwidth utilization event. Disclosed example methods further include adjusting, at the virtual set-top box and based on the first notification message, an output bandwidth for streaming digital media from the virtual set-top box to a physical set-top box via a broadband access medium.Type: ApplicationFiled: March 31, 2017Publication date: October 4, 2018Inventors: Barak Hermesh, Ziv Kfir
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Patent number: 9548937Abstract: Techniques are disclosed for controlling data transmission in multi-stream digital systems. The techniques disclosed allow an input stream to a conditional access system to be throttled when a FIFO begins to fill up. Each data stream may have its own FIFO, which sends data to a MUX and exports its status to a backpressure rate control module. Multiple seconds worth of data may be stored in a BPRC buffer ahead of the backpressure rate control module prior to being transmitted to a MUX FIFO buffer. The backpressure rate control module may use the cached data to fill available spaces within a MUX FIFO buffer. The determination to forward a data packet may be based on the individual MUX FIFO buffer levels, the sum of all the MUX FIFO buffer levels, and/or one or more configurable threshold values. In some embodiments, individual thresholds may be assigned to each FIFO buffer.Type: GrantFiled: December 23, 2013Date of Patent: January 17, 2017Assignee: INTEL CorporationInventors: Keith Hazelet, Ziv Kfir, Christopher Thornburg, Barak Hermesh
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Publication number: 20160205430Abstract: The disclosure generally relates to a method and system for fast channel scan for DOCSIS cable modems. The disclosed exemplary embodiments are directed to hybrid fiber coaxial (HFC) modems and may be equally applied to other type of modems both wired and wireless. The disclosed embodiments enable locating the Physical Link Layer Channel (PLC) quickly by using a beacon channel at a designated frequency offset from the PLC.Type: ApplicationFiled: January 8, 2015Publication date: July 14, 2016Applicant: Intel CorporationInventors: Bernard Arambepola, Ziv Kfir
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Patent number: 9268948Abstract: Efficient architecture for a secure access enforcement proxy is described. The proxy interfaces with multiple subsystems and multiple shared resources. The proxy identifies an original transaction command being sent from one of the subsystems to one of the shared resources, identifies a policy corresponding to the subsystem, performs an action pertaining to the original transaction command based on the policy, and sends a response to the subsystem based on the action.Type: GrantFiled: June 24, 2013Date of Patent: February 23, 2016Assignee: Intel CorporationInventors: Adrian Pearson, Christopher Thornburg, Raymond Ng, Christopher Ruesga, Steve Brown, Dmitrii Loukianov, Ziv Kfir, Barak Hermesh
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Publication number: 20150180787Abstract: Techniques are disclosed for controlling data transmission in multi-stream digital systems. The techniques disclosed allow an input stream to a conditional access system to be throttled when a FIFO begins to fill up. Each data stream may have its own FIFO, which sends data to a MUX and exports its status to a backpressure rate control module. Multiple seconds worth of data may be stored in a BPRC buffer ahead of the backpressure rate control module prior to being transmitted to a MUX FIFO buffer. The backpressure rate control module may use the cached data to fill available spaces within a MUX FIFO buffer. The determination to forward a data packet may be based on the individual MUX FIFO buffer levels, the sum of all the MUX FIFO buffer levels, and/or one or more configurable threshold values. In some embodiments, individual thresholds may be assigned to each FIFO buffer.Type: ApplicationFiled: December 23, 2013Publication date: June 25, 2015Inventors: Keith Hazelet, Ziv Kfir, Christopher Thornburg, Barak Hermesh
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Publication number: 20140380403Abstract: Efficient architecture for a secure access enforcement proxy is described. The proxy interfaces with multiple subsystems and multiple shared resources. The proxy identifies an original transaction command being sent from one of the subsystems to one of the shared resources, identifies a policy corresponding to the subsystem, performs an action pertaining to the original transaction command based on the policy, and sends a response to the subsystem based on the action.Type: ApplicationFiled: June 24, 2013Publication date: December 25, 2014Inventors: Adrian Pearson, Christopher Thornburg, Raymond Ng, Christopher Ruesga, Steve Brown, Dmitrii Loukianov, Ziv Kfir, Barak Hermesh
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Patent number: 8677435Abstract: A novel apparatus for and method of upstream power control for multiple transmit channels. The invention is particularly useful in environments that include two level amplification, wherein the first level corresponds to each channel separately and the second level corresponds to the joint sum of all the channels. When working with two-level amplification, changing the joint sum amplification is permitted during specific time periods known as “CMTS re-configuration time” in the DOCSIS specification. The mechanism functions to maintain an optimal transmit power operating point of the PGA using self-configuration without any need to receive permission from an exterior control entity such as the cable head-end thus bypassing the prior art requirement of waiting for a global reconfiguration time from the CMTS (i.e. when the specification assures that there is sufficient time to change the PGA gain).Type: GrantFiled: November 26, 2008Date of Patent: March 18, 2014Assignee: Intel CorporationInventors: Ziv Kfir, Efrat Levy, Naor Goldman