Abstract: Doping techniques for fin-like field effect transistors (FinFETs) are disclosed herein. An exemplary method includes forming a fin structure, forming a doped amorphous layer over a portion of the fin structure, and performing a knock-on implantation process to drive a dopant from the doped amorphous layer into the portion of the fin structure, thereby forming a doped feature. The doped amorphous layer includes a non-crystalline form of a material. In some implementations, the knock-on implantation process crystallizes at least a portion of the doped amorphous layer, such that the portion of the doped amorphous layer becomes a part of the fin structure. In some implementations, the doped amorphous layer includes amorphous silicon, and the knock-on implantation process crystallizes a portion of the doped amorphous silicon layer.

Abstract: Embodiments of this application relate to the video coding and compression field, and disclose an encoding method and apparatus, and a decoding method and apparatus, to resolve a problem that an existing split mode cannot satisfy a relatively complex texture requirement. The decoding method specifically includes: parsing a bitstream to determine a basic split mode for a current to-be-decoded picture block and a target derivation mode for a subpicture block of the current to-be-decoded picture block; splitting the current to-be-decoded picture block into N subpicture blocks in the basic split mode, where N is an integer greater than or equal to 2; deriving one derived picture block from at least two adjacent subpicture blocks in the N subpicture blocks in the target derivation mode; and decoding the derived picture block.

Abstract: Disclosed is a method and system for predicting a touch interaction position on a large display based on a binocular camera. The method includes: separately acquiring arm movement video frames of a user and facial and eye movement video frames of the user by a binocular camera; extracting a video clip of each tapping action from the arm movement video frames and the facial and eye movement video frames and obtaining a key frame by screening; marking the key frame of each tapping action with coordinates to indicate coordinates of a finger in a display screen; inputting the marked key frame to an efficient convolutional network for online video understanding (ECO)-Lite neural network for training to obtain a predictive network model; and inputting a video frame of a current operation to be predicted to the predictive network model and outputting a touch interaction position predicted for the current operation.

Abstract: A power semiconductor package comprises a lead frame, a semiconductor chip, and a molding encapsulation. The lead frame comprises an elevated section comprising a source section; a drain section; and a plurality of leads. The semiconductor chip includes a metal-oxide-semiconductor field-effect transistor (MOSFET) disposed over the lead frame. The semiconductor chip comprises a source electrode, a drain electrode, and a gate electrode. The source electrode of the semiconductor chip is electrically and mechanically connected to the source section of the elevated section of the lead frame. The semiconductor chip is served as a low side field-effect transistor as a flipped-chip connected to a heat sink by a first thermal interface material. A high side field-effect transistor is connected to the heat sink by a second thermal interface material. The low side field-effect transistor and the high side field-effect transistor are mounted on a printed circuit board.

Abstract: A power semiconductor package comprises a lead frame, a semiconductor chip, and a molding encapsulation. The lead frame comprises an elevated section comprising a source section; a drain section; and a plurality of leads. The semiconductor chip includes a metal-oxide-semiconductor field-effect transistor (MOSFET) disposed over the lead frame. The semiconductor chip comprises a source electrode, a drain electrode, and a gate electrode. The source electrode of the semiconductor chip is electrically and mechanically connected to the source section of the elevated section of the lead frame. The semiconductor chip is served as a low side field-effect transistor as a flipped-chip connected to a heat sink by a first thermal interface material. A high side field-effect transistor is connected to the heat sink by a second thermal interface material. The low side field-effect transistor and the high side field-effect transistor are mounted on a printed circuit board.

Abstract: A power semiconductor package comprises a lead frame, a semiconductor chip, and a molding encapsulation. The lead frame comprises an elevated section comprising a source section; a drain section; and a plurality of leads. The semiconductor chip includes a metal-oxide-semiconductor field-effect transistor (MOSFET) disposed over the lead frame. The semiconductor chip comprises a source electrode, a drain electrode, and a gate electrode. The source electrode of the semiconductor chip is electrically and mechanically connected to the source section of the elevated section of the lead frame. The semiconductor chip is served as a low side field-effect transistor as a flipped-chip connected to a heat sink by a first thermal interface material. A high side field-effect transistor is connected to the heat sink by a second thermal interface material. The low side field-effect transistor and the high side field-effect transistor are mounted on a printed circuit board.