Abstract: The present application relates to an adjuvant concentrate composition comprising a liquid medium, a drift reduction agent, a non-ionic surfactant and water. The present application further comprise an agricultural concentration composition comprising the same and the preparation method thereof.

Abstract: A programmable device includes a functional module, a pre-allocation manager, a first connection line, and a second connection line, wherein the pre-allocation managers are connected by the first connection lines, and the pre-allocation managers are connected to the functional modules by the second connection lines; the first connection lines are used for data transmission between the pre-allocation mangers, and a transmission direction is determined according to the configuration; the second connection lines are used for data transmission between the pre-allocation managers and the functional modules; the pre-allocation mangers are used for data transmission between the first connection lines and for data transmission between the first connection lines and the functional modules. The first connection lines are configured as connection line segments for transmission in both directions, and a wiring structure is designed in a direction and shape meeting wiring requirements.

Abstract: Herbicidal compositions comprising high load aminophosphate or aminophosphonate salts, in particular high load glyphosate salts, wherein the compositions comprises a surfactant mixture of at least an C6-C22 amine oxide and a tertiary amine surfactants. The compositions have good low temperature stability (i.e., no crystal formulation or phase separation) among other beneficial properties.

Abstract: Provided is a herbicidal composition comprising high load aminophosphate or aminophosphonate salts, in particular high load glyphosate salts, wherein the composition comprises a surfactant mixture of at least an C8-C10 amine oxide and a betaine surfactant. The composition has good low temperature stability (i.e., no crystal formation or phase separation) among other beneficial properties.

Abstract: A programmable device structure based on a mixed function storage unit includes a storage unit SRAM and a mixed function unit, wherein the storage unit comprises n register units and at least one selection control bit, wherein n=2{circumflex over (?)}x, and x is natural number; the register units are selected according to the selection control bit; and when the selection control bit selects the mixed function unit to serve as a lookup table, a logic function is achieved; or when the selection control bit selects the mixed function unit to serve as a multiplexer, a routing function is achieved. By multiplexing the register units, the programmable device structure achieves a routing function of a traditional FPGA and also provides a logic function, and the waste of resources is greatly reduced.

Abstract: The present invention relates to a composition comprising: (A) at least one (thio)phosphoric acid triamide and/or (thio)phosphoric acid diamide; (B) at least one amine compound; and optionally (C) a solvent. Said composition can notably be used in urea-containing fertilizers.

Abstract: An FPGA chip includes one functional unit, one pre-allocation manager, and wiring segments. The functional unit includes a first module CPE and a second module PLF. The pre-allocation manager may be connected by means of one of the wiring segments. By configuring one pre-allocation manager, data transmission directions of the wiring segments may be changed. The functional unit is connected to one pre-allocation manager by means of a conventional line. The first module CPE and the second module PLF which are adjacent in the same functional unit are connected by means of a cross-connection line. The second functional modules are interconnected by means of a conventional routing system. Different functional blocks can be connected to each other from any position of a circuit.

Abstract: A surfactant composition comprising (a) a fatty acid salt; (b) a sulfosuccinate based compound; and (c) an alkyl sulfate is provided. A solid agrochemical composition containing said surfactant composition and the use thereof is also provided.

Abstract: An FPGA chip includes one functional unit, one pre-allocation manager, and wiring segments. The functional unit includes a first module CPE and a second module PLF. The pre-allocation manager may be connected by means of one of the wiring segments. By configuring one pre-allocation manager, data transmission directions of the wiring segments may be changed. The functional unit is connected to one pre-allocation manager by means of a conventional line. The first module CPE and the second module PLF which are adjacent in the same functional unit are connected by means of a cross-connection line. The second functional modules are interconnected by means of a conventional routing system. Different functional blocks can be connected to each other from any position of a circuit.

Abstract: A programmable device includes a functional module, a pre-allocation manager, a first connection line, and a second connection line, wherein the pre-allocation managers are connected by the first connection lines, and the pre-allocation managers are connected to the functional modules by the second connection lines; the first connection lines are used for data transmission between the pre-allocation mangers, and a transmission direction is determined according to the configuration; the second connection lines are used for data transmission between the pre-allocation managers and the functional modules; the pre-allocation mangers are used for data transmission between the first connection lines and for data transmission between the first connection lines and the functional modules. The first connection lines are configured as connection line segments for transmission in both directions, and a wiring structure is designed in a direction and shape meeting wiring requirements.

Abstract: A programmable device structure based on a mixed function storage unit includes a storage unit SRAM and a mixed function unit, wherein the storage unit comprises n registor units and at least one selection control bit, wherein n=2{circumflex over (?)}x, and x is natural number; the registor units are selected according to the selection control bit; and when the selection control bit selects the mixed function unit to serve as a lookup table, a logic function is achieved; or when the selection control bit selects the mixed function unit to serve as a multiplexer, a routing function is achieved. By multiplexing the registor units, the programmable device structure achieves a routing function of a traditional FPGA and also provides a logic function, and the waste of resources is greatly reduced.

Abstract: A surfactant composition comprising (a) a sulfosuccinate based compound; and (b) a C16-C22 alkyl sulfate or an alkyl ether sulfate containing C16-C22 alkyl is provided. A solid agrochemical composition containing said surfactant composition and the use thereof is also provided.

Abstract: Provided is a fertilizer composition comprising: (a) a mineral fertilizer ingredient; (b) a surfactant composition comprising an alkyl polyglucoside, and a second surfactant; and (c) water. The fertilizer composition has very good stability coupled with very good wetting and spreading capacities when diluted.

Abstract: Providing a pesticidal composition which comprises (a) an effective amount of a pesticide; (b) a sulfosuccinate surfactant component; and (c) an additional surfactant.

Abstract: The present invention relates to a composition comprising: (A) at least one (thio)phosphoric acid triamide and/or (thio)phosphoric acid diamide; (B) at least one amine compound; and optionally (C) a solvent. Said composition can notably be used in urea-containing fertilizers.

Abstract: The present invention relates to a chip power supply method and a chip, where configuration memory array provides configuration voltage to an NMOS transmission gate, and an LDO circuit supplies power to the chip. The method includes: determining that a working state of the chip switches from a first state to a second state, where the first state and the second state are separately an initial mode, a program mode or a user mode; and adjusting, according to the working state of the chip, a configuration bit to adjust an output voltage of the LDO circuit. The present invention reduces power dissipation of the chip during memory configuration, and improves working performance thereof during the user mode.

Abstract: The present invention relates to a chip power supply method and a chip, where configuration memory array provides configuration voltage to an NMOS transmission gate, and an LDO circuit supplies power to the chip. The method includes: determining that a working state of the chip switches from a first state to a second state, where the first state and the second state are separately an initial mode, a program mode or a user mode; and adjusting, according to the working state of the chip, a configuration bit to adjust an output voltage of the LDO circuit. The present invention reduces power dissipation of the chip during memory configuration, and improves working performance thereof during the user mode.