Patents by Inventor Zixiang Yang

Zixiang Yang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 12266941
    Abstract: The present invention relates to the technical field of power generation of power systems, in particular to an offshore integrated power supply system based on clean energy. The integrated power supply system comprises a power generation unit for providing energy, an energy storage unit for storing energy, a load unit for consuming energy, an energy management system, and a fuel cell, wherein the power generation unit comprises a photovoltaic power generation system, a wind power generation system, and a tidal power generation system; the energy storage unit comprises hydrogen storage and a battery pack; and the energy management system connects the power generation unit, the load unit, and the energy storage unit, and allocates the surplus energy from the power generation unit to the hydrogen storage and the battery pack after satisfying the load unit.
    Type: Grant
    Filed: May 9, 2024
    Date of Patent: April 1, 2025
    Assignees: Ningbo Electric Power Design Institute Co. Ltd, Ningbo Institute of Materials Technology & Engineering, Chinese Academy of Sciences, Ningbo Yongyao Power Investment Corporation Co., Ltd
    Inventors: Kai Shu, Wanbing Guan, Jun Wu, Xuanjun Chen, Yueping Yang, Yang Zhang, Zixiang Pei, Weitao Wang, Haibo Bi, Tiancheng Fan, Yuting Liu
  • Publication number: 20250096737
    Abstract: A low-noise amplifier (LNA) includes a first transistor, a first source inductor coupled to a source of the first transistor, and a second transistor, wherein a source of the second transistor is coupled to a drain of the first transistor, a gate of the second transistor is coupled to a bias circuit, and a drain of the second transistor is coupled to an output of the LNA. The LNA also includes an output inductor coupled between a supply rail and the output of the LNA, wherein the output inductor is magnetically coupled with the first source inductor.
    Type: Application
    Filed: September 19, 2023
    Publication date: March 20, 2025
    Inventors: Xingyi HUA, Hsiao-Tsung YEN, David Zixiang YANG, Mehmet UZUNKOL
  • Publication number: 20250094901
    Abstract: The present invention provides an electric power material distribution and allocation method based on an optimized branch and bound method, including: sorting the distribution of each batch of electric power materials to obtain a material set R; screening available vehicle data to obtain a vehicle deadweight set W and a vehicle unique identification set C; determining whether available vehicles meet requirements; and using an optimized queued branch and bound method to obtain an optimal distribution and allocation scheme. According to the present invention, scientific scheme support is provided for the distribution and allocation of the electric power materials, the scientificity of the distribution of power grid materials is improved, the influence of human factors is reduced, the utilization rate of distribution vehicles is increased, the distribution cost of the materials is reduced, and the economic benefit is improved.
    Type: Application
    Filed: November 25, 2024
    Publication date: March 20, 2025
    Inventors: Xiao ZHAO, Baokang WANG, Jiayong YANG, Yun ZHANG, Yunjiang YU, Can SUN, Cong ZHU, Honghao DAI, Tianji XU, Zixiang YAN
  • Publication number: 20250096305
    Abstract: Disclosed is a method for preparing lithium-ion batteries including: winding or sheet-stacking a positive electrode sheet, a negative electrode sheet, and a separator, and then placing them into a case to form an initial cell; injecting a first electrolyte into the initial cell, where the first electrolyte includes: 0.5 wt % to 2 wt % vinylene carbonate, 5 wt % to 15 wt % lithium salt, and non-aqueous organic solvent (all by weight); performing a formation process on the initial cell to form an initial solid electrolyte interphase film; injecting a second electrolyte into the initial cell, where the second electrolyte includes: 5 wt % to 20 wt % vinylene carbonate, 5 wt % to 15 wt % lithium salt, 0.005 wt % to 30 wt % infiltrant stabilizer, and non-aqueous organic solvent (all by weight); where the first electrolyte or the second electrolyte further includes: at least one of 1,3-propane sultone or fluoroethylene carbonate.
    Type: Application
    Filed: November 29, 2024
    Publication date: March 20, 2025
    Inventors: Jing CHEN, Zixiang YANG
  • Publication number: 20250096223
    Abstract: Provided is a method for preparing a secondary battery including a battery cell. The secondary battery includes a negative electrode. The method includes: preparing a negative electrode slurry, coating the negative electrode slurry on the negative current collector, and then drying and compacting the negative electrode slurry to form a negative electrode material coating, thereby obtaining the negative electrode. Preparing the negative electrode slurry includes: dry blending a negative electrode active material, a conductive agent and a dispersant to obtain a dry blend; kneading the dry blend with a part of the first solvent to obtain a kneaded material; subjecting the kneaded material, the remaining part of the first solvent, the second solvent to a first wet blending to obtain a first wet blend; and subjecting the first wet blend, a thickener and a binder to a second wet blending to obtain the negative electrode slurry.
    Type: Application
    Filed: November 29, 2024
    Publication date: March 20, 2025
    Inventors: Longhui LIAO, Zixiang YANG, Shuqing CHEN
  • Publication number: 20250096222
    Abstract: Secondary battery and preparation method thereof are provided. Lithium source, iron source, phosphorus source, transition metal salt source, bismuth source, and solvent are mixed to obtain intermediate solution. PH of intermediate solution ranges from 1.0 to 4.0. Intermediate solution is subjected to hydrothermal reaction, to obtain precursor by drying. Precursor is subjected to heat treatment to obtain core. Core includes lithium iron phosphate and bismuth salt. Core is coated with coating material to obtain cathode material. Cathode material includes core and conductive polymer coating layer arranged on at least surface of core. Finally, cathode material is prepared into secondary battery. Cathode material in present disclosure has advantages of high compaction density and high conductivity, which can significantly enhance energy density, cycle performance, and high-and-low temperature performance when cathode material is applied to secondary battery.
    Type: Application
    Filed: November 12, 2024
    Publication date: March 20, 2025
    Inventors: Lili CHEN, Zixiang YANG, Hanzhang SUN
  • Publication number: 20250096460
    Abstract: An adjustable antenna array and an electronic apparatus are provided. The adjustable antenna array includes: a first substrate and a second substrate opposite to each other, and antenna sub-arrays in an array. Each of at least some antenna sub-arrays includes a phase shifter, a power division feeding network, and a plurality of radiating units. The phase shifter and the power division feeding network are between the first substrate and the second substrate. At least some radiating units are connected to the phase shifter through the power division feeding network. Antenna patterns corresponding to the plurality of radiating units at least include patterns on a side of the second substrate away from the first substrate. An area of an orthographic projection of the power division feeding network on the first substrate is smaller than an area of an orthographic projection of the phase shifter on the first substrate.
    Type: Application
    Filed: August 26, 2022
    Publication date: March 20, 2025
    Inventors: Lu CHEN, Xiaoqiang YANG, Yiming WANG, Zixiang LIN, Wei ZHAO, Cuiwei TANG, Zhifeng ZHANG
  • Publication number: 20250087740
    Abstract: Embodiments of the present disclosure relate to the field of energy storage and provide a method for manufacturing sodium-ion rechargeable batteries. The method includes: providing a cell and disposing the cell inside a casing; performing a first injection operation on the cell disposed inside the casing using a first electrolyte, where the first electrolyte includes: 1,3-propanesultone of 0.5 wt % to 2 wt %, tris(trimethylsilyl) phosphate of 0.1 wt % to 2 wt %, fluoroethylene carbonate of 0.1 wt % to 2 wt %, a film forming additive of 0.01 wt % to 5 wt %, and at least one sodium salt; performing infiltration treatment and pre-charging treatment; performing a second injection operation on the cell disposed inside the casing using a second electrolyte, where the second electrolyte includes: 1,3-propanesultone of 5 wt % to 20 wt %, a nitriles compound of 3 wt % to 30 wt %, a water and acid removing additive of 0.005 wt % to 30 wt %, and at least one sodium salt; and allowing the cell to stand.
    Type: Application
    Filed: November 22, 2024
    Publication date: March 13, 2025
    Inventors: Jing CHEN, Zixiang YANG, Yi LUO
  • Publication number: 20250070166
    Abstract: A Cathode material and a preparation method therefor and use thereof are provided. The cathode material includes a cathode active substrate, and a surface of the cathode active substrate is coated with a carbon coating layer, wherein a surface of the carbon coating layer has an esterophilic group. The invention changes the surface energy of the carbon coating layer by introducing the esterophilic carbonyl to the surface of the carbon coating layer of the cathode active substrate, thereby significantly improving the wettability of the cathode active particles to the electrolyte. Moreover, the bulk structure of the active material is not changed, so the electrochemical performance of the cathode active material is guaranteed. The cathode plate prepared by the invention shows excellent wettability in the electrolyte, and a prepared battery shows low internal resistance, high energy efficiency and other characteristics.
    Type: Application
    Filed: November 11, 2024
    Publication date: February 27, 2025
    Applicant: ZHEJIANG JINKO ENERGY STORAGE CO., LTD.
    Inventors: Longhui LIAO, Zixiang YANG
  • Publication number: 20250070267
    Abstract: A method for preparing an energy storage cell is provided, and includes: providing a film layer, where the film layer is one of a positive electrode sheet, a separating film, and a negative electrode sheet, and the film layer has a first edge and a second edge opposite the first edge; performing a dispensing treatment on the film layer to form a plurality of groups of glue dots arranged on a surface of the film layer in a first direction; providing remaining two of the positive electrode sheet, the separating film, and the negative electrode sheet, and stacking the negative electrode sheet, the separating film, and the positive electrode sheet sequentially to form a stacked structure; and performing a winding treatment on the stacked structure from the second edge toward the first edge.
    Type: Application
    Filed: November 11, 2024
    Publication date: February 27, 2025
    Inventors: Yutao SHI, Yujun MA, Zixiang YANG
  • Publication number: 20250070583
    Abstract: Disclosed are a battery charging method, a battery charging device, and a battery charging apparatus. The battery charging method, comprising: determining a direct current resistance (DCR) curve of a rechargeable battery in response to a charging instruction for the rechargeable battery; obtaining a real-time impedance of the rechargeable battery, and determining an impedance interval in the DCR curve corresponding to the real-time impedance; and determining a current charging strategy for the rechargeable battery according to the impedance interval corresponding to the real-time impedance, and charging the rechargeable battery by using the current charging strategy.
    Type: Application
    Filed: November 13, 2024
    Publication date: February 27, 2025
    Inventors: Zixiang YANG, Xiangming WANG, Yuhao WU
  • Patent number: 12237950
    Abstract: A method for determining a remote radio device and a distributed AP are provided. The method includes: A baseband device determines parameters of uplink signals received by N remote radio devices, where N is a natural number greater than 1. The baseband device selects, based on the parameters, at least one remote radio device from the N remote radio devices as a remote radio device in a target set. The baseband device performs decoding based on an uplink signal received by the remote radio device in the target set, or positions a terminal device based on an uplink signal received by the remote radio device in the target set.
    Type: Grant
    Filed: June 23, 2023
    Date of Patent: February 25, 2025
    Assignee: Huawei Technologies Co., Ltd.
    Inventors: Songzhen Yang, Te Wei, Zixiang Ma
  • Publication number: 20250046994
    Abstract: The present disclosure provides a radio frequency apparatus, an antenna and an electronic device, and belongs to the field of communication technology. The radio frequency apparatus includes first and second dielectric substrates opposite to each other, first and second phase shifting structures between the first and second dielectric substrates; wherein the radio frequency apparatus further includes a first connection electrode and a second connection electrode; the first phase shifting structure and the second phase shifting structure each have a first end and a second end, the first ends of the first phase shifting structure and the second phase shifting structure are electrically connected to each other by the first connection electrode; the second ends of the first phase shifting structure and the second phase shifting structure are electrically connected to each other by the second connection electrode, to form a ring circuit structure.
    Type: Application
    Filed: November 14, 2022
    Publication date: February 6, 2025
    Inventors: Yiming WANG, Xiaoqiang YANG, Feng QU, Cuiwei TANG, Zhifeng ZHANG, Wei ZHAO, Lu CHEN, Zixiang LIN
  • Publication number: 20240310887
    Abstract: A dual-VIO integrated circuit is configurable into either a first configuration in which a VIO power supply voltage has a first value or into a second configuration in which the VIO power supply voltage has a second value. The dual-VIO integrated circuit includes a smart start-up detection circuit that detects whether the integrated circuit is in the first configuration or the second configuration.
    Type: Application
    Filed: March 14, 2023
    Publication date: September 19, 2024
    Inventors: Xingyi HUA, David Zixiang YANG, Francesco GATTA
  • Patent number: 10700655
    Abstract: An integrated circuit is disclosed for gain-dependent impedance matching and linearity. The integrated circuit includes at least two amplifier branches, an input inductor, and at least two degeneration inductors. Each amplifier branch includes a node, an input transistor, and a cascode stage connected between a drain of the input transistor and the node. Respective nodes of the at least two amplifier branches are connected together and respective gates of the input transistors of the at least two amplifier branches are connected together. The input inductor is connected to the respective gates, and the at least two degeneration inductors are connected between respective sources of the input transistors of the at least two amplifier branches and a ground. The at least two degeneration inductors are configured to establish a magnetic coupling with the input inductor and establish another magnetic coupling between each other.
    Type: Grant
    Filed: November 26, 2018
    Date of Patent: June 30, 2020
    Assignee: QUALCOMM Incorporated
    Inventors: Alaaeldien Mohamed Abdelrazek Medra, David Zixiang Yang, Kevin Hsi Huai Wang, Chen Zhai, Francesco Gatta
  • Patent number: 10530314
    Abstract: An integrated circuit is disclosed for gain-dependent impedance matching and linearity. The integrated circuit includes at least two amplifier branches, an input inductor, and at least two degeneration inductors. Each amplifier branch includes a node, an input transistor, and a cascode stage connected between a drain of the input transistor and the node. Respective nodes of the at least two amplifier branches are connected together and respective gates of the input transistors of the at least two amplifier branches are connected together. The input inductor is connected to the respective gates, and the at least two degeneration inductors are connected between respective sources of the input transistors of the at least two amplifier branches and a ground. The at least two degeneration inductors are configured to establish a magnetic coupling with the input inductor and establish another magnetic coupling between each other.
    Type: Grant
    Filed: March 29, 2018
    Date of Patent: January 7, 2020
    Assignee: QUALCOMM Incorporated
    Inventors: Alaaeldien Mohamed Abdelrazek Medra, David Zixiang Yang, Kevin Hsi Huai Wang
  • Patent number: 10491173
    Abstract: An integrated circuit is disclosed for gain-dependent impedance matching and linearity. The integrated circuit includes at least two amplifier branches, an input inductor, and at least two degeneration inductors. Each amplifier branch includes a node, an input transistor, and a cascode stage connected between a drain of the input transistor and the node. Respective nodes of the at least two amplifier branches are connected together and respective gates of the input transistors of the at least two amplifier branches are connected together. The input inductor is connected to the respective gates, and the at least two degeneration inductors are connected between respective sources of the input transistors of the at least two amplifier branches and a ground. The at least two degeneration inductors are configured to establish a magnetic coupling with the input inductor and establish another magnetic coupling between each other.
    Type: Grant
    Filed: March 29, 2018
    Date of Patent: November 26, 2019
    Assignee: QUALCOMM Incorporated
    Inventors: Alaaeldien Mohamed Abdelrazek Medra, David Zixiang Yang, Kevin Hsi Huai Wang
  • Publication number: 20190305740
    Abstract: An integrated circuit is disclosed for gain-dependent impedance matching and linearity. The integrated circuit includes at least two amplifier branches, an input inductor, and at least two degeneration inductors. Each amplifier branch includes a node, an input transistor, and a cascode stage connected between a drain of the input transistor and the node. Respective nodes of the at least two amplifier branches are connected together and respective gates of the input transistors of the at least two amplifier branches are connected together. The input inductor is connected to the respective gates, and the at least two degeneration inductors are connected between respective sources of the input transistors of the at least two amplifier branches and a ground. The at least two degeneration inductors are configured to establish a magnetic coupling with the input inductor and establish another magnetic coupling between each other.
    Type: Application
    Filed: June 19, 2019
    Publication date: October 3, 2019
    Inventors: Alaaeldien Mohamed Abdelrazek Medra, David Zixiang Yang, Kevin Hsi Huai Wang
  • Publication number: 20190158040
    Abstract: An apparatus is disclosed for enhanced reverse isolation and gain using feedback. The apparatus includes an input node, an amplification node, a feedback node, an output circuit, at least one amplifier circuit, and a feedback circuit. The output circuit is connected between the amplification node and the feedback node. The at least one amplifier circuit is connected between the input node and the amplification node. The at least one amplifier circuit includes an input transistor and a cascode stage. The input transistor has a gate node and a drain node, and the gate node is connected to the input node. The cascode stage is connected between the drain node and the amplification node. The feedback circuit includes at least one feedback capacitor that is connected between the feedback node and the input node.
    Type: Application
    Filed: July 30, 2018
    Publication date: May 23, 2019
    Inventors: Alaaeldien Mohamed Abdelrazek Medra, David Zixiang Yang, Francesco Gatta
  • Publication number: 20190158042
    Abstract: An integrated circuit is disclosed for gain-dependent impedance matching and linearity. The integrated circuit includes at least two amplifier branches, an input inductor, and at least two degeneration inductors. Each amplifier branch includes a node, an input transistor, and a cascode stage connected between a drain of the input transistor and the node. Respective nodes of the at least two amplifier branches are connected together and respective gates of the input transistors of the at least two amplifier branches are connected together. The input inductor is connected to the respective gates, and the at least two degeneration inductors are connected between respective sources of the input transistors of the at least two amplifier branches and a ground. The at least two degeneration inductors are configured to establish a magnetic coupling with the input inductor and establish another magnetic coupling between each other.
    Type: Application
    Filed: March 29, 2018
    Publication date: May 23, 2019
    Inventors: Alaaeldien Mohamed Abdelrazek Medra, David Zixiang Yang, Kevin Hsi Huai Wang