Abstract: The present disclosure provides a driving circuitry, a driving method, a driving module, and a display device. The driving circuitry includes a driving signal generation circuitry, a gating circuitry, an output control circuitry and an output circuitry. The driving signal generation circuitry is configured to perform a shifting operation on an (N?1)th-level driving signal to obtain an Nth-level driving signal. The gating circuitry is configured to write a gating input signal into a first node under the control of a gating control signal. The output control circuitry is configured to perform an NAND operation on the Nth-level driving signal and a potential at a second end of the output control circuitry to obtain a first output signal. The output circuitry is configured to perform phase inversion on the first output signal to obtain and provide an output driving signal through an output driving end, where N is a positive integer.

Abstract: This disclosure provides a display substrate, a display, and a display substrate driving method. The display substrate includes a first-category pixel row, a second-category pixel row, a first drive line, a second drive line and at least one category of data signal source; a first gate on array (GOA) circuit is used for providing a starting signal of a first frequency to the first-category pixel row; a second GOA circuit is used for providing a starting signal of a second frequency to the second-category pixel row; the at least one category of data signal source is used for supplying a data signal to data signal lines of the first-category pixel row and the second-category pixel row.

Abstract: A display substrate has a fan-out area and includes a plurality of conductive layers. The plurality of conductive layers include data lines, connection lines and fan-out lines. A connection line is electrically connected to a first data line, and crosses at least one data line and is insulated from the crossed data line. A first fan-out line is electrically connected to the connection line. A second fan-out line is electrically connected to a second data line. The first fan-out line includes a transfer line, and is located in a different conductive layer from second fan-out lines and crosses at least one second fan-out line. An order of arrangement of ends of the fan-out lines away from the display area in a first direction is same as an order of arrangement of the data lines in the first direction.

Abstract: A driving circuit includes a driving signal generation circuit, a gating circuit, an output control circuit, an output circuit, a voltage control circuit and a second node control circuit; the driving signal generation circuit generates an Nth stage of driving signal; the output control circuit controls to connect the first control node and the second node under the control of the potential of the first node; the gating circuit writes a gating input signal into the first node under the control of a gating control signal; the voltage control circuit controls a potential of the second node according to the potential of the first node; the second node control circuit controls to connect the second node and the first voltage terminal under the control of the potential of the first node.

Abstract: Display substrate, method for manufacturing the same, and display device are disclosed. The display substrate comprises: a base substrate comprising a display region and a peripheral region located at a periphery of the display region, the display region comprises at least two display sub-regions; the display substrate further comprises scanning lines and sub-pixels, wherein the scanning lines comprise first scanning lines comprising at least two scanning line segments independent from each other, and the at least two scanning line segments are located in different display sub-regions; and the sub-pixels are divided into rows of sub-pixels, the rows of sub-pixels comprise a target row of sub-pixels which is divided into at least two sub-pixel groups located in different display sub-regions, and the scanning line segment is coupled to each sub-pixel in a corresponding sub-pixel group belonging to a same display sub-region.

Abstract: A shift register includes a shift module configured for causing the cascade signal output end to output a cascade signal in response to a signal of the input signal end; an reverse output module configured for causing the reverse signal output end to output a signal reverse to the cascade signal output end in response to a signal of the cascade signal output end; a latch module configured for causing an output end of the latch module to output a control signal of the masking signal end in response to signals of the cascade signal output end and the reverse signal output end of a previous level; and a selection output module configured for providing a signal of the first power supply end or the second power supply end to the driving signal output end in response to a signal of the output end of the latch module.

Abstract: Disclosed are a display panel and a display device. The pixel circuit in the display panel includes a control circuit, a drive circuit, and a regulating circuit. The control circuit controls the potential of the coupled control node based on the gate drive signal provided by the gate line and the data signal provided by the data line. The drive circuit drives the light-emitting element to emit light based on the potential of the control node and the drive power signal provided by the drive power line. The regulating circuit adjusts the potential of the control node through the coupling effect based on the drive power signal and the initial power signal provided by the initial power line.

Abstract: A display substrate, a manufacturing method thereof and a display apparatus are provided.

Abstract: A pixel circuit, a pixel driving method, and a display device. The pixel circuit includes a light-emitting element, a driving circuit, and a data writing circuit; the data writing circuit is electrically connected to a first scanning terminal, a data line and a first terminal of the driving circuit, and is configured to write a data voltage provided by the data line into the first terminal of the driving circuit under control of a first scanning signal provided by the first scanning terminal during a data writing phase included in a refresh frame, and write a reset voltage provided by the data line into the first terminal of the driving circuit under control of the first scanning signal during a reset phase included in a hold frame; the driving circuit is configured to drive the light-emitting element under control of a potential of a control terminal thereof.

Abstract: A touch display panel and an electronic product. The touch display panel includes a display substrate, a first conductive layer, a touch insulation layer, a second electrode layer, and a shielding conductive pattern; the display substrate includes a signal line, a first electrode layer and a second electrode layer; the first conductive layer includes a touch conductive structure, which includes touch electrodes, the first electrode layer includes first electrodes, and the second electrode layer includes a plurality of second electrodes; an orthographic projection of the shielding conductive pattern on the base substrate overlaps with that of the signal line and that of at least one of the plurality of touch electrodes respectively, the shielding conductive pattern is located in the first conductive layer and insulated from the touch conductive structure, or the shielding conductive pattern is located in the second electrode layer and insulated from the second electrode.

Abstract: Provided is a shift register unit. The shift register unit includes: a first input circuit, coupled to a first clock terminal, an input terminal, a first node and a second node; a second input circuit, coupled to the first node, the first clock terminal, a first power terminal and a third node; a first control circuit, coupled to the input terminal, the first clock terminal, the second node, a second power terminal, a second clock terminal and the third node; a second control circuit, coupled to the third node, the second clock terminal, the first node, the first power terminal, the second power terminal, a fourth node and a fifth node; and an output circuit, coupled to the fourth node, the fifth node, the first power terminal, the second power terminal and an output terminal.

Abstract: A drive control circuit includes an input circuit, a first output circuit and a first output control circuit. An input circuit is configured to control the potentials of a first node and a second node under the control of a signal input terminal and a clock signal terminal. The first output circuit is configured to provide a first power supply signal to a third node under the control of a first node or to provide a second power supply signal to a first output terminal under the control of a second node. The first output control circuit is configured to turn on or turn off the third node and the first output terminal under the control of the first control terminal.

Abstract: A driving circuit includes a driving signal generation circuit, a gating circuit, an output control circuit and an output circuit; the driving signal generation circuit generates and outputs the Nth stage of driving signal; the gating circuit controls to write the gating input signal into the first node; the output control circuit performs a NAND operation on the Nth stage of driving signal and the potential of the second terminal of the output control circuit to obtain a first output signal; the output circuit inverts the first output signal to obtain and provide an output driving signal through the output driving terminal; N is a positive integer.

Abstract: A driving circuit includes a driving signal generation circuit, a gating circuit, an output control circuit, an output circuit and a voltage control circuit; the driving signal generation circuit generates an Nth stage of driving signal, the output control circuit connects the first control node and the second node under the control of the potential of the first node; the gating circuit controls to write a gating input signal into the first node under the control of a gating control signal; the voltage control circuit controls a potential of the second node according to a potential of the first node; the output circuit connects the output driving terminal and the first voltage terminal under the control of the potential of the second node, and connects the output driving terminal and the second voltage terminal under the control of the potential of the third control node.

Abstract: Disclosed are a pixel circuit, a driving method thereof, a display panel and a display apparatus, relating to the technical field of display. The pixel circuit comprises a drive transistor, a data writing module, a compensation adjustment module and a first reset module. A gate, a first electrode and a second electrode of the drive transistor are respectively connected with a first node, a second node and a third node; the data writing module is connected with a first scanning control signal terminal, a data signal terminal and the second node; the compensation adjustment module is connected with a second scan control signal terminal, the first node and the third node; the first reset module is connected with a first reset control signal terminal, the first node and a first initialization signal terminal.

Abstract: A display substrate includes a base substrate (100), and multiple pixel circuits (11a, 11b) and multiple first auxiliary structures disposed on the base substrate (100). The multiple first auxiliary structures are located at edges of the multiple pixel circuits (11a, 11b). At least one first auxiliary structure is adjacent to at least one pixel circuit (11a, 11b). The multiple pixel circuits (11a, 11b) include at least one semiconductor layer located on the base substrate (100). An orthographic projection of the at least one first auxiliary structure on the base substrate (100) is at least partially identical to an orthographic projection of the semiconductor layer of the at least one pixel circuit (11a, 11b) on the base substrate (100).

Abstract: A driving circuit includes a driving signal generation circuit, a gating circuit, an output control circuit, a voltage control circuit and an output circuit; the driving signal generation circuit generates the Nth stage of driving signal; the gating circuit writes a gating input signal into the first node under the control of a gating control signal; the output control circuit connects the first control node and the second node under the control of a potential of the first node; the voltage control circuit controls a potential of the second node according to the potential of the first node; the output circuit connects the output driving terminal and the first voltage terminal under the control of the potential of the second node, and connects the output driving terminal and the second voltage terminal under the control of the potential of the second control node; N is a positive integer.

Abstract: The present disclosure provides a driving circuitry, a driving method, a driving module, and a display device. The driving circuitry includes a driving signal generation circuitry, a gating circuitry, an output control circuitry and an output circuitry. The driving signal generation circuitry is configured to perform a shifting operation on an (N?1)th-level driving signal to obtain an Nth-level driving signal. The gating circuitry is configured to write a gating input signal into a first node under the control of a gating control signal. The output control circuitry is configured to perform an NAND operation on the Nth-level driving signal and a potential at a second end of the output control circuitry to obtain a first output signal. The output circuitry is configured to perform phase inversion on the first output signal to obtain and provide an output driving signal through an output driving end, where N is a positive integer.

Abstract: Disclosed is a pixel circuit including a drive sub-circuit, a writing sub-circuit, a reset sub-circuit, a coupling sub-circuit, a storage sub-circuit, and a light emitting element, wherein the drive sub-circuit is configured to provide a drive current to the light emitting element under control of signals of a first node and a second node; the writing sub-circuit is configured to write a signal of a data signal terminal to the second node under control of a signal of a scan signal terminal; the coupling sub-circuit is configured to raise the voltage of the first node through a coupling action; the reset sub-circuit is configured to reset an anode terminal of the light emitting element under control of a signal of the scan signal terminal and reset a control terminal of the drive sub-circuit under control of a signal of a reset control signal terminal.

Abstract: A display substrate and a display apparatus are disclosed. The display substrate includes: a base substrate including a first and second display regions; a light transmittance of the first display region is greater than that of the second display region; first sub-pixels in the first display region. At least one first sub-pixel includes a first pixel circuit and a first light emitting device; the first pixel circuit includes a storage capacitor and a driving transistor; and a data writing sub-circuit configured to write a data voltage signal to a gate electrode of the driving transistor in response to a first and second scan signals; a reset sub-circuit configured to provide an initialization voltage signal to a first electrode of the first light emitting device in response to the second scan signal; and a luminescent control sub-circuit configured to transmit a driving current to the first light emitting device.