Abstract: Described are systems and methods of determining DC offset voltages in IQ modulators. First, two different DC test voltages are selected for one of the inputs to the IQ modulator. Then, a first test voltage is applied to one input to the IQ modulator while test data is generated by measuring outputs from a set of signals applied to the other input to the IQ modulator. Then the second test voltage is applied and another set of test data generated. From the first and second sets of test data, second-order polynomial functions may be constructed and compared to one another to yield a ratio of power value outputs. Then the DC offset voltages may be determined from the ratio of power value outputs.

Abstract: Described are systems and methods of determining DC offset voltages in IQ modulators. First, two different DC test voltages are selected for one of the inputs to the IQ modulator. Then, a first test voltage is applied to one input to the IQ modulator while test data is generated by measuring outputs from a set of signals applied to the other input to the IQ modulator. Then the second test voltage is applied and another set of test data generated. From the first and second sets of test data, second-order polynomial functions may be constructed and compared to one another to yield a ratio of power value outputs. Then the DC offset voltages may be determined from the ratio of power value outputs.

Abstract: A vector modulator calibration system (“VMCS”) for obtaining a calibrated modulated output signal while minimizing spurious output signals from a vector modulator is shown. The VMCS may include a power sensor in signal communication with the vector modulator and a digitizer in signal communication with the power sensor.

Abstract: A vector modulator calibration system (“VMCS”) for obtaining a calibrated modulated output signal while minimizing spurious output signals from a vector modulator is shown. The VMCS may include a power sensor in signal communication with the vector modulator and a digitizer in signal communication with the power sensor.

Abstract: Systems and methods are provided that allow for accurate computation of the group delay and, if desired, phase response of an electrical network from known amplitude measurements. In one embodiment, a model that includes information regarding locations (e.g., approximate locations) of at least one of poles and zeros for an electrical network is used for computing at least one of group delay and phase response of the electrical network for a frequency range over which amplitude measurement data is unknown. Further, a transition segment may be determined for use in computing contribution to group delay over a transition between a first frequency region for which amplitude measurement data is known and a second frequency region for which amplitude measurement data is unknown. The techniques provided may be used for analyzing various types of systems, such as lowpass, bandpass, etc., and may be applied for analysis of non-minimum phase electrical networks.