Abstract: This application discloses tools and mechanisms to convert a program from a sequentially-executable format into a parallel-executable format, and then modify the program in the parallel-executable format to either allow compilation for parallel execution or to speed-up the parallel execution by an accelerated processing unit. The tools and mechanisms can identify various features of the program, such as recursive calls, search loops, inline function calls, uncompressed data structures, memory utilization, and inter-dependent kernel instances. The tools and mechanisms can modify the program to replace or otherwise augment the identified features, which can allow the modified program to be compiled for parallel execution, or speed-up the parallel execution by an accelerated processing unit.

Abstract: This application discloses a controller area network (CAN) design and verification tool to identify periodic messages and sporadic messages that a control node is configured to transmit on a shared bus in a CAN design. The CAN design and verification tool can assign placeholders to a schedule table of the control node to define a message transmission schedule for the control node. The placeholders include at least one sporadic message placeholder configured to identify one of a plurality of minor time frames available on the shared bus for the control node to transmit any one of the sporadic messages. The CAN design and verification tool can determine a worst-case latency associated with delivery of a first one of the sporadic messages on the shared bus when the control node utilized the sporadic message placeholder to transmit a second one of the sporadic messages on the shared bus.

Abstract: This application discloses tools and mechanisms to convert a program from a sequentially-executable format into a parallel-executable format, and then modify the program in the parallel-executable format to either allow compilation for parallel execution or to speed-up the parallel execution by an accelerated processing unit. The tools and mechanisms can identify various features of the program, such as recursive calls, search loops, inline function calls, uncompressed data structures, memory utilization, and inter-dependent kernel instances. The tools and mechanisms can modify the program to replace or otherwise augment the identified features, which can allow the modified program to be compiled for parallel execution, or speed-up the parallel execution by an accelerated processing unit.

Abstract: This application discloses determining a worst-case latency in a controller area network (CAN) for messages experiencing priority inversion within individual controllers. A system to determine the worst-case latency can include a memory system to store computer-executable instructions and a computing system, in response to execution of the computer-executable instructions, can identify that a controller area network (CAN) design includes a controller configured to sequence messages for transmission over a shared bus with at least one of the messages experiencing priority inversion. The computing system also can determine a delay for the controller to present a first message to the shared bus for transmission when the first message is ordered behind a second message having a lower priority than the first message. The delay may be a portion of the worst-case latency corresponding to the priority inversion.

Abstract: This application discloses determining a worst-case latency in a controller area network (CAN) for messages experiencing priority inversion within individual controllers. A system to determine the worst-case latency can include a memory system to store computer-executable instructions and a computing system, in response to execution of the computer-executable instructions, can identify that a controller area network (CAN) design includes a controller configured to sequence messages for transmission over a shared bus with at least one of the messages experiencing priority inversion. The computing system also can determine a delay for the controller to present a first message to the shared bus for transmission when the first message is ordered behind a second message having a lower priority than the first message. The delay may be a portion of the worst-case latency corresponding to the priority inversion.

Abstract: This application discloses a controller area network (CAN) design and verification tool to identify periodic messages and sporadic messages that a control node is configured to transmit on a shared bus in a CAN design. The CAN design and verification tool can assign placeholders to a schedule table of the control node to define a message transmission schedule for the control node. The placeholders include at least one sporadic message placeholder configured to identify one of a plurality of minor time frames available on the shared bus for the control node to transmit any one of the sporadic messages. The CAN design and verification tool can determine a worst-case latency associated with delivery of a first one of the sporadic messages on the shared bus when the control node utilized the sporadic message placeholder to transmit a second one of the sporadic messages on the shared bus.