Patents by Inventor Zongbin Wang
Zongbin Wang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 12040210Abstract: Exemplary semiconductor processing systems include a processing chamber, a power supply, and a chuck disposed at least partially within the processing chamber. The chuck includes a chuck body defining a vacuum port. The chuck also includes first and second coplanar electrodes embedded in the chuck body and connected to the power supply. In some examples, coplanar electrodes include concentric electrodes defining a concentric gap in between. Exemplary semiconductor processing methods may include activating the power supply for the electrostatic chuck to secure a semiconductor substrate on the body of the chuck and/or activating the vacuum port defined by the body of the electrostatic chuck. Some processing can be carried out at increased pressure, while other processing can be carried out at reduced pressure with increased chucking voltage.Type: GrantFiled: October 19, 2020Date of Patent: July 16, 2024Assignee: Applied Materials, Inc.Inventors: Jian Li, Dmitry A. Dzilno, Juan Carlos Rocha-Alvarez, Paul L. Brillhart, Akshay Gunaji, Mayur Govind Kulkarni, Sandeep Bindgi, Sanjay Kamath, Kwangduk Douglas Lee, Zongbin Wang, Yubin Zhang, Yong Xiang Lim
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Publication number: 20240110284Abstract: A method of processing a substrate is disclosed which includes depositing a layer in a processing chamber on a field region, a sidewall region, and a fill region of a feature of the substrate, wherein a hardness of a portion of the layer deposited on the sidewall region is lower than a hardness of a portion of the layer deposited on the field region, and lower than a hardness of a portion of the layer deposited on the fill region.Type: ApplicationFiled: September 26, 2023Publication date: April 4, 2024Inventors: Lulu XIONG, Kevin Hsiao, Chris LIU, Chieh-Wen LO, Sean M. SEUTTER, Deenesh PADHI, Prayudi LIANTO, Peng SUO, Guan Huei SEE, Zongbin WANG, Shengwei ZENG, Balamurugan RAMASAMY
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Publication number: 20220122873Abstract: Exemplary semiconductor processing systems include a processing chamber, a power supply, and a chuck disposed at least partially within the processing chamber. The chuck includes a chuck body defining a vacuum port. The chuck also includes first and second coplanar electrodes embedded in the chuck body and connected to the power supply. In some examples, coplanar electrodes include concentric electrodes defining a concentric gap in between. Exemplary semiconductor processing methods may include activating the power supply for the electrostatic chuck to secure a semiconductor substrate on the body of the chuck and/or activating the vacuum port defined by the body of the electrostatic chuck. Some processing can be carried out at increased pressure, while other processing can be carried out at reduced pressure with increased chucking voltage.Type: ApplicationFiled: October 19, 2020Publication date: April 21, 2022Applicant: Applied Materials, Inc.Inventors: Jian Li, Dmitry A. Dzilno, Juan Carlos Rocha-Alvarez, Paul L. Brillhart, Akshay Gunaji, Mayur Govind Kulkarni, Sandeep Bindgi, Sanjay Kamath, Kwangduk Douglas Lee, Zongbin Wang, Yubin Zhang, Yong Xiang Lim
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Publication number: 20180350563Abstract: Embodiments of the disclosure generally relate to a method of processing a semiconductor substrate at a temperature less than 250 degrees Celsius. In one embodiment, the method includes loading the substrate with the deposited film into a pressure vessel, exposing the substrate to a processing gas comprising an oxidizer at a pressure greater than about 2 bars, and maintaining the pressure vessel at a temperature between a condensation point of the processing gas and about 250 degrees Celsius.Type: ApplicationFiled: May 29, 2018Publication date: December 6, 2018Inventors: Pramit MANNA, Abhijit Basu MALLICK, Kurtis LESCHKIES, Steven VERHAVERBEKE, Sanjay KAMATH, Zongbin WANG, Hanwen ZHANG, Shishi JIANG
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Patent number: 9472392Abstract: Silicon oxide is deposited with improved step coverage by first exposing a patterned substrate to a silicon-containing precursor and then to an oxygen-containing precursor or vice versa. Plasma excitation is used for both precursors. Exposing the precursors one-at-a-time avoids disproportionate deposition of silicon oxide near the opening of a high aspect ratio gap on a patterned substrate. The plasma-excited precursors exhibit a lower sticking coefficient and/or higher surface diffusion rate in regions already adsorbed and therefore end up depositing silicon oxide deep within the high aspect ratio gap to achieve the improvement in step coverage.Type: GrantFiled: January 30, 2015Date of Patent: October 18, 2016Assignee: Applied Materials, Inc.Inventors: Zongbin Wang, Shalina Sudheeran, Loke Yuen Wong, Arvind Sundarrajan
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Publication number: 20160225614Abstract: Silicon oxide is deposited with improved step coverage by first exposing a patterned substrate to a silicon-containing precursor and then to an oxygen-containing precursor or vice versa. Plasma excitation is used for both precursors. Exposing the precursors one-at-a-time avoids disproportionate deposition of silicon oxide near the opening of a high aspect ratio gap on a patterned substrate. The plasma-excited precursors exhibit a lower sticking coefficient and/or higher surface diffusion rate in regions already adsorbed and therefore end up depositing silicon oxide deep within the high aspect ratio gap to achieve the improvement in step coverage.Type: ApplicationFiled: January 30, 2015Publication date: August 4, 2016Applicant: APPLIED MATERIALS, INC.Inventors: Zongbin Wang, Shalina Sudheeran, Loke Yuen Wong, Arvind Sundarrajan
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Patent number: 9362111Abstract: Implementations described herein generally relate to methods for forming dielectric films in high aspect ratio features. In one implementation, a method for forming a silicon oxide layer is provided. A silicon-containing precursor gas is flown into a processing chamber having a substrate having a high aspect ratio feature disposed therein. Then a high frequency plasma is applied to the silicon-containing precursor gas to deposit a silicon-containing layer over the surface of the high aspect ratio feature. The processing chamber is purged to remove by-products from the silicon-containing layer deposition process. An oxygen-containing precursor gas is flown into the processing chamber. A high frequency plasma and a low frequency plasma are applied to the oxygen-containing precursor gas to form the silicon oxide layer.Type: GrantFiled: January 29, 2015Date of Patent: June 7, 2016Assignee: APPLIED MATERIALS, INC.Inventors: Zongbin Wang, Shalina Deepa Sudheeran, Arvind Sundarrajan, Bharat Bhushan
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Publication number: 20150235844Abstract: Implementations described herein generally relate to methods for forming dielectric films in high aspect ratio features. In one implementation, a method for forming a silicon oxide layer is provided. A silicon-containing precursor gas is flown into a processing chamber having a substrate having a high aspect ratio feature disposed therein. Then a high frequency plasma is applied to the silicon-containing precursor gas to deposit a silicon-containing layer over the surface of the high aspect ratio feature. The processing chamber is purged to remove by-products from the silicon-containing layer deposition process. An oxygen-containing precursor gas is flown into the processing chamber. A high frequency plasma and a low frequency plasma are applied to the oxygen-containing precursor gas to form the silicon oxide layer.Type: ApplicationFiled: January 29, 2015Publication date: August 20, 2015Inventors: Zongbin WANG, Shalina Deepa SUDHEERAN, Arvind SUNDARRAJAN, Bharat BHUSHAN
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Patent number: 8445889Abstract: A method of patterning nanostructures comprising printing an ink comprising the nanostructures onto a solvent-extracting first surface such that a pattern of nanostructures is formed on the first surface.Type: GrantFiled: February 23, 2009Date of Patent: May 21, 2013Assignee: Nanyang Technological UniversityInventors: Kumar Bhupendra, Yuanyuan Zhang, Zongbin Wang, Lain-Jong Li, Subodh Gautam Mhaisalkar
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Publication number: 20110001118Abstract: A method of patterning nanostructures comprising printing an ink comprising the nanostructures onto a solvent-extracting first surface such that a pattern of nanostructures is formed on the first surface.Type: ApplicationFiled: February 23, 2009Publication date: January 6, 2011Inventors: Kumar Bhupendra, Yuanyuan Zhang, Zongbin Wang, Lain-Jong Li, Subodh Gautam Mhaisalkar