Patents by Inventor Zsolt M. Kovacs

Zsolt M. Kovacs has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8493787
    Abstract: An embodiment of non-volatile memory device integrated in a chip of semiconductor material is proposed. The memory includes at least one sector of a plurality of memory cells; each sector includes a storage region of a first type of conductivity and a further storage region of a second type of conductivity. Each memory cell includes a first region and a second region of the second type of conductivity, which are formed in the storage region for defining a storage transistor of floating gate MOS type of the first type of conductivity; the memory cell likewise includes a further first region and a further second region of the first type of conductivity, which are formed in the further storage region for defining a further storage transistor of floating gate MOS type of the second type of conductivity. The memory cell also includes a common floating gate of the storage transistor and the further storage transistor.
    Type: Grant
    Filed: December 21, 2010
    Date of Patent: July 23, 2013
    Assignee: STMicroelectronics S.r.l.
    Inventors: Marco Pasotti, Davide Lena, Giancarlo Pisoni, Fabrizio Torricelli, Zsolt M. Kovacs-Vajna
  • Publication number: 20110157972
    Abstract: An embodiment of non-volatile memory device integrated in a chip of semiconductor material is proposed. The memory includes at least one sector of a plurality of memory cells; each sector includes a storage region of a first type of conductivity and a further storage region of a second type of conductivity. Each memory cell includes a first region and a second region of the second type of conductivity, which are formed in the storage region for defining a storage transistor of floating gate MOS type of the first type of conductivity; the memory cell likewise includes a further first region and a further second region of the first type of conductivity, which are formed in the further storage region for defining a further storage transistor of floating gate MOS type of the second type of conductivity. The memory cell also includes a common floating gate of the storage transistor and the further storage transistor.
    Type: Application
    Filed: December 21, 2010
    Publication date: June 30, 2011
    Applicant: STMICROELECTRONICS S.R.L.
    Inventors: Marco PASOTTI, Davide LENA, Giancarlo PISONI, Fabrizio TORRICELLI, Zsolt M. KOVACS-VAJNA
  • Patent number: 6363171
    Abstract: An alphanumeric character image recognition system includes a first stage comprising at least a first, second and third digital image signal processing network having each at least one input terminal and at least one output terminal and said networks being designed to process image information from digital image signals, and comprising at least a first, second and third memory register having each at least one input terminal and at least one output terminal and the input terminals of the first, second and third memory registers being connected to the output terminal of the first network, the output of the second network and the output terminal of the third network respectively and said memory registers being designed to contain the image information processed by the first, second and third digital image signal processing networks, and a second stage characterized in that said second stage comprises at least one first and one second classifier network having each at least one first and one second input termina
    Type: Grant
    Filed: January 13, 1995
    Date of Patent: March 26, 2002
    Assignee: STMicroelectronics S.r.l.
    Inventor: Zsolt M. Kovacs