Patents by Inventor Zu-Jean Tien

Zu-Jean Tien has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 5374481
    Abstract: A polyemitter structure having a thin interfacial layer deposited between the polysilicon emitter contact and the crystalline silicon emitter, as opposed to a regrown SiO.sub.x layer, has improved reproducibility and performance characteristics. A n-doped hydrogenated microcrystalline silicon film can be used as the deposited interfacial film between a crystalline silicon emitter and a polycrystalline silicon contact.
    Type: Grant
    Filed: August 5, 1993
    Date of Patent: December 20, 1994
    Assignee: International Business Machines Corporation
    Inventors: Shwu Jen Jeng, Jerzy Kanicki, David E. Kotecki, Christopher C. Parks, Zu-Jean Tien
  • Patent number: 5266504
    Abstract: A method of manufacturing a bipolar transistor by use of low temperature emitter process is disclosed. After completion of the usual base and collector formation in a vertical bipolar transistor, an emitter opening is etched in the insulator layer over the base layer at selected locations. A thin layer (less than 500 .ANG.) of in-situ doped amorphous silicon is deposited over the substrate and heated to densify for 30 to 60 minutes at about 650.degree. C. Subsequently an in-situ doped polysilicon layer of 100 to 200 nm is deposited over the amorphous Si film preferably at about 600.degree. C. Subsequently the layers are heated below 600.degree. C. for several hours to convert partially the amorphous Si into a monocrystalline emitter layer over the base regions.
    Type: Grant
    Filed: March 26, 1992
    Date of Patent: November 30, 1993
    Assignee: International Business Machines Corporation
    Inventors: Jeffrey L. Blouse, Jack O. Chu, Brian Cunningham, Jeffrey P. Gambino, Louis L. Hsu, David E. Kotecki, Seshadri Subbanna, Zu-Jean Tien
  • Patent number: 5202272
    Abstract: A method of forming a semiconductor structure comprising the steps of: providing a body of semiconductor material including at least one generally planar surface; forming a mesa having at least one generally vertical wall over the planar surface; forming a layer of material generally conformally over the mesa and the planar surface so as to form a vertical spacer on the vertical wall; forming a protective mask selectively on the upper portion of the vertical spacer; and using the protective mask to etch and remove the unmasked portions of the layer of material and the mesa while leaving the vertical spacer.The process is used to form an FET by forming a gate insulating layer underneath of the vertical spacer, the vertical spacer being selected to comprise a conductive gate material such as doped polysilicon. The vertical gate structure is then used as a mask to dope the source and drain regions.
    Type: Grant
    Filed: March 25, 1991
    Date of Patent: April 13, 1993
    Assignee: International Business Machines Corporation
    Inventors: Chang-Ming Hsieh, Louis L. Hsu, Shantha A. Kumar, Zu-Jean Tien
  • Patent number: 4713140
    Abstract: An apparatus and method for monitoring a change of thickness of a first material with a first bandgap energy, for disposal over a second material on a wafer and having a second different bandgap energy, wherein at least one of the materials has a direct bandgap. The apparatus comprises means for changing the thickness of the first material layer; means for directing a beam of energy to impinge at an angle on to the surface and to penetrate the wafer, with the beam having an energy sufficient to pump the at least one direct bandgap material to a higher energy state; and means for detecting the induced luminescence from the at least one direct bandgap material to determine when to alter the thickness changing process.The present invention may be used to monitor both deposition and etching processes. It is particularly suited for determining the etch endpoint for III-V semiconductor materials such as GaAs and AlGaAs.
    Type: Grant
    Filed: March 2, 1987
    Date of Patent: December 15, 1987
    Assignee: International Business Machines Corporation
    Inventor: Zu-Jean Tien