Patents by Inventor Zu Wang

Zu Wang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230340242
    Abstract: A combination comprises two propylene-based polymers which can provide flexibility in adjusting shrinkage rate of components comprising such combination.
    Type: Application
    Filed: June 9, 2021
    Publication date: October 26, 2023
    Applicant: EXXONMOBIL CHEMICAL PATENTS INC.
    Inventors: Bin ZHAO, Li Zu WANG, Yi PENG
  • Patent number: 9508815
    Abstract: A semiconductor device is provided including a substrate and a plurality of gate stacks. The gate stack includes a dielectric layer disposed on the substrate, a first capping layer disposed on the dielectric layer, a second capping layer disposed on the first capping layer, and a gate electrode layer covering the second capping layer. The first capping layer having a roughened surface may enhance the formation of the second capping layer. The second capping layer has a bottom portion and a sidewall portion, and the thickness of the bottom portion is formed to be greater than the thickness of the sidewall portion, so that the dielectric property of the second capping layer may be significantly improved. Further, a method for manufacturing the semiconductor device also provides herein.
    Type: Grant
    Filed: October 23, 2015
    Date of Patent: November 29, 2016
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Fu-An Li, Cheng-Chun Tsai, Ting-Hsien Chen, Mu-Kai Tung, Ben-Zu Wang, Po-Jen Shih, Hung-Hsin Liang
  • Publication number: 20160056255
    Abstract: A semiconductor device is provided including a substrate and a plurality of gate stacks. The gate stack includes a dielectric layer disposed on the substrate, a first capping layer disposed on the dielectric layer, a second capping layer disposed on the first capping layer, and a gate electrode layer covering the second capping layer. The first capping layer having a roughened surface may enhance the formation of the second capping layer. The second capping layer has a bottom portion and a sidewall portion, and the thickness of the bottom portion is formed to be greater than the thickness of the sidewall portion, so that the dielectric property of the second capping layer may be significantly improved. Further, a method for manufacturing the semiconductor device also provides herein.
    Type: Application
    Filed: October 23, 2015
    Publication date: February 25, 2016
    Inventors: Fu-An LI, Cheng-Chun TSAI, Ting-Hsien CHEN, Mu-Kai TUNG, Ben-Zu WANG, Po-Jen SHIH, Hung-Hsin LIANG
  • Patent number: 9202809
    Abstract: A semiconductor device is provided including a substrate and a plurality of gate stacks. The gate stack includes a dielectric layer disposed on the substrate, a first capping layer disposed on the dielectric layer, a second capping layer disposed on the first capping layer, and a gate electrode layer covering the second capping layer. The first capping layer having a roughened surface may enhance the formation of the second capping layer. The second capping layer has a bottom portion and a sidewall portion, and the thickness of the bottom portion is formed to be greater than the thickness of the sidewall portion, so that the dielectric property of the second capping layer may be significantly improved. Further, a method for manufacturing the semiconductor device also provides herein.
    Type: Grant
    Filed: February 6, 2014
    Date of Patent: December 1, 2015
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Fu-An Li, Cheng-Chun Tsai, Ting-Hsien Chen, Mu-Kai Tung, Ben-Zu Wang, Po-Jen Shih, Hung-Hsin Liang
  • Publication number: 20150221640
    Abstract: A semiconductor device is provided including a substrate and a plurality of gate stacks. The gate stack includes a dielectric layer disposed on the substrate, a first capping layer disposed on the dielectric layer, a second capping layer disposed on the first capping layer, and a gate electrode layer covering the second capping layer. The first capping layer having a roughened surface may enhance the formation of the second capping layer. The second capping layer has a bottom portion and a sidewall portion, and the thickness of the bottom portion is formed to be greater than the thickness of the sidewall portion, so that the dielectric property of the second capping layer may be significantly improved. Further, a method for manufacturing the semiconductor device also provides herein.
    Type: Application
    Filed: February 6, 2014
    Publication date: August 6, 2015
    Applicant: Taiwan Semiconductor Manufacturing CO., LTD.
    Inventors: Fu-An Li, Cheng-Chun Tsai, Ting-Hsien Chen, Mu-Kai Tung, Ben-Zu Wang, Po-Jen Shih, Hung-Hsin Liang
  • Publication number: 20130149686
    Abstract: A system comprises a finding scene constructing module, for constructing and displaying a finding scene according to a scene of different levels of difficulty, a base map matching the scene and a target to be found; a finding position processing module, for acquiring a finding position and comparing the finding position with a distribution area of the target to be found, to obtain a comparison result and judge, according to the comparison result, whether a child accurately finds the target to be found; a scoring module, for scoring according to the comparison result, counting total scores and submitting the total scores to a database for storage; an audio and video module, for providing prompts and knowledge for the child according to the comparison result; and a scene element database, for storing the scene of different levels of difficulty, the base map matching the scene, the target, and the audio and video.
    Type: Application
    Filed: August 25, 2011
    Publication date: June 13, 2013
    Applicant: LINKSTAR ELECTRONICS GROUP (SHENZHEN) CO., LTD.
    Inventors: Zhixiang Liu, Haifeng Yang, Li Yin, Miao Li, Kailong Wu, Xiaojun Ming, Chanjuan Liu, Zu Wang