Patents by Inventor Zubin P. PATEL

Zubin P. PATEL has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Defect mitigation structures for semiconductor devices
    Patent number: 9105469
    Abstract: A method and a semiconductor device for incorporating defect mitigation structures are provided. The semiconductor device comprises a substrate, a defect mitigation structure comprising a combination of layers of doped or undoped group IV alloys and metal or non-metal nitrides disposed over the substrate, and a device active layer disposed over the defect mitigation structure. The defect mitigation structure is fabricated by depositing one or more defect mitigation layers comprising a substrate nucleation layer disposed over the substrate, a substrate intermediate layer disposed over the substrate nucleation layer, a substrate top layer disposed over the substrate intermediate layer, a device nucleation layer disposed over the substrate top layer, a device intermediate layer disposed over the device nucleation layer, and a device top layer disposed over the device intermediate layer.
    Type: Grant
    Filed: June 30, 2011
    Date of Patent: August 11, 2015
    Assignee: Piquant Research LLC
    Inventors: Zubin P. Patel, Tracy Helen Fung, Jinsong Tang, Wai Lo, Arun Ramamoorthy
  • Defect Mitigation Structures For Semiconductor Devices
    Publication number: 20130001641
    Abstract: A method and a semiconductor device for incorporating defect mitigation structures are provided. The semiconductor device comprises a substrate, a defect mitigation structure comprising a combination of layers of doped or undoped group IV alloys and metal or non-metal nitrides disposed over the substrate, and a device active layer disposed over the defect mitigation structure. The defect mitigation structure is fabricated by depositing one or more defect mitigation layers comprising a substrate nucleation layer disposed over the substrate, a substrate intermediate layer disposed over the substrate nucleation layer, a substrate top layer disposed over the substrate intermediate layer, a device nucleation layer disposed over the substrate top layer, a device intermediate layer disposed over the device nucleation layer, and a device top layer disposed over the device intermediate layer.
    Type: Application
    Filed: June 30, 2011
    Publication date: January 3, 2013
    Inventors: Zubin P. Patel, Tracy Helen Fung, Jinsong Tang, Wai Lo, Arun Ramamoorthy
  • SYSTEM AND METHOD FOR USING POROUS LOW DIELECTRIC FILMS
    Publication number: 20100078814
    Abstract: A system and method for manufacturing a semiconductor device including a low dielectric constant porous material layer. Ions are implanted into the low dielectric constant porous material layer which thereby provides the porous material layer with sufficient mechanical strength for withstanding semiconductor manufacturing processes. The ions implanted in the porous material layer further facilitate disposition of a conductive layer on the porous material layer.
    Type: Application
    Filed: September 29, 2008
    Publication date: April 1, 2010
    Inventors: Alok Nandini ROY, Zubin P. PATEL, Shenqing FANG