Patents by Inventor Zubin Shah

Zubin Shah has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240039867
    Abstract: A software-defined network (SDN) system, device and method comprise one or more input ports, a programmable parser, a plurality of programmable lookup and decision engines (LDEs), programmable lookup memories, programmable counters, a programmable rewrite block and one or more output ports. The programmability of the parser, LDEs, lookup memories, counters and rewrite block enable a user to customize each microchip within the system to particular packet environments, data analysis needs, packet processing functions, and other functions as desired. Further, the same microchip is able to be reprogrammed for other purposes and/or optimizations dynamically.
    Type: Application
    Filed: October 10, 2023
    Publication date: February 1, 2024
    Inventors: Guy Townsend Hutchison, Sachin Ramesh Gandhi, Tsahi Daniel, Gerald Schmidt, Albert Fishman, Martin Leslie White, Zubin Shah
  • Patent number: 11824796
    Abstract: A software-defined network (SDN) system, device and method comprise one or more input ports, a programmable parser, a plurality of programmable lookup and decision engines (LDEs), programmable lookup memories, programmable counters, a programmable rewrite block and one or more output ports. The programmability of the parser, LDEs, lookup memories, counters and rewrite block enable a user to customize each microchip within the system to particular packet environments, data analysis needs, packet processing functions, and other functions as desired. Further, the same microchip is able to be reprogrammed for other purposes and/or optimizations dynamically.
    Type: Grant
    Filed: August 13, 2020
    Date of Patent: November 21, 2023
    Assignee: MARVELL ASIA PTE, LTD.
    Inventors: Guy Townsend Hutchison, Sachin Ramesh Gandhi, Tsahi Daniel, Gerald Schmidt, Albert Fishman, Martin Leslie White, Zubin Shah
  • Patent number: 11184177
    Abstract: A method and system for securing in-vehicle ethernet links are disclosed. According to one embodiment, a method comprises receiving from an authenticator, via an insecure channel, a public key of the authenticator, a random number, and a challenge. A private key of the peer that was supplied to the peer is accessed from local storage at the peer. A state machine computes a session key for the peer, based on the random number, the public key of the authenticator, and the private key of the peer. The state machine computes a peer response to the challenge using the session key for the peer and a symmetric cipher function.
    Type: Grant
    Filed: August 6, 2019
    Date of Patent: November 23, 2021
    Assignee: SYNAPTICS INCORPORATED
    Inventors: Guy Hutchison, Zubin Shah, Kamal Dalmia
  • Publication number: 20200374240
    Abstract: A software-defined network (SDN) system, device and method comprise one or more input ports, a programmable parser, a plurality of programmable lookup and decision engines (LDEs), programmable lookup memories, programmable counters, a programmable rewrite block and one or more output ports. The programmability of the parser, LDEs, lookup memories, counters and rewrite block enable a user to customize each microchip within the system to particular packet environments, data analysis needs, packet processing functions, and other functions as desired. Further, the same microchip is able to be reprogrammed for other purposes and/or optimizations dynamically.
    Type: Application
    Filed: August 13, 2020
    Publication date: November 26, 2020
    Inventors: Guy Townsend Hutchison, Sachin Ramesh Gandhi, Tsahi Daniel, Gerald Schmidt, Albert Fishman, Martin Leslie White, Zubin Shah
  • Patent number: 10785169
    Abstract: A software-defined network (SDN) system, device and method comprise one or more input ports, a programmable parser, a plurality of programmable lookup and decision engines (LDEs), programmable lookup memories, programmable counters, a programmable rewrite block and one or more output ports. The programmability of the parser, LDEs, lookup memories, counters and rewrite block enable a user to customize each microchip within the system to particular packet environments, data analysis needs, packet processing functions, and other functions as desired. Further, the same microchip is able to be reprogrammed for other purposes and/or optimizations dynamically.
    Type: Grant
    Filed: October 18, 2017
    Date of Patent: September 22, 2020
    Assignee: MARVELL ASIA PTE, LTD.
    Inventors: Guy Townsend Hutchison, Sachin Ramesh Gandhi, Tsahi Daniel, Gerald Schmidt, Albert Fishman, Martin Leslie White, Zubin Shah
  • Publication number: 20200092113
    Abstract: A method and system for securing in-vehicle ethernet links are disclosed. According to one embodiment, a method comprises receiving from an authenticator, via an insecure channel, a public key of the authenticator, a random number, and a challenge. A private key of the peer that was supplied to the peer is accessed from local storage at the peer. A state machine computes a session key for the peer, based on the random number, the public key of the authenticator, and the private key of the peer. The state machine computes a peer response to the challenge using the session key for the peer and a symmetric cipher function.
    Type: Application
    Filed: August 6, 2019
    Publication date: March 19, 2020
    Applicant: SYNAPTICS INCORPORATED
    Inventors: Guy Hutchison, Zubin Shah, Kamal Dalmia
  • Patent number: 9948482
    Abstract: A network switch to support flexible lookup key generation comprises a control CPU configured to run a network switch control stack. The network switch control stacks is configured to manage and control operations of a switching logic circuitry, provide a flexible key having a plurality of possible fields that constitute part of a lookup key to a table, and enable a user to dynamically select at deployment or runtime a subset of the fields in the flexible key to form the lookup key and thus define a lookup key format for the table. The switching logic circuitry provisioned and controlled by the network switch control stack is configured to maintain said table to be searched via the lookup key in a memory cluster and process a received data packet based on search result of the table using the lookup key generated from the dynamically selected fields in the flexible key.
    Type: Grant
    Filed: April 27, 2016
    Date of Patent: April 17, 2018
    Assignee: CAVIUM, INC.
    Inventors: Leonid Livak, Ravindran Suresh, Zubin Shah, Sunita Bhaskaran, Ashwini Reddy
  • Publication number: 20180041450
    Abstract: A software-defined network (SDN) system, device and method comprise one or more input ports, a programmable parser, a plurality of programmable lookup and decision engines (LDEs), programmable lookup memories, programmable counters, a programmable rewrite block and one or more output ports. The programmability of the parser, LDEs, lookup memories, counters and rewrite block enable a user to customize each microchip within the system to particular packet environments, data analysis needs, packet processing functions, and other functions as desired. Further, the same microchip is able to be reprogrammed for other purposes and/or optimizations dynamically.
    Type: Application
    Filed: October 18, 2017
    Publication date: February 8, 2018
    Inventors: Guy Townsend Hutchison, Sachin Ramesh Gandhi, Tsahi Daniel, Gerald Schmidt, Albert Fishman, Martin Leslie White, Zubin Shah
  • Patent number: 9825884
    Abstract: A software-defined network (SDN) system, device and method comprise one or more input ports, a programmable parser, a plurality of programmable lookup and decision engines (LDEs), programmable lookup memories, programmable counters, a programmable rewrite block and one or more output ports. The programmability of the parser, LDEs, lookup memories, counters and rewrite block enable a user to customize each microchip within the system to particular packet environments, data analysis needs, packet processing functions, and other functions as desired. Further, the same microchip is able to be reprogrammed for other purposes and/or optimizations dynamically.
    Type: Grant
    Filed: March 10, 2016
    Date of Patent: November 21, 2017
    Assignee: Cavium, Inc.
    Inventors: Guy Townsend Hutchison, Sachin Gandhi, Tsahi Daniel, Gerald Schmidt, Albert Fishman, Martin Leslie White, Zubin Shah
  • Publication number: 20170317922
    Abstract: A network switch to support flexible lookup key generation comprises a control CPU configured to run a network switch control stack. The network switch control stacks is configured to manage and control operations of a switching logic circuitry, provide a flexible key having a plurality of possible fields that constitute part of a lookup key to a table, and enable a user to dynamically select at deployment or runtime a subset of the fields in the flexible key to form the lookup key and thus define a lookup key format for the table. The switching logic circuitry provisioned and controlled by the network switch control stack is configured to maintain said table to be searched via the lookup key in a memory cluster and process a received data packet based on search result of the table using the lookup key generated from the dynamically selected fields in the flexible key.
    Type: Application
    Filed: April 27, 2016
    Publication date: November 2, 2017
    Inventors: Leonid Livak, Ravindran Suresh, Zubin Shah, Sunita Bhaskaran, Ashwini Reddy
  • Patent number: 9729447
    Abstract: A network switch includes a memory configurable to store alternate table representations of an individual trie in a hierarchy of tries. A prefix table processor accesses in parallel, using an input network address, the alternate table representations of the individual trie and searches for a longest prefix match in each alternate table representation to obtain local prefix matches. The longest prefix match from the local prefix matches is selected. The longest prefix match has an associated next hop index base address and offset value. A next hop index processor accesses a next hop index table in the memory utilizing the next hop index base address and offset value to obtain a next hop table pointer. A next hop processor accesses a next hop table in the memory using the next hop table pointer to obtain a destination network address.
    Type: Grant
    Filed: April 27, 2016
    Date of Patent: August 8, 2017
    Assignee: Cavium, Inc.
    Inventors: Weihuang Wang, Mohan Balan, Nimalan Siva, Zubin Shah
  • Publication number: 20160241473
    Abstract: A network switch includes a memory configurable to store alternate table representations of an individual trie in a hierarchy of tries. A prefix table processor accesses in parallel, using an input network address, the alternate table representations of the individual trie and searches for a longest prefix match in each alternate table representation to obtain local prefix matches. The longest prefix match from the local prefix matches is selected. The longest prefix match has an associated next hop index base address and offset value. A next hop index processor accesses a next hop index table in the memory utilizing the next hop index base address and offset value to obtain a next hop table pointer. A next hop processor accesses a next hop table in the memory using the next hop table pointer to obtain a destination network address.
    Type: Application
    Filed: April 27, 2016
    Publication date: August 18, 2016
    Applicant: Xpliant, Inc.
    Inventors: Weihuang Wang, Mohan Balan, Nimalan Siva, Zubin Shah
  • Publication number: 20160197852
    Abstract: A software-defined network (SDN) system, device and method comprise one or more input ports, a programmable parser, a plurality of programmable lookup and decision engines (LDEs), programmable lookup memories, programmable counters, a programmable rewrite block and one or more output ports. The programmability of the parser, LDEs, lookup memories, counters and rewrite block enable a user to customize each microchip within the system to particular packet environments, data analysis needs, packet processing functions, and other functions as desired. Further, the same microchip is able to be reprogrammed for other purposes and/or optimizations dynamically.
    Type: Application
    Filed: March 10, 2016
    Publication date: July 7, 2016
    Inventors: Guy Townsend Hutchison, Sachin Gandhi, Tsahi Daniel, Gerald Schmidt, Albert Fishman, Martin Leslie White, Zubin Shah
  • Patent number: 9331942
    Abstract: A network switch includes a memory configurable to store alternate table representations of an individual trie in a hierarchy of tries. A prefix table processor accesses in parallel, using an input network address, the alternate table representations of the individual trie and searches for a longest prefix match in each alternate table representation to obtain local prefix matches. The longest prefix match from the local prefix matches is selected. The longest prefix match has an associated next hop index base address and offset value. A next hop index processor accesses a next hop index table in the memory utilizing the next hop index base address and offset value to obtain a next hop table pointer. A next hop processor accesses a next hop table in the memory using the next hop table pointer to obtain a destination network address.
    Type: Grant
    Filed: February 28, 2014
    Date of Patent: May 3, 2016
    Assignee: Xpliant, Inc.
    Inventors: Weihuang Wang, Mohan Balan, Nimalan Siva, Zubin Shah
  • Publication number: 20140269723
    Abstract: A network switch includes a memory configurable to store alternate table representations of an individual trie in a hierarchy of tries. A prefix table processor accesses in parallel, using an input network address, the alternate table representations of the individual trie and searches for a longest prefix match in each alternate table representation to obtain local prefix matches. The longest prefix match from the local prefix matches is selected. The longest prefix match has an associated next hop index base address and offset value. A next hop index processor accesses a next hop index table in the memory utilizing the next hop index base address and offset value to obtain a next hop table pointer. A next hop processor accesses a next hop table in the memory using the next hop table pointer to obtain a destination network address.
    Type: Application
    Filed: February 28, 2014
    Publication date: September 18, 2014
    Applicant: XPLIANT, INC.
    Inventors: Weihuang Wang, Mohan Balan, Nimalan Siva, Zubin Shah