Patents by Inventor Zulal TEZCAN

Zulal TEZCAN has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11973172
    Abstract: A method includes transferring a first subset of the first LEDs from a first substrate to a first backplane to form first subpixels in pixel regions, transferring a first subset of the second LEDs to a second backplane and separating the first subset of the second LEDs from a second substrate to leave first vacancies on the second substrate, forming an additional electrically conductive material on a second subset of second LEDs located on the second substrate after transferring the first subset of the second LEDs to the second backplane, positioning the second substrate over the first backplane, such that the first subpixels are disposed in the first vacancies, and transferring the second subset of the second LEDs to a second subset of bonding structures on the first backplane to form second subpixels in the pixel regions, while a gap exists between the first subpixels and the second substrate.
    Type: Grant
    Filed: May 11, 2021
    Date of Patent: April 30, 2024
    Assignee: GLO TECHNOLOGIES LLC
    Inventors: Saket Chadda, Anusha Pokhriyal, Zulal Tezcan Ozel
  • Patent number: 11417794
    Abstract: A growth mask layer is formed over a semiconductor material layer on a substrate. Optionally, a patterned hard mask layer can be formed over the growth mask layer. A nano-imprint lithography (NIL) resist layer is applied, and is imprinted with a pattern of recesses by stamping. The pattern in the NIL resist layer through the growth mask layer to provide a patterned growth mask layer with clusters of openings therein. If a patterned hard mask layer is employed, the patterned hard mask can prevent transfer of the pattern in the area covered by the patterned hard mask layer. Semiconductor material portions, such as nanowires can be formed in a cluster configuration through the clusters of openings in the patterned growth mask layer. Alignment marks can be formed concurrently with formation of semiconductor material portions by employing nano-imprint lithography.
    Type: Grant
    Filed: August 14, 2018
    Date of Patent: August 16, 2022
    Assignee: NANOSYS, INC.
    Inventors: Zulal Tezcan Ozel, Tsun Lau, Benjamin Leung, Fariba Danesh
  • Patent number: 11257983
    Abstract: A light emitting device, such as an LED, is formed by forming a plurality of semiconductor nanostructures having a doping of a first conductivity type through, and over, a growth mask layer overlying a doped compound semiconductor layer. Each of the plurality of semiconductor nanostructures includes a nanofrustum including a bottom surface, a top surface, tapered planar sidewalls, and a height that is less than a maximum lateral dimension of the top surface, and a pillar portion contacting the bottom surface of the nanofrustum and located within a respective one of the openings through the growth mask layer. A plurality of active regions on the nanofrustums. A second conductivity type semiconductor material layer is formed on each of the plurality of active regions.
    Type: Grant
    Filed: April 10, 2019
    Date of Patent: February 22, 2022
    Assignee: NANOSYS, INC.
    Inventors: Richard P. Schneider, Jr., Benjamin Leung, Fariba Danesh, Zulal Tezcan Ozel, Miao-Chan Tsai
  • Publication number: 20210359186
    Abstract: A method includes transferring a first subset of the first LEDs from a first substrate to a first backplane to form first subpixels in pixel regions, transferring a first subset of the second LEDs to a second backplane and separating the first subset of the second LEDs from a second substrate to leave first vacancies on the second substrate, forming an additional electrically conductive material on a second subset of second LEDs located on the second substrate after transferring the first subset of the second LEDs to the second backplane, positioning the second substrate over the first backplane, such that the first subpixels are disposed in the first vacancies, and transferring the second subset of the second LEDs to a second subset of bonding structures on the first backplane to form second subpixels in the pixel regions, while a gap exists between the first subpixels and the second substrate.
    Type: Application
    Filed: May 11, 2021
    Publication date: November 18, 2021
    Inventors: Saket CHADDA, Anusha POKHRIYAL, Zulal Tezcan OZEL
  • Publication number: 20210202789
    Abstract: A growth mask layer is formed over a semiconductor material layer on a substrate. Optionally, a patterned hard mask layer can be formed over the growth mask layer. A nano-imprint lithography (NIL) resist layer is applied, and is imprinted with a pattern of recesses by stamping. The pattern in the NIL resist layer through the growth mask layer to provide a patterned growth mask layer with clusters of openings therein. If a patterned hard mask layer is employed, the patterned hard mask can prevent transfer of the pattern in the area covered by the patterned hard mask layer. Semiconductor material portions, such as nanowires can be formed in a cluster configuration through the clusters of openings in the patterned growth mask layer. Alignment marks can be formed concurrently with formation of semiconductor material portions by employing nano-imprint lithography.
    Type: Application
    Filed: August 14, 2018
    Publication date: July 1, 2021
    Inventors: Zulal TEZCAN, Tsun LAU, Benjamin LEUNG, Fariba DANESH
  • Publication number: 20200274029
    Abstract: A light emitting device, such as an LED, is formed by forming a plurality of semiconductor nanostructures having a doping of a first conductivity type through, and over, a growth mask layer overlying a doped compound semiconductor layer. Each of the plurality of semiconductor nanostructures includes a nanofrustum including a bottom surface, a top surface, tapered planar sidewalls, and a height that is less than a maximum lateral dimension of the top surface, and a pillar portion contacting the bottom surface of the nanofrustum and located within a respective one of the openings through the growth mask layer. A plurality of active regions on the nanofrustums. A second conductivity type semiconductor material layer is formed on each of the plurality of active regions.
    Type: Application
    Filed: April 10, 2019
    Publication date: August 27, 2020
    Inventors: Richard P. Schneider, JR., Benjamin Leung, Fariba Danesh, Zulal Tezcan Ozel, Miao-Chan Tsai
  • Patent number: 10707374
    Abstract: A method of forming a light emitting device includes forming a growth mask layer including openings on a doped compound semiconductor layer, forming first light emitting diode (LED) subpixels by forming a plurality of active regions and second conductivity type semiconductor material layers employing selective epitaxy processes, and transferring each first LED subpixel to a backplane. An anode contact electrode may be formed on the second conductivity type semiconductor material layers for redundancy. The doped compound semiconductor layer may be patterned with tapered sidewalls to enhance etendue. An optically clear encapsulation matrix may be formed on the doped compound semiconductor material layer to enhance etendue. Lift-off processes may be employed for the active regions. Cracking of the LEDs may be suppressed employing a thick reflector layer.
    Type: Grant
    Filed: September 6, 2018
    Date of Patent: July 7, 2020
    Assignee: GLO AB
    Inventors: Fariba Danesh, Benjamin Leung, Tsun Lau, Zulal Tezcan, Miao-Chan Tsai, Max Batres, Michael Joseph Cich
  • Publication number: 20190088820
    Abstract: A method of forming a light emitting device includes forming a growth mask layer including openings on a doped compound semiconductor layer, forming first light emitting diode (LED) subpixels by forming a plurality of active regions and second conductivity type semiconductor material layers employing selective epitaxy processes, and transferring each first LED subpixel to a backplane. An anode contact electrode may be formed on the second conductivity type semiconductor material layers for redundancy. The doped compound semiconductor layer may be patterned with tapered sidewalls to enhance etendue. An optically clear encapsulation matrix may be formed on the doped compound semiconductor material layer to enhance etendue. Lift-off processes may be employed for the active regions. Cracking of the LEDs may be suppressed employing a thick reflector layer.
    Type: Application
    Filed: September 6, 2018
    Publication date: March 21, 2019
    Inventors: Fariba DANESH, Benjamin LEUNG, Tsun LAU, Zulal TEZCAN, Miao-Chan TSAI, Max BATRES, Michael Joseph CICH