Abstract: A voltage reference circuit includes a first enhancement-mode PMOS transistor, a first enhancement mode NMOS transistor, and a first depletion-mode PMOS transistor coupled in series between a voltage supply and a ground. A second depletion-mode PMOS transistor is coupled to the first enhancement PMOS transistor to form a feedback circuit. A first resistive device is coupled between the voltage supply and the second depletion-mode PMOS transistor, and a second resistive device is coupled between the second depletion-mode PMOS transistor and the ground. A bias circuit is coupled to a gate of the first enhancement-mode NMOS transistor. The first enhancement-mode PMOS transistor and the first depletion-mode PMOS transistor are configured to operate in saturation region. A first reference voltage across the first resistor and a second reference voltage across the second resistor are configured to be independent of the magnitude of the voltage supply and have low temperature drift.

Abstract: A voltage reference circuit includes a first enhancement-mode PMOS transistor, a first enhancement mode NMOS transistor, and a first depletion-mode PMOS transistor coupled in series between a voltage supply and a ground. A second depletion-mode PMOS transistor is coupled to the first enhancement PMOS transistor to form a feedback circuit. A first resistive device is coupled between the voltage supply and the second depletion-mode PMOS transistor, and a second resistive device is coupled between the second depletion-mode PMOS transistor and the ground. A bias circuit is coupled to a gate of the first enhancement-mode NMOS transistor. The first enhancement-mode PMOS transistor and the first depletion-mode PMOS transistor are configured to operate in saturation region. A first reference voltage across the first resistor and a second reference voltage across the second resistor are configured to be independent of the magnitude of the voltage supply and have low temperature drift.

Abstract: The present invention relates to a battery charge/discharge protection circuit that protects an associated battery from charge/discharge damage. The charge/discharge protection circuit includes a first terminal, a second terminal, a charge over-current detection circuit, a discharge over-current detection circuit, a short circuit detection circuit, and a PMOS transistor. A drain electrode and a gate electrode of the PMOS transistor are connected to the first terminal and the second terminal respectively. A source electrode of the PMOS transistor is connected to the charge over-current detection circuit, the discharge over-current detection circuit and the short circuit detection circuit, such that when a voltage above an overvoltage threshold is supported by the charger, the voltage of the source electrode of the PMOS transistor is maintained above a negative threshold voltage and the elements in these circuits do not receive such a voltage output by the charger.

Abstract: The present invention relates to a parallel light emitting diode (“LED”) drive circuit and provides a drive circuit configured to drive a parallel array of LEDs. The drive circuit comprises: a plurality of switches, a plurality of sampling resistors, and a plurality of chopper amplifiers. Each switch is coupled to a respective LED in the LED array. Each chopper operational amplifier configured to receive a reference voltage and a switching control signal and generate an input offset voltage. Each chopper operational amplifier includes a differential amplifier including an input transistor pair and a current mirror transistor pair, of which the electrical positions can be reserved when the switching control signal is switched between a first state and a second state, wherein the offset voltage, which causes the lightness mismatching in a parallel LED circuit, can be cancelled.

Abstract: The present invention relates to a parallel light emitting diode (“LED”) drive circuit and provides a drive circuit configured to drive a parallel array of LEDs. The drive circuit comprises: a switching control signal generator, a plurality of switches, a plurality of sampling resistors, and a plurality of chopper amplifiers. Each switch is coupled to a respective LED in the LED array. Each chopper operational amplifier configured to receive a reference voltage and a switching control signal generated by the switching control signal generator and generate an input offset voltage. Each chopper operational amplifier includes a differential amplifier including an input transistor pair and a current mirror transistor pair, of which the electrical positions can be reserved when the switching control signal is switched between a first state and a second state, wherein the offset voltage, which causes the lightness mismatching in a parallel LED circuit, can be cancelled.

Abstract: The present invention relates to a parallel light emitting diode (“LED”) drive circuit and provides a drive circuit configured to drive a parallel array of LEDs. The drive circuit comprises: a switching control signal generator, a plurality of switches, a plurality of sampling resistors, and a plurality of chopper amplifiers. Each switch is coupled to a respective LED in the LED array. Each chopper operational amplifier configured to receive a reference voltage and a switching control signal generated by the switching control signal generator and generate an input offset voltage. Each chopper operational amplifier includes a differential amplifier including an input transistor pair and a current mirror transistor pair, of which the electrical positions can be reserved when the switching control signal is switched between a first state and a second state, wherein the offset voltage, which causes the lightness mismatching in a parallel LED circuit, can be cancelled.

Abstract: The present invention relates to a battery charge/discharge protection circuit that protects an associated battery from charge/discharge damage. The charge/discharge protection circuit includes a first terminal, a second terminal, a charge over-current detection circuit, a discharge over-current detection circuit, a short circuit detection circuit, and a PMOS transistor. A drain electrode and a gate electrode of the PMOS transistor are connected to the first terminal and the second terminal respectively. A source electrode of the PMOS transistor is connected to the charge over-current detection circuit, the discharge over-current detection circuit and the short circuit detection circuit, such that when a voltage above an overvoltage threshold is supported by the charger, the voltage of the source electrode of the PMOS transistor is maintained above a negative threshold voltage and the elements in these circuits do not receive such a voltage output by the charger.

Abstract: The present invention relates to a parallel light emitting diode (“LED”) drive circuit and provides a drive circuit configured to drive a parallel array of LEDs. The drive circuit comprises: a switching control signal generator, a plurality of switches, a plurality of sampling resistors, and a plurality of chopper amplifiers. Each switch is coupled to a respective LED in the LED array. Each chopper operational amplifier configured to receive a reference voltage and a switching control signal generated by the switching control signal generator and generate an input offset voltage. Each chopper operational amplifier includes a differential amplifier including an input transistor pair and a current mirror transistor pair, of which the electrical positions can be reserved when the switching control signal is switched between a first state and a second state, wherein the offset voltage, which causes the lightness mismatching in a parallel LED circuit, can be cancelled.

Abstract: The present invention relates to a parallel light emitting diode (“LED”) drive circuit and provides a drive circuit configured to drive a parallel array of LEDs. The drive circuit comprises: a plurality of switches, a plurality of sampling resistors, and a plurality of chopper amplifiers. Each switch is coupled to a respective LED in the LED array. Each chopper operational amplifier configured to receive a reference voltage and a switching control signal and generate an input offset voltage. Each chopper operational amplifier includes a differential amplifier including an input transistor pair and a current mirror transistor pair, of which the electrical positions can be reserved when the switching control signal is switched between a first state and a second state, wherein the offset voltage, which causes the lightness mismatching in a parallel LED circuit, can be cancelled.