Abstract: A display panel is provided and includes a first data line and a first signal line which are disposed at a display area, a second data line and a second signal line which are disposed at a non-display area. A portion of the second data lines, a portion of the second signal lines, and the first data line or the first signal line are all on a same film layer structure of the display panel.

Abstract: The present disclosure provides an array substrate and a liquid crystal display panel. The array substrate, including a display area and a non-display area, comprises: a substrate; a patterned first metal layer disposed on the substrate, wherein the first metal layer in the non-display area includes at least two first metal lines; an insulating layer disposed on the first metal layer; and a patterned second metal layer disposed on the insulating layer, wherein the second metal layer in the non-display area includes at least two second metal lines; wherein the first metal lines and the second metal lines surround the display area and connect to each other through a through-hole in the insulating layer, and at least one of the first metal lines or the second metal lines electrically connects to a ground line of the array substrate.

Abstract: A display panel and a display device are provided. The display panel includes a display area configured to display an image and a dummy pixel area disposed outside of the display area. The dummy pixel area has a plurality of dummy pixels disposed therein. Each dummy pixel includes a pixel protection unit. The dummy pixels are defined by crisscrossing data metal lines and gate metal lines in a vertical direction and a horizontal direction, respectively. A pattern of a projection of a semiconductor layer on the horizontal plane intersects the corresponding data metal line, is separated from the corresponding gate metal line, and is disposed toward a center of each dummy pixel, to prevent the display device from poor display due to contact between the semiconductor layer and the gate metal lines in the dummy pixel area when electrostatic discharge occurs.

Abstract: A display panel is provided and includes a first data line and a first signal line which are disposed at a display area, a second data line and a second signal line which are disposed at a non-display area. A portion of the second data lines, a portion of the second signal lines, and the first data line or the first signal line are all on a same film layer structure of the display panel.

Abstract: The present disclosure provides an array substrate and a liquid crystal display panel. The array substrate, including a display area and a non-display area, comprises: a substrate; a patterned first metal layer disposed on the substrate, wherein the first metal layer in the non-display area includes at least two first metal lines; an insulating layer disposed on the first metal layer; and a patterned second metal layer disposed on the insulating layer, wherein the second metal layer in the non-display area includes at least two second metal lines; wherein the first metal lines and the second metal lines surround the display area and connect to each other through a through-hole in the insulating layer, and at least one of the first metal lines or the second metal lines electrically connects to a ground line of the array substrate.

Abstract: A display panel and a display device are provided. The display panel includes a display area configured to display an image and a dummy pixel area disposed outside of the display area. The dummy pixel area has a plurality of dummy pixels disposed therein. Each dummy pixel includes a pixel protection unit. The dummy pixels are defined by crisscrossing data metal lines and gate metal lines in a vertical direction and a horizontal direction, respectively. A pattern of a projection of a semiconductor layer on the horizontal plane intersects the corresponding data metal line, is separated from the corresponding gate metal line, and is disposed toward a center of each dummy pixel, to prevent the display device from poor display due to contact between the semiconductor layer and the gate metal lines in the dummy pixel area when electrostatic discharge occurs.

Abstract: An array substrate is provided. The array substrate includes: a substrate; a LTPS TFT disposed above the substrate; a planarization layer covering the LTPS TFT; a via hole formed in the planarization layer, wherein the via hole reveals a drain electrode of the LTPS TFT; multiple common electrodes and receiving electrodes disposed separately on the planarization layer, wherein the multiple common electrode function as a driving electrode in a touch stage, and the multiple common electrodes which are disposed separately are connected with each other; a passivation layer which covers the multiple common electrodes and the multiple receiving electrodes and the planarization layer; and a pixel electrode disposed on the passivation layer, wherein, the pixel electrode is contacted with the drain electrode through the via hole. A manufacturing method for the array substrate is also provided. The present invention can reduce one manufacturing process and decrease production cost.

Abstract: An array substrate is provided. The array substrate includes: a substrate; a LTPS TFT disposed above the substrate; a planarization layer covering the LTPS TFT; a via hole formed in the planarization layer, wherein the via hole reveals a drain electrode of the LTPS TFT; multiple common electrodes and receiving electrodes disposed separately on the planarization layer, wherein the multiple common electrode function as a driving electrode in a touch stage, and the multiple common electrodes which are disposed separately are connected with each other; a passivation layer which covers the multiple common electrodes and the multiple receiving electrodes and the planarization layer; and a pixel electrode disposed on the passivation layer, wherein, the pixel electrode is contacted with the drain electrode through the via hole. A manufacturing method for the array substrate is also provided. The present invention can reduce one manufacturing process and decrease production cost.

Abstract: The present invention discloses a LTPS TFT pixel unit and a manufacture method thereof. The method comprises steps of: providing a substrate and forming a buffer layer on the substrate; forming a semiconductor pattern layer and a first insulative layer on the buffer layer, and the semiconductor pattern layer and the first insulative layer are located in the same layer and heights of the semiconductor pattern layer and the first insulative layer are the same. With the aforesaid arrangement, the present invention can reduce the side effect of the LTPS TFT pixel unit and promote the electrical property thereof.

Abstract: The present invention discloses a LTPS TFT pixel unit and a manufacture method thereof. The method comprises steps of: providing a substrate and forming a buffer layer on the substrate; forming a semiconductor pattern layer and a first insulative layer on the buffer layer, and the semiconductor pattern layer and the first insulative layer are located in the same layer and heights of the semiconductor pattern layer and the first insulative layer are the same. With the aforesaid arrangement, the present invention can reduce the side effect of the LTPS TFT pixel unit and promote the electrical property thereof.