Methods of manufacturing integrated circuit devices that include a metal oxide layer disposed on another layer to protect the other layer from diffusion of impurities and integrated circuit devices manufactured using same
Integrated circuit devices are manufactured by exposing at least a portion of an insulation layer that comprises oxygen to a metal precursor that is reactive with oxygen so as to form a metal oxide layer on the portion of the insulation layer. The metal oxide layer may reduce the diffusion of impurities, such as hydrogen, into the insulation layer, which may degrade the electrical characteristics of the insulation layer.
This application claims the benefit of Korean Patent Application No. 00-35708, filed Jun. 27, 2000, the disclosure of which is hereby incorporated herein by reference.
1. Field of the Invention
The present invention relates generally to methods of manufacturing integrated circuit devices and integrated circuit devices manufactured using same, and, more particularly, to reducing the diffusion of impurities, such as hydrogen, into integrated circuit device layers during manufacturing.
2. Background of the Invention
Ferroelectric capacitors may be used in integrated circuit memory devices. Specifically, non-volatile integrated circuit memory devices often make use of the remnant polarization (Pr) phenomenon of a ferroelectric layer, which corresponds to the concept of a binary memory. Two materials that are commonly used to form ferroelectric layers are PZT(Pb(Zr, Ti)O3) and SBT(SrBi2 Ta2O9).
A potential problem in forming a capacitor dielectric layer using a ferroelectric material is that the ferroelectric characteristic of the material used for the capacitor dielectric layer maybe degraded during additional integration processes, which are performed after the formation of the ferroelectric capacitor. This potential problem is described in more detail hereinafter.
In manufacturing an integrated circuit memory device, the following processes are typically performed after the formation of a capacitor: 1) an InterLayer Dielectric (ILD) process, 2) an InterMetal Dielectric (IMD) process, and 3) a passivation process. During these processes, impurities may be generated, such as hydrogen, which can degrade a capacitor dielectric layer. The generated hydrogen may immediately infiltrate the capacitor dielectric layer during the foregoing processes or the hydrogen may gradually infiltrate the capacitor dielectric layer after the hydrogen has been introduced into an ILD layer, an IMD layer, or a passivation layer. As a result, the Pr of the ferroelectric dielectric layer may decrease.
For example, when an ILD process is used to form a silicon oxide interlayer insulation layer after a ferroelectric capacitor is formed on a semiconductor substrate, the dielectric layer of the capacitor may be degraded. In other words, in the process of forming a silicon oxide interlayer insulation layer using, for example, a plasma enhanced chemical vapor deposition (PECVD) method, silane (SiH4) gas and oxygen (O2) gas may be used. Hydrogen is generated as a by-product of the reaction between the silane gas and the oxygen gas. The generated hydrogen may immediately diffuse into the dielectric layer of the ferroelectric capacitor and degrade the dielectric layer, or may be introduced into an interlayer insulation layer formed from the ILD process and gradually degrade the capacitor dielectric layer. As a result, the Pr value of the capacitor dielectric layer may decrease to an extent that the capacitor dielectric layer may lose its ferroelectric characteristics. Unfortunately, a ferroelectric dielectric layer may be similarly degraded as a result of performing an IMD process for forming an intermetal insulation layer and/or performing a passivation process for forming a passivation layer.
SUMMARY OF THE INVENTIONAccording to embodiments of the present invention, an integrated circuit device is manufactured by exposing at least a portion of an insulation layer that comprises oxygen to a metal precursor that is reactive with oxygen so as to form a metal oxide layer on the portion of the insulation layer. The metal oxide layer may reduce the diffusion of impurities, such as hydrogen, into the insulation layer, which may degrade the electrical characteristics of the insulation layer.
Exposing the portion of the insulation layer to the metal precursor may comprise pulsing the metal precursor over the integrated circuit device for about 0.1 to 2 seconds at a flow rate of about 50 to 300 sccm, and then exposing the integrated circuit device to an inert gas for a duration of about 0.1 to 10 seconds and at a flow rate of about 50 to 300 sccm.
In accordance with further embodiments of the present invention, the integrated circuit device may be thermally treated in an oxygen atmosphere using a rapid thermal processing apparatus or a furnace type thermal processing apparatus. The thermal treatment may be performed at a temperature of about 400 to 600° C. for a duration of about 10 seconds to 10 minutes.
The metal precursor may comprise a gas selected from the following group of gases: TriMethyl Aluminum (TMA), DiMethylAluminum Hydride (DMAH), DiMethylEthylAmine Alane (DMEAA), TriIsoButylAluminum (TIBA), TriEthyl Aluminum (TEA), TaCl5, Ta(OC2H5)4,TiCl4, Ti(OC2H5)4, ZrCl4, HfCl4, Nb(OC2H5)5, Mg(thd)2, Ce(thd)3, and Y(thd)3, wherein thd is given by the following structural formula:
The insulation layer may comprise a capacitor dielectric layer and/or may comprise a material selected from the following group of materials: TiO2, SiO2, Ta2O5, Al2O3, BaTiO3, SrTiO3, (Ba, Sr)TiO3, Bi4Ti3O12, PbTiO3, PZT((Pb, La)(Zr, Ti)O3), and (SrBi2Ta2O9)(SBT).
A second metal oxide layer may be disposed on the insulation layer and the first metal oxide layer to further reduce the diffusion of impurities, such as hydrogen, into the insulation layer due to subsequent integration processing operations.
The second metal oxide layer may be formed by pulsing a second metal precursor over the integrated circuit device, exposing the integrated circuit device to an inert gas, pulsing oxygen gas over the integrated circuit device, and then exposing the integrated circuit device to an inert gas. In accordance with particular embodiments of the present invention, the second metal oxide layer may be denser than the first metal oxide layer.
BRIEF DESCRIPTION OF THE DRAWINGSOther features of the present invention will be more readily understood from the following detailed description of specific embodiments thereof when read in conjunction with the accompanying drawings, in which:
While the invention is susceptible to various modifications and alternative forms, specific embodiments thereof are shown by way of example in the drawings and will herein be described in detail. It should be understood, however, that there is no intent to limit the invention to the particular forms disclosed, but on the contrary, the invention is to cover all modifications, equivalents, and alternatives falling within the spirit and scope of the invention as defined by the claims. Like numbers refer to like elements throughout the description of the figures. It will also be understood that when an element, such as a layer, region, or substrate, is referred to as being “on” another element, it can be directly on the other element or intervening elements may be present. In contrast, when an element is referred to as being “directly on” another element, there are no intervening elements present.
Referring to
The semiconductor substrate S may be prepared by conventional methods. Although not shown, other elements besides the above-mentioned elements may be provided on the semiconductor substrate S. For example, an interface layer may be interposed between the interlayer insulation layer 180 and the lower electrode 100, and between the contact plug 190 and the lower electrode 100. The interface layer may include an adhesive layer and a diffusion-preventing layer, which are sequentially stacked. The adhesive layer may comprise a material layer for enhancing the adhesive strength between the interlayer insulation layer 180 and the diffusion preventing layer, and between the contact plug 190 and the diffusion preventing layer. For example, the adhesive layer may be a transition metal layer (e.g., a Ti layer). The diffusion preventing layer may prevent a material layer formed on the interface layer from reacting with the contact plug 190 during subsequent processing and may also prevent the contact plug 190 from degrading due to the diffusion of oxygen during subsequent processing performed in an oxygen atmosphere. For example, the diffusion-preventing layer may be a nitride layer (e.g., a TiN layer) of a transition metal. In addition, a capping insulation layer comprising a nitride layer may be formed on the surface of the gate electrode 160.
The lower electrode 100 and the upper electrode 120 may each be, for example, a metal layer, a conductive metal oxide layer, or a compound of a metal layer and a metal oxide layer. The metal layer may be, for example, a Pt layer, a Ir layer, a Ru layer, a Rh layer, a Os layer, or a Pd layer. The conductive metal oxide layer may be, for example, a IrO2 layer, a RuO2 layer, a (Ca, Sr)RuO3 layer, or a LaSrCoO3 layer. For example, the lower electrode 100 may be a Pt layer, and the upper electrode 120 may be a double layer in which an IrO2 layer and an Ir layer are sequentially stacked.
The capacitor dielectric layer 110 may be a TiO2 layer, a SiO2 layer, a Ta2O5 layer, a Al2O3 layer, a BaTiO3 layer, a SrTiO3 layer, a (Ba, Sr)TiO3 layer, a Bi4Ti3O12 layer, a PbTiO3 layer, a PZT((Pb, La)(Zr, Ti)O3) layer, a (SrBi2Ta2O9)(SBT) layer, or a compound layer of two or more of the foregoing materials.
Referring now to
An atomic layer deposition process is then performed using a metal precursor gas as a pulsing gas, which is reactive with oxygen, and an inert gas as a purge gas. In more detail, a metal precursor, such as an aluminum precursor, is pulsed over the surface of the semiconductor substrate S. The aluminum precursor may be TriMethyl Aluminum (TMA), DiMethyLAluminum Hydride (DMAH), DiMethylEthylAmine Alane (DMEAA), TriIsoButylAluminum (TIBA), TriEthyl Aluminum (TEA), or a mixture of two or more of the foregoing gases. The pulsing time may be about 0.1-2 seconds and the pulsing flow rate may be about 50-300 sccm. The aluminum precursor is preferably pulsed together with a carrier gas such as argon gas.
Instead of using an aluminum precursor as the metal precursor for the atomic layer deposition process other gases may be used in accordance with embodiments of the present invention. For example, TaCl5 or Ta(OC2H5)4 may be used as a tantalum precursor; TiCl4 or Ti(OC2H5)4 may be used as a titanium precursor; ZrCl4 may be used as a zirconium precursor; HfCl4 may be used as a hafnium precursor; Nb(OC2H5)5 may be used as a niobium precursor; Mg(thd)2 may be used as a magnesium precursor; Ce(thd)3 may be used as a cerium precursor; and Y(thd)3 may be used as a yttrium precursor. The structural formula of “thd” is as follows:
The pulsed aluminum precursor is chemically or physically adsorbed by the surface of the semiconductor substrate S. Because the aluminum precursor is reactive with oxygen, it tends to change into an Al2O3 layer at the adsorption interface when it is adsorbed by a material layer containing oxygen. In particular, the exposed surface of the capacitor dielectric layer 110 may chemically adsorb the aluminum precursor as structural atoms react with the oxygen contained in the capacitor dielectric layer 110. As a result, an Al2O3 layer 200 is selectively formed on the exposed surface of the capacitor dielectric layer 110 at an atomic layer level. If, however, the upper electrode 120 and the lower electrode 100 do not contain oxygen atoms, then the aluminum precursor that is chemically or physically adsorbed by the exposed portions of the upper and lower electrodes 120 and 100 generally does not change into a metal oxide layer. Although not shown, if the upper and/or lower electrodes 120 or 100 include a conductive metal oxide layer, such as an IrO2 layer, an Al2O3 layer may be formed on the exposed portion of the conductive metal oxide layer at an atomic layer level.
After selectively forming the Al2O3 layer 200 exclusively on the capacitor dielectric layer 110 at an atomic layer level by pulsing the aluminum precursor, the surface of the semiconductor substrate S is purged using inert gas. The inert gas may be argon gas, and the purging time and flow rate of the inert gas may be about 0.5-10 seconds and about 50-300 sccm, respectively. When the surface of the semiconductor substrate S is purged with inert gas, the aluminum precursor, which has been physically adsorbed by surfaces of the lower electrode 100 and the upper electrode 120 and has not reacted with the capacitor dielectric layer 110, is substantially discharged from the reaction chamber. The aluminum precursor chemically adsorbed by surfaces of the lower electrode 100 and the upper electrode 120 is generally not purged and mostly remains. In accordance with embodiments of the present invention, however, the purge time and flow rate of the inert gas may be adjusted to substantially remove the metal precursor adsorbed by the surfaces of the upper electrode 120 and the lower electrode 100.
The aluminum precursor pulsing operation and the inert gas purging operation constitute a single cycle of the atomic layer deposition process. The cycle may be repeated until an Al2O3 layer 200′ having a desired thickness is obtained. During succeeding cycles, an aluminum precursor reacts with oxygen atoms contained in the capacitor dielectric layer 110 through diffusion so that the Al2O3 layer 200′ is continuously formed on the capacitor dielectric layer 110 at an atomic layer level. The aluminum precursor is adsorbed by surfaces of the upper electrode 120 and the lower electrode 100, and an Al2O3 layer is generally not formed thereon.
An aluminum precursor usually contains hydrogen atoms. Accordingly, during a process of selectively forming an Al2O3 layer on the capacitor dielectric layer 110, in accordance with embodiments of the present invention, the dielectric characteristics of the capacitor dielectric layer 110 may be degraded. In particular, when the capacitor dielectric layer 110 is formed of a ferroelectric material such as a PZT layer or a SBT layer, the ferroelectric characteristics of the capacitor dielectric layer 110 may be degraded due to diffusion of hydrogen contained in the aluminum precursor. For example, the remnant polarization value of the capacitor dielectric layer 110 may decrease. To improve the ferroelectric characteristics of the capacitor dielectric layer 110 and to enhance the dielectric characteristic, such as the density of the Al2O3 layer, thermal treatment (illustrated by arrows) may be performed in an oxygen atmosphere after the Al2O3 layer is formed on the capacitor dielectric layer 110 to a desired thickness. In accordance with embodiments of the present invention, the thermal treatment may be performed in a rapid thermal processing apparatus or a furnace type thermal processing apparatus. When the thermal treatment is performed in a rapid thermal processing apparatus, the temperature may be about 400-600° C. and the treatment may be performed for about 10 seconds to about 10 minutes.
Referring to
A single cycle for forming the encapsulating layer 210 as an Al2O3 layer may comprise the following operations: 1) pulsing aluminum source gas over the surface of the semiconductor substrate S, 2) purging with inert gas, 3) pulsing oxygen source gas, and 4) purging with inert gas. The cycle is repeated until the encapsulating layer 210 reaches a desired thickness. One of the aluminum precursors discussed above may be used as the aluminum source gas. H2O gas, O3 gas or N2O gas may be used as the oxygen source gas. Argon gas may be used as the inert gas.
In accordance with embodiments of the present invention, when TMA gas, H2O gas, and argon gas are used as the aluminum source gas, the oxygen source gas, and the inert gas, respectively, the pulsing time of the TMA gas may be about 0.1-2 seconds, the pulsing time of the H2O gas may be about 0.1-2 seconds, the purging time and flow rate of the argon gas may be about 1-10 seconds and about 50-300 sccm, respectively, and the temperature of the semiconductor substrate S may be about 300° C.
In accordance with embodiments of the present invention discussed hereinabove, an Al2O3 layer is selectively formed on a capacitor dielectric layer 110 that may reduce diffusion of impurities into the dielectric layer 110. The layer 200′ and the encapsulating layer 210 may comprise Ta, Ti, Zr, Mg, Ce, Y, Nb, Hf, Sr, or Ca. In this case, a metal precursor containing Ta, Ti, Zr, Mg, Ce, Y, Nb, Hf, Sr or Ca may be used in the aluminum precursor pulsing operation of the first embodiment.
With reference to
Subsequently, a metal oxide layer 250 (e.g., an Al2O3 layer) is selectively formed on the exposed surface of the interlayer insulation layer 230 using atomic layer deposition as discussed hereinabove with respect to
When the metal oxide layer 250 is selectively formed exclusively on the exposed surface of the interlayer insulation layer 230, the metal oxide layer 250 can inhibit substances that can degrade a semiconductor device by diffusing to structures below the metal oxide layer 250 during subsequent processes of forming material layer(s) on the interlayer insulation layer 230. Examples of integrated circuit devices formed in accordance with embodiments of the present invention are described hereafter.
EXAMPLE 1 A capacitor, in which a Pt layer (a lower electrode), a PZT layer (a capacitor dielectric layer), and an Ir/IrO2 layer (an upper electrode) were sequentially stacked, was formed on a semiconductor substrate. Thereafter, the semiconductor substrate was loaded in an atomic layer deposition apparatus, and a stabilizing step was performed such that the pressure of a chamber was maintained at about 0.1-1 torr, and the temperature of the semiconductor substrate was maintained at about 300° C. Next, an atomic layer deposition process cycle, as discussed above with respect to
A capacitor pattern was formed on a semiconductor substrate as discussed hereinabove with respect to
Sample 1
In step A1, an Al2O3 layer was selectively formed on a capacitor dielectric layer as discussed hereinabove with respect to
Sample 2
In step B1, a semiconductor substrate including a capacitor disposed thereon was loaded in a rapid thermal processing apparatus and thermally treated. The process conditions of step B1 were the same as those of step A2. Thereafter, in step B2, an Al2O3 layer was formed that encapsulates the capacitor. The process conditions of step B2 were the same as those of step A3.
Referring now to
The remnant polarization value of the capacitor dielectric layer in Sample 2 increases over the initial value after performing a rapid thermal process in an oxygen atmosphere in step B1. The remnant polarization value greatly decreases with respect to Sample 1, however, after encapsulating the capacitor in step B2.
Sample 1 is different from Sample 2 in that it has a selectively formed metal oxide layer that has been thermal-treated in an oxygen atmosphere. In contrast with Sample 2, the remnant polarization value in Sample 1 did not decrease even though Sample 1 had undergone Step A3 in which hydrogen-base gas was supplied. This suggests that the thermal-treated metal oxide layer effectively reduced the diffusion of hydrogen into the capacitor dielectric layer. Accordingly, the thermal-treated metal oxide layer may reduce diffusion of hydrogen into the capacitor dielectric layer in subsequent ILD, IMD, and passivation processes.
Although the invention has been described with reference to exemplary embodiments, it will be apparent to one of ordinary skill in the art that modifications of the described embodiments may be made without departing from the spirit and scope of the invention. For example, principles of the present invention may be applied when selectively forming a metal oxide layer exclusively on the exposed surface of a gate oxide layer in a gate electrode pattern.
According to embodiments of the present invention, a metal oxide layer may be selectively formed exclusively on an insulation layer containing oxygen. In particular, by encapsulating a capacitor of a semiconductor memory device using an atomic layer deposition method, in accordance with embodiments of the present invention, the degradation of a capacitor dielectric layer may be reduced, even if a source gas containing hydrogen is used. In addition, degradation of a capacitor dielectric layer due to diffusion of hydrogen during an ILD process, an IMD process, or a passivation process, which are performed after encapsulating the capacitor, may be effectively reduced.
In concluding the detailed description, it should be noted that many variations and modifications can be made to the preferred embodiments without substantially departing from the principles of the present invention. All such variations and modifications are intended to be included herein within the scope of the present invention, as set forth in the following claims.
Claims
1-13. (Canceled)
14. An integrated circuit device, comprising:
- a capacitor that comprises a lower electrode layer, a dielectric layer on the lower electrode layer, and an upper electrode layer on the dielectric layer;
- a first metal oxide layer that is disposed on an exposed portion of the dielectric layer and has a first density associated therewith; and
- a second metal oxide layer that encapsulates the capacitor and the first metal oxide layer and has a second density associated therewith that is greater than the first density.
15. The integrated circuit device of claim 14, wherein the first and second metal oxide layers each comprise an element selected from the group of elements consisting of: Al, Ta, Ti, Zr, Mg, Ce, Y, Nb, Hf, Sr, and Ca.
16. The integrated circuit device of claim 14, wherein the dielectric layer comprises a material selected from the group of materials consisting of: TiO2, SiO2, Ta2O5, Al2O3, BaTiO3, SrTiO3, (Ba, Sr)TiO3, Bi4Ti3O12, PbTiO3, PZT((Pb, La)(Zr, Ti)O3), and (SrBi2Ta2O9)(SBT).
17. The integrated circuit device of claim 14, wherein the first metal oxide layer is disposed on a sidewall of the dielectric layer and a portion of a surface of the dielectric layer that is adjacent to the upper electrode.
18. A method of manufacturing an integrated circuit device, comprising:
- forming an insulation layer that comprises oxygen on a substrate; and
- forming a first metal oxide layer on at least a portion of the insulation layer by exposing the at least a portion of the insulation layer to a first metal precursor that is reactive with the oxygen in the insulation layer.
19. The method of claim 18, further comprising:
- forming a lower electrode on the substrate; and
- forming an upper electrode on the insulation layer;
- wherein forming the insulation layer that comprises oxygen on the substrate comprises:
- forming the insulation layer that comprises oxygen on the lower electrode.
20. The method of claim 19, further comprising:
- forming a second metal oxide layer on the substrate that encapsulates the lower electrode, the insulation layer, the first metal oxide layer, and the upper electrode.
21. The method of claim 20, wherein forming the first metal oxide layer comprises:
- pulsing the first metal precursor over the integrated circuit device; and
- exposing the integrated circuit device to an inert gas.
22. The method of claim 21, wherein forming the second metal oxide layer comprises:
- pulsing a second metal precursor over the integrated circuit device;
- exposing the integrated circuit device to an inert gas; then
- pulsing oxygen gas over the integrated circuit device; then
- exposing the integrated circuit device to an inert gas.
23. The method of claim 18, further comprising:
- thermally treating the integrated circuit device in an oxygen atmosphere using one of a rapid thermal processing apparatus and a furnace type thermal processing apparatus.
24. The method of claim 18, further comprising:
- forming a conductive region on the substrate, the insulation layer being disposed on the conductive region and the substrate;
- forming an opening in the insulation layer so as to expose at least a portion of the conductive region; and
- forming the first metal oxide layer on the at least a portion of the insulation layer while maintaining the exposed portion of the conductive region substantially devoid of the first metal oxide layer by exposing the at least a portion of the insulation layer and the exposed portion of the conductive region to the first metal precursor that is reactive with the oxygen in the insulation layer.
Type: Application
Filed: Oct 18, 2004
Publication Date: Apr 7, 2005
Inventor: Hag-ju Cho (Seoul)
Application Number: 10/967,835