Nano-structure and method of fabricating nano-structures

In one embodiment, a method for fabricating a nano-structure includes forming a feature on a substrate, depositing multiple layers of material over the substrate and feature to form a multi-layer stack, depositing a film over the multi-layer stack, removing a portion of the film and the multi-layer stack to expose edges of the layers of material, and removing portions of the layers of material to form trenches at a surface of the nano-structure.

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Description
CROSS-REFERENCE TO RELATED APPLICATION

This application is a continuation-in-part of copending U.S. utility application entitled, “Fabrication and Use of Superlattice,” having Ser. No. 10/817,729, filed Apr. 2, 2004, which is entirely incorporated herein by reference.

BACKGROUND

Although fabrication of structures on a “nano” scale has been practiced for several years, there are still many challenges that are to be overcome to enable manufacture of desired structures.

For instance, problems can be encountered when a nano-structure is formed that includes a plurality layers of material that are to be planarized. Such problems may include, for example, fraying, delamination, erosion, dishing, and rounding.

Desired is a method for forming nano-structures that overcome or reduce such problems.

SUMMARY

In one embodiment, a nano-structure comprises a substrate, a feature formed on the substrate that extends upwardly from a surface of the substrate, layers of material that overlie the substrate surface and at least a portion of the feature, and an exposed surface comprising a top surface of the feature and edges of the layers of material, wherein portions of selected layers of material have been etched away to form trenches adjacent the top surface of the top surface of the feature.

In one embodiment, a method for fabricating a nano-structure comprises forming a feature on a substrate, depositing multiple layers of material over the substrate and feature to form a multi-layer stack, depositing a film over the multi-layer stack, removing a portion of the film and the multi-layer stack to expose edges of the layers of material, and removing portions of the layers of material to form trenches at a surface of the nano-structure.

BRIEF DESCRIPTION OF THE DRAWINGS

The disclosed nano-structure and method can be better understood with reference to the following drawings. The components in the drawings are not necessarily to scale.

FIG. 1 is an end view of an embodiment of a nano-structure in an initial stage of fabrication.

FIG. 2 is a top perspective view of the nano-structure shown in FIG. 1.

FIG. 3 is an end view of the nano-structure of FIG. 1 in a later stage of fabrication.

FIG. 4 is an end view of the nano-structure of FIG. 1 in yet a later stage of fabrication.

FIG. 5 is an end view the nano-structure of FIG. 1 in yet another later stage of fabrication.

FIG. 6 is an end view of an embodiment of a completed nano-structure.

FIG. 7 is a detail view of trenches formed in the nano-structure of FIG. 6.

FIG. 8 is a flow diagram of an embodiment of a method for fabricating a nano-structure.

DETAILED DESCRIPTION

Disclosed is a nano-structure and a method for fabricating nano-structures. According to at least one embodiment of the method, multiple layers of material that overlie a feature that is formed on the surface of a substrate are covered by a sacrificial film that enables planarization of the multiple layers while reducing or preventing one or more of fraying, delamination, erosion, dishing, and rounding.

Referring now in more detail to the drawings, in which like numerals indicate corresponding parts throughout the several views, FIG. 1 illustrates an embodiment of a nano-structure 100 in an initial stage of fabrication. As is indicated in FIG. 1, the nano-structure 100 includes a substrate 102 that, for example, comprises a silicon wafer. Formed on a surface 104 of the substrate 102 is a feature 106 that, in the embodiment shown in FIG. 1, comprises a dielectric bump. The bump 106 can be composed of silicon oxide and can be formed using any one of various fabrication methods. For example, the bump 106 can be formed by depositing a layer of silicon oxide (not shown), and etching the silicon oxide away to leave a bump having the general shape and configuration illustrated in FIG. 1.

In this embodiment, the bump 106 has a trapezoidal cross-section that is defined by a base 108, opposed sides 110, and a top 112. As is apparent from FIG. 1, the base 108 is larger than the top 112, and the opposed sides 110 extend diagonally or obliquely toward each other from the base to the top. As is shown in FIG. 2, the bump 106 is elongated (as compared to the sides 110 and top 112) so as to extend a relatively long distance across the surface 104 of the substrate 102. Although the feature 106 formed on the substrate 102 is described and illustrated as comprising a bump having a trapezoidal cross-section, other configurations and shapes are possible.

As is described above, the nano-structure 100 is constructed on a nano-scale. By way of example, the bump 106 has a height dimension, h, that ranges from approximately 200 nanometers (nm) to approximately 5000 nm, and a width dimension, w, that ranges from approximately 250 nm to 100 microns (μm). In one embodiment, the bump 106 has a height of approximately 2500 nm and a width of approximately 5000 nm.

It is noted that, although the feature has been illustrated and described as a bump, the feature could take substantially any other form including, for example, a step. Moreover, although specific example dimensions have been described, those dimensions are only examples, and the feature could have other dimensions, which may only be limited by the size of the substrate.

Referring next to FIGS. 3-6, various other steps of the fabrication of the nano-structure 100 will be described. Beginning with FIG. 3, multiple overlapping layers 114 of material (e.g., metal) are deposited over the substrate 102 and the bump 106 to form a multi-layered stack 116 of material having opposed comers 118. When more than one type of material is used to form the layers 114, such as two types of material, the layers can alternate between the types of material. For instance, a first layer of gold can be deposited, followed by a layer of tantalum, followed by a further layer of gold, followed by a further layer of tantalum, etc., until a desired number of alternating layers 114 of material have been deposited. Depending on the material, such deposition can be achieved using chemical vapor deposition (CVD), physical vapor deposition (PVD), atomic layer deposition (ALD), or another process. Notably, other types of materials can be used to form the layers 114. Example alternative materials include titanium nitride, silicon, silicon oxide, and metal oxides.

In the embodiment shown in the figures, nine layers 114 of material have been deposited. By way of example, each layer 114 is approximately 10 Angstoms (Å) to approximately 1000 Å thick. For instance, in one embodiment, each layer 114 can be approximately 500 Å thick.

With the structure illustrated in FIG. 3, multiple trenches, which are useful for nano-imprinting (for example), can be formed by planarizing the layers 114 above the bump 106 to yield a bump that has multiple layers of material along both sides of its length. Assuming an alternating arrangement of materials such as that described above, multiple trenches can be formed by etching away one of the materials (i.e., multiple layers of that material), leaving trenches defined by the layers of material that were not etched away. Unfortunately, such planarization often results in one or more of fraying, delamination, erosion, dishing, and rounding using known techniques.

To avoid such problems, a sacrificial or planarizing film 120 of material is deposited over the multiple layers 114 prior to planarization, as is shown in FIG. 4. By way of example, the planarizing film 120 comprises a thick layer of silicon oxide. Examples of other materials that can be used for the planarizing film. 120 include amorphous silicon and spin-on-glass. Regardless of the particular material that is used, the planarizing film 120 has a thickness that will result in a film height that equals or exceeds the height of the multi-layered stack 116 (see FIG. 4). With such a configuration, the low-topography points of the structure 100 are brought above the bump 106 and the multi-layered stack 116 that has been deposited thereon. This enables a non-zero removal rate of the low points to be above the height of the multi-layered stack 116. In some embodiments, the planarizing film 120 has a thickness of approximately 200 nm to approximately 10 μm. For example, the film 120 can be approximately 2.5 micons (μm) thick.

At this point, the planarizing film 120 and the top of the multi-layered stack 116 can be removed. Specifically, as is indicated in FIG. 5, the film 120 and top of the stack 116 are removed, for example using a chemical-mechanical planarization (CMP) process, such that the top portion of the bump 106 is exposed. Alternatively, mechanical or chemical-mechanical polishing can be used to achieve this result. As is indicated in FIG. 5, little or no fraying, delamination, erosion, or dishing has occurred. In addition, the comers 118 of the multi-layered stack 116 are minimized due to the provision of the planarizing film 120.

At this point, multiple trenches can be formed in the new surface 122, and the exposed edges of the stacked layers 114, that results from the planarization process. Referring to FIG. 6, trenches 124 can be formed by etching one or more of the layers 114 of material of the multi-layer stack 116. For instance, in cases in which the stack 116 is composed of alternating materials, one of the materials (and therefore multiple layers 114) can be selectively etched away to produce trenches 124 that are defined by the remaining layers. To cite a specific example, when alternating layers of tantalum and gold are deposited, a portion of the gold layers can be etched away to define the trenches 124. FIG. 7 illustrates such an embodiment in detail. As is shown in that figure, the tantalum layers (Ta) remain intact and extend to the surface 122, while the gold layers (Au) have been etched away to define the trenches 124. As is further shown in the figure, the trenches 124 are defined by side walls 126 (e.g., of tantalum) and bases 128 (e.g., of gold). The trenches 124 have widths equal to the thickness of the layers (in this example gold layers) that have been etched away.

The structure that results from the above-described fabrication is a comb-like structure in which diagonal or oblique trenches 124 are formed in the surface of the nano-structure 100. In particular, multiple parallel, oblique trenches 124 are formed on both sides of the bump 106 such that the trenches are angled toward each other as they are traversed upward from the bases 126 to the surface 122. By way of example, each trench 124 forms an angle, α, of approximately 30 to approximately 90 degrees relative to the surface 122 (see FIG. 7). As is mentioned above, the structure 100 can, for example, be used for nano-imprinting. In such a case, the nano-structure 100 may be considered to be a nano-imprinting structure.

An embodiment of a method for fabricating a nano-structure can be summarized as provided in FIG. 8. Beginning with block 800, a feature, such as a dielectric bump, is formed on a substrate. The feature can be formed by, for instance, depositing a layer of material on top of the substrate, and etching away a portion of the deposited layer. Next, multiple layers of material are deposited over the substrate and feature to form a multi-layer stack, as indicated in block 802. By way of example, two or more different types of materials are deposited in an alternating fashion.

Referring next to block 804, a sacrificial film is deposited over the multi-layer stack such that the height of the film equals or exceeds the height of the multi-layer stack, including the portion of the stack that overlies the feature. Once the film has been deposited, a portion of the film and the stack is removed, as indicated in block 806, for example using a planarization process.

Finally, as is indicated in block 808, portions of various layers of the multi-layer stack are removed to form trenches in a surface that results when the portion of the film and stack are removed (in block 806). By way of example, the portions of the layers can be removed using a selective etching process.

Claims

1. A nano-structure, comprising:

a substrate;
a feature formed on the substrate that extends upwardly from a surface of the substrate;
layers of material that overlie the substrate surface and at least a portion of the feature; and
an exposed surface comprising a top surface of the feature and edges of the layers of material;
wherein portions of selected layers of material have been etched away to form trenches adjacent the top surface of the top surface of the feature.

2. The nano-structure of claim 1, wherein the feature has a trapezoidal cross-section.

3. The nano-structure of claim 1, wherein the feature has a width adjacent the substrate surface of approximately 250 nanometers to approximately 100 microns.

4. The nano-structure of claim 1, wherein the layers of material comprise at least two different types of material.

5. The nano-structure of claim 4, wherein layers of different material are formed in an alternating arrangement.

6. The nano-structure of claim 5, wherein only the layers of one type of material have been etched away to form the trenches.

7. The nano-structure of claim 1, wherein each layer of material has a thickness of approximately 10 Angstroms to approximately 1000 Angstroms.

8. The nano-structure of claim 1, further comprising a planarization film adjacent the edges that overlies a portion of the layers of material.

9. The nano-structure of claim 8, wherein the planarization film is composed of silicon oxide.

10. The nano-structure of claim 1, wherein the trenches comprise opposed side walls and a base.

11. The nano-structure of claim 10, wherein the opposed side walls are formed from a first material and the base is formed of a second material.

12. The nano-structure of claim 1, wherein the trenches are oriented in an oblique direction relative to the exposed surface.

13. The nano-structure of claim 1, wherein the nano-structure is a nano-imprint stamp.

14. A method for fabricating a nano-structure, the method comprising:

forming a feature on a substrate;
depositing multiple layers of material over the substrate and feature to form a multi-layer stack;
depositing a film over the multi-layer stack;
removing a portion of the film and the multi-layer stack to expose edges of the layers of material; and
removing portions of the layers of material to form trenches at a surface of the nano-structure.

15. The method of claim 14, wherein forming a feature comprises forming a dielectric bump on the substrate.

16. The method of claim 15, wherein the dielectric bump has a trapezoidal cross-section.

17. The method of claim 15, wherein the dielectric bump has a width adjacent a surface of the substrate of approximately 250 nanometers to approximately 100 microns.

18. The method of claim 14, wherein depositing multiple layers of material comprises depositing at least two different materials in an alternating arrangement such that the multi-layer stack comprises alternating layers of material.

19. The method of claim 14, wherein depositing a film comprises depositing a film over the multi-layer stack having a height that exceeds the top of the multi-layer stack.

20. The method of claim 19, wherein removing a portion of the film and the multi-layer stack comprises planarizing the film and the multi-layer stack together to form the surface of the nano-structure and the edges.

21. The method of claim 14, wherein removing portions of the layers comprises etching away portions of selected layers to form the trenches.

22. The method of claim 21, wherein etching away portions of selected layers comprises etching away layers of a first type of material without etching away layers of a second type of material.

23. The method of claim 21, wherein the method comprises a method for fabricating a nano-imprint stamp.

24. A method for fabricating a nano-structure, the method comprising:

forming a dielectric bump on a surface of a substrate, the feature having opposed sides, at least one of the sides extending in an oblique direction from the substrate surface;
depositing multiple layers of at least two different materials in an alternating manner over the substrate surface and the dielectric bump to form a multi-layer stack of alternating materials;
depositing a film over the multi-layer stack such that the multi-layer stack is completely covered by the film;
planarizing the film and the multi-layer stack to form a surface that comprises exposed edges of the layers of material; and
etching away layers of one of the materials to form trenches in the formed surface, the trenches extending in an oblique direction relative to the formed surface.

25. The method of claim 24, wherein the dielectric bump has a trapezoidal cross-section.

26. The method of claim 24, wherein the dielectric bump has a width adjacent a surface of the substrate of approximately 250 nanometers to approximately 100 microns.

27. The method of claim 24, wherein the method comprises a method for fabricating a nano-imprint stamp.

Patent History
Publication number: 20060003267
Type: Application
Filed: Aug 31, 2005
Publication Date: Jan 5, 2006
Inventors: Sriram Ramamoorthi (Corvallis, OR), Peter Mardilovich (Corvallis, OR), Pavel Kornilovich (Corvallis, OR), Vincent Korthuis (Corvallis, OR)
Application Number: 11/215,985
Classifications
Current U.S. Class: 430/322.000
International Classification: G03C 5/00 (20060101);