LEVEL SHIFTER WITHOUT DC CURRENT FLOW
A level shifter has a current mirror and a set of oppositely driven NMOS switch. A voltage holding module is added to help an output of the level shifter to work with a full-swing fashion. Additionally, a DC current switch is used to eliminate a DC current.
1. Field of the Invention
The present invention relates to a level shifter, and more particularly, to a CMOS level shifter without DC current flow.
2. Description of the Prior Art
With advanced complementary metal oxide semiconductor (CMOS) technology, more and more circuits are integrated into a single chip. Therefore, the issue for heat dissipation of the chips is important. A simple way to reduce the heat is to decrease the working voltage of the chips. However, to increase the noise margin and avoid the noises from the external environment, the I/O circuits of the chips are usually applied higher voltage than the kernel circuits. Therefore, most of the chips are applied two working voltages. Level shifters, hence, are necessary to translate signals between two voltage supply domains.
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It is therefore a primary objective of the present invention to provide a novel level shifter to solve the above-mentioned problems.
The level shifter comprises a switch module, a power terminal, a current mirror, and a voltage holding module. The switch module has a first switch and a second switch. The switch module receives an input signal and turns on/off the first switch and the second switch according to the received input signal. The power terminal supplies a voltage to the level shifter. The current mirror is coupled to the power terminal and has a first node and a second node. The second node being coupled to the second switch. The voltage holding module has a control circuit and a third switch that is controlled by the control circuit. The control circuit is coupled to the third switch and the second node of the current mirror. The control circuit establishes electrical connection between the first switch and the first node of the current mirror by turning on the third switch.
According to another embodiment of the present invention, the level shifter comprises an input terminal, a first switch, a second switch, an inverter, a first power terminal, a second power terminal, a current mirror, and a voltage holding module. The input terminal receives an input signal. The first switch is connected to the input terminal. The inverter has an input connected to the input terminal and an output terminal connected to the second switch. The first power terminal supplies a first voltage to the level shifter. The second power terminal supplies a second voltage to the level shifter. The current mirror is coupled to the first power terminal and has a first node coupled to the first switch and a second node coupled to the second switch. The voltage holding module has a control circuit and a third switch that is controlled by the control circuit. The control circuit is coupled to the third switch and the second node of the current mirror. The control circuit establishes electrical connection between the first switch and the second power terminal by turning on the third switch.
According to another embodiment of the present invention, the level shifter has a switch module, a power terminal, a current mirror, and a voltage holding module. The switch module has a first switch and a second switch. The switch module receives an input signal and turns on/off the first switch and the second switch according to the received input signal. The power terminal for supplies a voltage to the level shifter. The current mirror is coupled to the power terminal and has a first control element, a second control element, a first node, and a second node. The first control element is coupled to the first switch via the first node, and the second control element is coupled to the second switch via the second node. The voltage holding module has a control circuit and a third switch that is controlled by the control circuit. The control circuit is coupled to the third switch and the second node of the current mirror. The control circuit establishes electrical connection between the first control element and the power terminal by turning on the third switch.
These and other objectives of the present invention will no doubt become obvious to those of ordinary skill in the art after reading the following detailed description of the preferred embodiment that is illustrated in the various figures and drawings.
BRIEF DESCRIPTION OF DRAWINGS
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When the node 1 is low, i.e. grounded, the NMOS transistor 21 is turned off and the NMOS transistor 22 is turned on. The voltage level of the node 4 is pulled down to the grounded level. Then, the output of the inverter 41 is pulled up to VDDAH because of the grounded node 4. Therefore, the NMOS transistor 7 is turned on by the inverter 41. Oppositely, when the voltage level of the node 1 is pulled up from the grounded level to VDDAL, the NMOS transistor 21 is turned on and the NMOS transistor 22 is turned off. Meanwhile, because the NMOS transistor NMOS 7 is still turned on, a transient current flows from the power terminal VDDAH through the PMOS transistor 11, the NMOS transistor 7, and the NMOS transistor 21 to the grounded terminal GND. The transient current is mirrored to the PMOS transistor 12 of the current mirror 10 so that the voltage level of the node 4 is pulled up to VDDAH. When the voltage level of the node 4 is equal to VDDAH, the status of the inverter 41 is switched so that the NMOS transistor 7 is turned off. Therefore, there is no DC current generated. In addition, because the control circuit 40 is coupled to the power terminal VDDAH, the voltage level of the node 4 can be pulled up to VDDAH, i.e. not (VDDAH-2Vtp). Moreover, when the voltage level of the node 1 is pulled down from VDDAL to the grounded level, the NMOS transistor 21 is turned off and the NMOS transistor 22 is turned on. Meanwhile, the voltage level of the node 4 is pulled down to the grounded level via the NMOS transistor 22, and the NMOS transistor 7 is turned on by the inverter 41. In such case, the NMOS transistor 21 and the NMOS transistor 7 present an AND logic style. Moreover, because the NMOS transistor 21 and the NMOS transistor 7 cannot be turned on at the same time when the level shifter 100 operates in a stable state, there is not any DC current when the level shifter 100 operates. In other words, the electrical connection between the NMOS transistor 21 and the node 5 is well controlled by the NMOS transistor 7 to avoid any DC current.
According to the present invention, the main function of the PMOS transistor 42 of the control circuit 40 is to pull up the voltage level of the node 4 to VDDAH so as to provide the level shifter 100 with a greater ability to overcome the noise from the output terminal 9. Therefore, as shown in
In addition, because the NMOS transistor 21 and the NMOS transistor 7 present an AND logic style, the positions of the two NMOS transistors 21 and 7 can be switched. Please refer to
Moreover, because the PMOS transistor and the NMOS transistor are complementary elements, the NMOS transistor 7 of the voltage holding module 30 can be replaced by a PMOS transistor. Please refer to
It is noted that the current mirror 10 can be not only a simple circuit that is composed of two PMOS transistors 11 and 12, but also can be another kind of current mirror that has more complex circuit structure.
In the contrast to the prior art level shifter, the present invention provides a level shifter not only operates without generating any DC current flow, but also the output voltage supply is full-swing. Therefore, the wasted electric energy is less, and the ability to overcome the noise from the output terminal is greater.
Those skilled in the art will readily observe that numerous modifications and alterations of the device and method may be made while retaining the teachings of the invention. Accordingly, the above disclosure should be construed as limited only by the metes and bounds of the appended claims.
Claims
1. A level shifter comprising:
- a switch module having a first switch and a second switch, the switch module receiving an input signal and turning on/off the first switch and the second switch according to the received input signal;
- a power terminal for supplying a voltage to the level shifter;
- a current mirror coupled to the power terminal having a first node and a second node, the second node being coupled to the second switch; and
- a voltage holding module having a control circuit and a third switch controlled by the control circuit, the control circuit being coupled to the third switch and the second node of the current mirror to establish electrical connection between the first switch and the first node of the current mirror by turning on the third switch.
2. The level shifter of claim 1 wherein the control circuit abolishes the electrical connection between the first switch and the first node of the current mirror by turning off the third switch.
3. The level shifter of claim 1 further comprising an output terminal coupled to the second node of the current mirror for outputting an output signal.
4. The level shifter of claim 1 further comprising an input terminal coupled to the switch module for receiving the input signal.
5. The level shifter of claim 4 wherein when a voltage level of the input signal is equal to a first voltage level, the first switch is turned off and the second switch is turned on.
6. The level shifter of claim 4 wherein when a voltage level of the input signal is equal to a second voltage level, the first switch is turned on and the second switch is turned off.
7. The level shifter of claim 1 wherein the voltage holding module is coupled to the power terminal.
8. A level shifter comprising:
- an input terminal for receiving an input signal;
- a first switch connected to the input terminal;
- a second switch;
- an inverter having an input connected to the input terminal and an output terminal connected to the second switch;
- a first power terminal for supplying a first voltage to the level shifter;
- a second power terminal for supplying a second voltage to the level shifter;
- a current mirror coupled to the first power terminal having a first node coupled to the first switch and a second node coupled to the second switch; and
- a voltage holding module having a control circuit and a third switch controlled by the control circuit, the control circuit being coupled to the third switch and the second node of the current mirror to establish electrical connection between the first switch and the second power terminal by turning on the third switch.
9. The level shifter of claim 8 wherein the control circuit abolishes the electrical connection between the first switch and the second power terminal by turning off the third switch.
10. The level shifter of claim 8 further comprising an output terminal coupled to the second node of the current mirror for outputting an output signal.
11. The level shifter of claim 8 wherein when a voltage level of the input signal is equal to a first voltage level, the first switch is turned off and the second switch is turned on.
12. The level shifter of claim 8 wherein when a voltage level of the input signal is equal to a second voltage level, the first switch is turned on and the second switch is turned off.
13. The level shifter of claim 8 wherein the voltage holding module is coupled to the first power terminal.
14. A level shifter comprising:
- a switch module having a first switch and a second switch, the switch module receiving an input signal and turning on/off the first switch and the second switch according to the received input signal;
- a power terminal for supplying a voltage to the level shifter;
- a current mirror coupled to the power terminal having a first control element, a second control element, a first node, and a second node, the first control element being coupled to the first switch via the first node, and the second control element being coupled to the second switch via the second node; and
- a voltage holding module having a control circuit and a third switch controlled by the control circuit, the control circuit being coupled to the third switch and the second node of the current mirror to establish electrical connection between the first control element and the power terminal by turning on the third switch.
15. The level shifter of claim 14 wherein the control circuit abolishes the electrical connection between the first control element and the power terminal by turning off the third switch.
16. The level shifter of claim 14 further comprising an output terminal coupled to the control circuit for outputting an output signal.
17. The level shifter of claim 14 further comprising an input terminal coupled to the switch module for providing the input signal.
18. The level shifter of claim 17 wherein when a voltage level of the input signal is equal to a first voltage level, the first switch is turned off and the second switch is turned on.
19. The level shifter of claim 17 wherein when a voltage level of the input signal is equal to a second voltage level, the first switch is turned on and the second switch is turned off.
20. The level shifter of claim 14 wherein the voltage holding module is coupled to the power terminal.
Type: Application
Filed: Apr 14, 2005
Publication Date: Apr 6, 2006
Inventor: Ching-Rong Chang (Hsin-Chu County)
Application Number: 10/907,738
International Classification: H03K 19/094 (20060101);