Lossy linearizers for analog optical transmitters
System and method for compensating for even order and odd order nonlinear distortion in a single by introduction of a compensating signal that removes substantially all of the nonlinear distortion in one order or in two orders. Two or more diodes are arranged in at least one of an anti-series configuration and an anti-parallel configuration in which a circuit voltage is equal to a selected odd order and/or to a selected even order in current, plus higher order terms that are often negligible. The diodes may be replaced by other selected nonlinear devices.
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This invention relates to reducing distortion in opto-electronics devices, using a broadband linearizer.
BACKGROUND OF THE INVENTIONMany opto-electronics devices, such as direct modulated lasers, electro-absorption modulated lasers, and interferometric optical modulators, suffer from distortion due to nonlinear effects that are present in the device in certain signal intensity ranges. At low or moderate input signal intensities, one or two nonlinear terms, proportional to an even power term (e.g., 2 or 4) or proportional to an odd power term (e.g., 3 or 5), often dominate the nonlinear portion of a response. Ideally, it should be possible to compensate exactly for these lowest order nonlinear distortion terms by removing such terms, preferably as a pre-distortion signal.
Several classes of techniques for compensation for presence of nonlinear signal distortion have been developed. A feed-forward technique is capable of achieving suppression of distortion of around 18 dB, with individual controls for even- (second) and odd- (third) order suppression. A general non-linear transfer function can be synthesized in principle by filters/equalizers and a delay line. However, implementation and adjustment is often complicated.
Use of a parametric feedback method is possible only for devices that allow distortion control with an external dc voltage (e.g,. second order control for a Mach-Zehnder interferometer).
An in-line technique is simple to implement, but makes some major compromises. One approach uses independent real and imaginary distorters, which are located in the shunt path of the signal flow and thus disturb signal matching. For this reason, the shunt loading by the distorter must be kept small so that only a small amount of controlled distortion can be generated. As a result, these linearizers work well when the device to be linearized does not have appreciable distortion components. Also, it is difficult to separate the real and imaginary parts of a signal completely, and the controls become inter-dependent. The isolation between real and imaginary distortion components is sometimes attempted by amplifiers (usually MMIC's), which are sources of distortion themselves. All these factors limit the performance. Furthermore, these approaches are part of a class of lossy linearizers with the loss approaching zero, and their power handling capability is severely compromised.
Another approach addresses linearization as a purely real part (in-phase) problem. However, even if the non-linear transfer function (NTF) to be compensated is real, the parasitics of the linearizer elements would limit the performance at higher frequencies. Therefore, unless reactive compensation is used, this type of circuit would not be capable of operating over a wide bandwidth. If an imaginary part of the NTF is to be generated, this reference does not indicate how to achieve this. Therefore, this approach would be limited to systems of limited bandwidth and for linearization of real NTFs. This approach also does not teach how to synthesize a second-order (or, more generally, an even-order) non-linearity by itself or in conjunction with some odd-order non-linearity.
What is needed is an approach that provides broadband linearization and reduces odd order and even order signal distortion. Preferably, the approach should provide compensation for separate even order and odd order nonlinear distortion, for combined even and odd order distortion, and for expansive and compressive distortion. Preferably, the approach should provide one or more controllable parameter values that can be used to match the coefficients associated with anticipated nonlinear distortions.
SUMMARY OF THE INVENTIONThese needs are met by the invention, which provides a system and method that removes even order, odd order and combined even and odd order nonlinear signal distortion, by generating distortion compensation components using a passive network. This approach does not require use of time delay lines or of phase matching techniques. In one approach, two or more diodes, arranged in an anti-series configuration, in an anti-parallel configuration, or groups of such diode combinations, are provided to selectively generate odd order and/or even order nonlinear terms in a signal intensity with controllable coefficients. The nonlinear terms thus generated are provided as pre-distortion terms and added to the original signal to cancel the lowest order nonlinear terms that would otherwise appear as part of the processed signal. More generally, one or more nonlinear devices is provided as part of a circuit shunt (e.g., as part of a T-network or a π-network) to generate one or more specified nonlinear terms as pre-distortion terms.
BRIEF DESCRIPTION OF THE DRAWINGS
FIGS. A1-A5 illustrate nonlinear circuits discussed in Appendices A and B.
DESCRIPTION OF BEST MODES OF THE INVENTION
The circuit 11 includes first and second primary resistors or impedances 13-1 and 13-2, having selected impedance values, R1 and R2, and being connected in series between an input port 15-in and an output port 15-out. A second terminal of the first impedance 13-1 is connected to a first terminal of the second impedance 13-2 and to a nonlinear shunt circuit 17 having M nonlinear one-port sub-circuits 19-i (i=1, 2, . . . , M; M>1). Any two of the nonlinear sub-circuits 19-i may be qualitatively similar or may differ from each other. Each nonlinear sub-circuit 19-i includes one or more entrance impedances 21-i, having a selected impedance value and being connected to a nonlinear sub-device 19-i. The nonlinear sub-device 19-i provides a nonlinear relationship between voltage V at a device input terminal and current I induced in the sub-device. This nonlinear relationship may be expressed as
I(V)=Σk=0 bk·Vk, (1)
where the coefficients bk may be real or complex, and bk≠0 for at least one index k>1. This nonlinear relationship may also be expressed as
V(I)=Σk=0 ah·Ih, (2)
where the coefficients ah may be real or complex, and ah≠0 for at least one index h>1. The coefficients b0 and a0 are ignored here. From Eq. (1), a one-port nonlinearity can be represented as a sum of a linear conductivity term (proportional to b1) and controlled current sources representing higher degree dependences upon the voltage V. This characterization is illustrated in
The circuit in
In
Rsh+1/G
is equivalent to a parallel combination of circuit elements,
Rsh,m+1/Gm (m=1, 2, . . . , M),
shown in
A fundamental principle of weakly nonlinear networks allows one to calculate the results of an excitation (I or V) of the one-port circuit shown in
A pair of opposed and matched diodes, 59 and 60, is arranged in series (an “anti-series” configuration), where the cathodes are connected together. An anti-series configuration of two diodes also includes a second arrangement where two opposed and matched diodes are arranged in series and joined anode to anode, corresponding to exchange of the diodes 59 and 60 in
V(I)=a1·I+a3·I3+a5·I5+ . . . , (3)
where the first few coefficients in Eq. (3) are
a1=2·Vt/I0, (4a)
a3=2·Vt/(3·I03), (4b)
The third order term has a positive sign, corresponding to an expansive compensation mode, and the value of a3, for example, can be adjusted by adjusting the value of bias current I0,
The circuit in
Ignoring terms involving I5 and higher degree in the current, the current-voltage relationship for an opposed diode pair is represented an equivalent arrangement shown in
The ratio of two-tone intermodulation component to fundamental signal component is given in dB by
IM3=20·log10 {1.5F·a3·Z0·Pout}, (5)
where Pout is output power (Watts) and the factor F for a symmetric network (Z1=Z2, Z01=Z02=Z0) is
F=0.5·Z0·(1+Z1/Z0)3/{(Z3+R1)3·[R1+Z3+(Z1+Z0)/2]}. (6)
Where n matched and opposed diode pairs are arranged in series (n=1, 2, . . . ), as in
a1=2·n·Vt/(·I0), (7a)
a3=2·n·Vt/(3·I03), (7b)
The shunting effect of the nonlinear terms are reduced relative to the linear term shunting effect as the integer n increases.
The circuit in
The current-voltage relationship of Eq. (2) is applicable, and the first few coefficients ak for the diode 76 are shown in an Appendix to be
a1=Vt/I0, (8a)
a2=−Vt/(2·I02), (8b)
a3=Vt/(3·I03). (8c)
Odd order components can be expansive or compressive, corresponding to a phase of 0 or π, respectively, in the Nonlinear Transfer Function (NTF). The phase of the even order nonlinear components can also be controlled by selecting the polarity of the diode.
The circuit in
V(I)=a1·I+a3·I3+a5·I5+ . . . , (9)
where a1 is positive and a3 and a5 can be shown to have negative signs, corresponding to a compressive mode.
The circuit in
V(I)=a1·I+a2·I2+a4·I4+ . . . , (10)
a1=Vt/I0, (11a)
a2=−Vt/2I02, (11b)
The circuit in
The circuit in
A selected pre-distortion circuit (e.g., the circuit in
As an example of application of the invention, a third order compressive nonlinearity is pre-distorted, using the third order expansive circuit of
The third order intercept point can be expressed in dBm as
IP3=10·log{I03/(F·n·Vt·Z0)}+30. (12)
An important constraint for operation of these types of circuits is that the diodes should not undergo any clipping, wherein a diode output signal is artificially limited or manifests a plateau at a peak value. To avoid clipping, the peak rf current in the shunt arm of a circuit cannot exceed the bias current through the nonlinear elements. This requirement sets a limit on available rf power at an output terminal of the circuit. This limit can be expressed as a lower bound on the third order intercept point of the circuit.
IP3>10·log{N3/D3}+30, (13)
N3=2[Pout3·Z0]1/2(N+2N1/2−1)·ζ3, (14)
D3=(N−1)·n·Vt, (15)
where ζ is a form factor (peak current/rms current) for the exciting signal and N is loss of the linear equivalent circuit, expressed in nepers. If the excitation signal is a multi-tone signal similar to a Gaussian distribution, ζ can be approximated as a constant.
The graph in
These examples use single diodes and diode pairs to generate the desired nonlinear components. Schottky-barrier diodes are a suitable choice. However, MESFETs and varactors can also be used here.
These examples use T-networks to synthesize the desired nonlinear circuits. A Π-network can also be used here to generate similar nonlinear components, with the choice of T-network or Π-network often being dictated by design requirements at high frequencies.
An equivalent for the circuit in
The values of the first and second shunt capacitances, 148 and 151, are small and produce large corresponding reactances compared to the instantaneous forward resistance of each diode. For reasonable frequencies of operation (e.g., 50-860 MHz), a forward biased Schottky diode is closely approximated by a memoryless nonlinear sub-device in series with inductors and transmission lines.
The circuit 140′ in
The nonlinear transfer function (NTF) for the circuit shown in
One-Port Non-Linearity's
Let the excitation signal (voltage V or current I) to a one-port non-linearity (FIG. A1) be a single complex phasor or a summation of a finite number of complex phasors.
The transfer characteristics of the one-port circuit is expressed as
I=G(V)=G1V+G2V2+G3V3+ . . . (A-1)
The converse relationship is
V=R(I)=R1I+R2I2+R3I3+ . . . (A-2)
The coefficients Gi and Ri, are in general, complex.
Examples of One-Port Non-Linearity's
A single diode (FIG. A2) with a bias current I0 is considered. The diode equation is given by
where i and v are total, instantaneous values, or
under normal operating conditions. Equation (A-4) leads to
and so on.
Now,
using Eqs. (A-5) and (A-6). From Eqs. (A-2) and (A-7) we obtain
and so on.
The next example of a one-port non-linearity consists of an even number of identical diodes arranged in an anti-series configuration (FIG. A3). If n is the number of diode pairs, we have,
V/2n=R1I+R2I2+R3I3+ . . . (A-9a)
−V/2n=R1(−I)+R2(−I)2+R3(−I)3+ . . . (A-9b)
From Eqs. (A-9a) and (A-9b), we obtain
V=2n(R1I+R3I3+ . . . ). (A-10)
Therefore, this type of one-port circuit generates only odd-order non-linear components. The equivalent voltage source network is shown in FIG. A4.
Approximate Analysis of
For weakly non-liner circuits, the effect of non-linear voltage source can be treated separately and principle of superposition applied to obtain the combined effect of linear and non-linear parts.
Referring to the equivalent circuit of FIG. A5 (and also FIG. A6), the non-linear current delivered by Vn1 is
where the operator ‘par’ is defined as
And, non-linear current through the impedance Z02 is given by
Therefore, the non-linear voltage drop across the impedance Z02 is given by
using Eqs. (B-1) and (B-3).
If we assume Z1=Z2, Z01=Z02=Z0 and that the non-linearity is of third order, Vn1=a3.Ish3, Eq. (B-4) is simplified to:
because
using the linear equivalent circuit.
Therefore,
If the input excitation consists of two tones, we can express the two-tone intermodulation product IM3 as
Using Eq. (B-7) and
we have
where Pout is output power (fundamental) in Watts. A third-order Intercept Point is expressed in dBW as
For clipping-free operation, we require that
I0≧Ish.ζ, (B-13)
where I0=bias current and ζισα form factor of the excitation signal, i.e. peak current/rms current. Using Eq. (B-6). Eq. (B-13) is expressible as
Also, using Eqs. (B-8), (B-13) and (B-14), the IP3 in Eq. (B-12) can be expressed as
If N is the linear loss of the circuit, expressed in nepers, we have
Using Eqs. (B-16a) and (B-16b) we get,
Therefore, from Eqs. (B-15) and (B-17)), we have
Claims
1. A circuit for compensating for nonlinear distortion in an electronic signal, the circuit comprising:
- a signal input terminal and a signal output terminal, connected by selected first and second impedances, arranged in series and having a common impedance terminal;
- a sub-circuit including at least first and second diodes, connected in an anti-series configuration, where a first terminal of the first diode is connected to a selected third impedance that is connected to the common terminal, and a first terminal of the second diode is grounded.
2. The circuit of claim 1, further comprising third and fourth diodes, connected in said anti-series configuration, where a first terminal of the third diode is connected to a selected fourth impedance that is connected to said common terminal, and a first terminal of the fourth diode is grounded.
3. The circuit of claim 1, further comprising a third diode, having a first terminal connected to a selected fourth impedance that is connected to said common terminal, and having a second terminal that is grounded.
4. The circuit of claim 3, wherein each of said first diode, said second diode and said third diode has a bias current value that is selected so that said first, second and third diodes together provide a voltage response that includes a first signal component that is second order in an electrical current variable in said circuit and includes a second signal component that is third order in the electrical current variable in said circuit, and the first and second signal components have selected signal coefficients.
5. The circuit of claim 1, wherein each of said first diode and said second diode has a bias current value that is selected so that said first and second diodes together provide a voltage response that includes a signal component that is third order in an electrical current variable in said circuit and the third order component has a selected signal coefficient.
6. A circuit for compensating for nonlinear distortion in an electronic signal, the circuit comprising:
- a signal input terminal and a signal output terminal, connected by selected first and second impedances, arranged in series and having a common impedance terminal;
- a sub-circuit including at least first and second diodes, connected in an anti-parallel configuration, where an anode of the first diode and a cathode of the second diode are connected to a selected third impedance that is connected to the common terminal, and a cathode of the first diode and an anode of the second diode are grounded.
7. The circuit of claim 6, further comprising third and fourth diodes, connected in said anti-parallel configuration, where an anode of the third diode and a cathode of the fourth diode are connected to a selected fourth impedance that is connected to said common terminal, and a cathode of the third diode and an anode of the fourth diode are grounded.
8. The circuit of claim 6, further comprising a third diode with a first terminal connected to a selected fourth impedance that is connected to said common terminal, and with a second terminal connected to ground.
9. The circuit of claim 8, wherein each of said first diode, said second diode and said third diode has a bias current value, and the bias current values are selected so that said first, second and third diodes together provide a voltage response that includes a signal component that is second order in an electrical current variable in said circuit and the second order component has a selected signal coefficient.
10. The circuit of claim 6, wherein each of said first diode and said second diode has a bias current value that is selected so that said first and second diodes together provide a voltage response that includes a signal component that is third order in an electrical current variable in said circuit and the third order component has a selected signal coefficient.
11. A circuit for compensating for nonlinear distortion in an electronic signal, the circuit comprising:
- a signal input terminal and a signal output terminal, connected by selected first and second impedances, arranged in series and having a common impedance terminal;
- a sub-circuit including at least first and second diodes, connected in an anti-series configuration, and third and fourth diodes, connected in an anti-series configuration, where a first terminal of the first diode is connected to a selected third impedance that is connected to the common terminal, a first terminal of the second diode is connected to a first terminal of the third diode, and a first terminal of the fourth diode is grounded.
12. The circuit of claim 11, further comprising a fifth diode, having a first terminal connected to a selected fourth impedance that is connected to said common terminal, and having a second terminal that is grounded.
13. The circuit of claim 11, wherein each of said first diode, said second diode, said third diode and said fourth diode has a bias current value that is selected so that said first, second third and fourth diodes together provide a voltage response that includes a signal component that is third order in an electrical current variable in said circuit and the third order component has a selected signal coefficient.
14. A method for compensating for nonlinear distortion in an electronic signal, the method comprising:
- determining at least one nonlinear term in a current signal I, represented as ck·Ik, where k is an integer at least equal to 2, that is present in a circuit voltage when the current signal I is processed by a selected signal processing circuit;
- processing the current signal I through a selected compensation circuit to generate at least one nonlinear term, ap·Ip, in the current, where p is a selected integer equal to k, where the compensation circuit comprises: a signal input terminal and a signal output terminal, connected by selected first and second impedances, arranged in series and having a common impedance terminal; and a sub-circuit including at least first and second diodes, connected in an anti-series configuration, where a first terminal of the first diode is connected to a selected third impedance that is connected to the common terminal, and a first terminal of the second diode is grounded,
- where at least one parameter value for the first and second diodes is chosen so that the at least one nonlinear term generated by the compensation circuit, when added to the current signal I and processed through the processing circuit, cancels the nonlinear term, ck·Ik, in the circuit voltage that would otherwise result from processing the current signal I.
15. The method of claim 14, further comprising providing third and fourth diodes, connected in said anti-series configuration, where a first terminal of the third diode is connected to a selected fourth impedance that is connected to said common terminal, and a first terminal of the fourth diode is grounded.
16. The method of claim 14, further comprising providing a third diode, having first terminal connected to a selected fourth impedance that is connected to said common terminal, and having a second terminal that is grounded.
17. A method for compensating for nonlinear distortion in an electronic signal, the method comprising:
- determining at least one nonlinear term in a current signal I, represented as ck·Ik, where k is an integer at least equal to 2, that is present in a circuit voltage when the current signal I is processed by a selected signal processing circuit;
- processing the current signal I through a selected compensation circuit to generate at least one nonlinear term, ap·Ip, where p is a selected integer equal to k, in the current, where the compensation circuit comprises: a signal input terminal and a signal output terminal, connected by selected first and second impedances, arranged in series and having a common impedance terminal; and a sub-circuit including at least first and second diodes, connected in an anti-parallel configuration, where an anode of the first diode is connected to a selected third impedance that is connected to the common terminal, and a cathode of the second diode is grounded,
- where at least one parameter value for the first and second diodes is chosen so that the at least one nonlinear term generated by the compensation circuit, when added to the current signal I and processed through the processing circuit, cancels the nonlinear term, ck·Ik, in the circuit voltage that would otherwise result from processing the current signal I.
18. The method of claim 17, further comprising providing third and fourth diodes, connected in said anti-parallel configuration, where an anode of the third diode is connected to a selected fourth impedance that is connected to said common terminal, and a cathode of the fourth diode is grounded.
19. The method of claim 17, further comprising a third diode with a first terminal connected to a selected fourth impedance that is connected to said common terminal, and with a second terminal connected to ground.
Type: Application
Filed: May 4, 2006
Publication Date: Sep 7, 2006
Applicant: C-COR INCORPORATED (State College, PA)
Inventors: Somnath Mukherjee (Milpitas, CA), Yahsing Yuan (San Jose, CA), Mridul Pal (Santa Clara, CA)
Application Number: 11/417,180
International Classification: H03K 5/08 (20060101);