System and method for power conversion
A power converter system is provided for supplying power to an electrical load. The power converter system includes a power converter circuit adapted to perform an AC to DC power conversion and an active clamp circuit coupled to the power converter circuit for regulating DC bus voltage overshoots. The power converter circuit is configured from a plurality of semiconductor switches having reverse voltage withstand capability.
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This application is a continuation of U.S. patent application Ser. No. 10/954,896, entitled “System and Method for Power Conversion ”, filed Sep. 30, 2004, which is herein incorporated by reference.
BACKGROUNDThe invention relates generally to a power converter system and more specifically to an AC to DC step down power converter system.
Power converters are used in a wide variety of applications. Equipment such as UPS's, battery chargers, AC-DC power supplies and others use an AC-DC power converter to convert incoming AC, typically from a power grid, to DC power output. Typically, techniques such as PWM (pulse width modulation) boost conversion have been successfully deployed to produce AC-DC power converters with high power factor and sinusoidal input currents. However the DC voltage in such cases is higher than the peak value of the AC supply (boost function). In a wide variety of applications, such as those mentioned above, the DC voltage required is usually lower than the peak value of the AC supply (step down function).
Current techniques and devices employed for achieving a AC-DC step down function, such as thyristor controlled rectifiers, input step down transformers, additional DC-DC power conversion circuits and others have a low power factor and inject harmonics into the AC source. Generally, an additional power factor correction stage may be incorporated in such power converters. Two stage power converters combining the power factor correction stage, with a down converter stage, are typically used when high efficiency and low input current harmonics are required. However, typical two stage power converters are costly for low power applications. In addition, compliance to standards, such as IEEE 519, requires additional equipment that is expensive, bulky and generally reduces the overall efficiency of the system. Hence, present methods have limitations for achieving high level of power factor and low harmonic performance for AC-DC step down function and tend to be expensive and less efficient.
It is therefore desirable to provide a cost-effective and efficient AC-DC step down power converter having high power factor and a low level of input current harmonics.
BRIEF DESCRIPTIONBriefly, in accordance with one aspect of the technique, a power converter system is provided for supplying power to an electrical load. The power converter system includes a power converter circuit adapted to perform an AC-DC power conversion and comprising a plurality of semiconductor switches having reverse voltage withstand capability. The power converter system also includes a power factor control loop for regulating power factor, a DC voltage control loop for regulating the output DC voltage and a controller coupled to the power converter circuit for regulating switching of the plurality of semiconductor switches based on a feedback signal received from at least one of the power factor control loop and the DC voltage control loop.
In accordance with another aspect of the technique, a power converter system is provided for supplying power to an electrical load. The power converter system includes a power converter circuit adapted to perform an AC to DC power conversion and comprising a plurality of semiconductor switches having reverse voltage withstand capability. The power converter system also includes an active clamp circuit coupled to the power converter circuit for regulating DC bus voltage overshoots.
In accordance with a further aspect of the technique, a method is provided for performing an AC to DC power conversion. The method provides for converting an input AC voltage to an output DC voltage via a plurality of semiconductor switches having reverse voltage withstand capability, regulating power factor via a power factor control loop, regulating the output DC voltage via a DC voltage control loop and regulating switching of the plurality of semiconductor switches based on a feedback signal received from at least one of the power factor control loop and the DC voltage control loop via a controller. Systems and computer programs that afford functionality of the type defined by this method may be provided by the present technique.
DRAWINGSThese and other features, aspects, and advantages of the present invention will become better understood when the following detailed description is read with reference to the accompanying drawings in which like characters represent like parts throughout the drawings, wherein:
The power converter system 10 is configured to supply DC power to an electrical load 18, such as resistive loads, dc motors or any other DC loads. Alternatively, the power converter system 10 may be coupled to various other DC fed systems as shown in
The power converter system 10 as discussed above is illustrated in a greater detail in
The power converter circuit 12 further includes a freewheeling diode, D, 34 for circulating the DC current, I0, thereby reducing the possibility of discontinuity in the DC current path. The DC power from the power converter circuit 12 is then supplied to an electrical load 18 coupled to the power converter circuit 12 via a DC filter 20. The DC filter 20 is typically an LC filter and includes an inductor, L0, 36 and a capacitor, C0, 38. In current fed power converter systems, the inductor L0 is configured such that it draws a constant DC current, I0, from the power converter circuit 12. Alternatively, in voltage fed power converter systems, the inductor, L0, may not be present in the DC filter 20 so as to maintain a constant DC voltage. The capacitor, C0, reduces the ripples in the output DC voltage.
As shown in
As would be appreciated by one skilled in the art, the power converter system 10, as described above, may employ the semiconductor switch 32 having reverse voltage withstand capability so as to provide step down power conversion at high power factor and reduced input current harmonics without employing an additional power factor correction stage, thereby making the power converter system 10 cost efficient for step down power conversion.
The operation of the power converter circuit 12 is regulated via a controller such as one illustrated in
In the illustrated embodiment, the DC voltage control loop 44 includes a voltage sensor for sensing the output DC voltage. This voltage is then compared to a DC reference voltage 50. The DC voltage control loop also includes logic circuitry for calculating a modulation index (m*). The controller may include a three-phase reference wave generator 52 for generating the reference wave based on the displacement factor and the modulation index, and a carrier wave generator 58 for generating a carrier wave. In one implementation, a sine wave may be employed as a reference wave and a saw tooth wave may be employed as a carrier wave. A gating pulse generator 54 that is a part of the controller may then generate a gating pulse based on the reference wave and the carrier wave. The gating pulse from the gating pulse generator 54 is used to regulate switching operation of the semiconductor switches T1-T6 via the gate driver 48, thereby regulating the output DC voltage. For a given peak value of AC voltage Vm, the output DC voltage is given by the equation:
As the freewheeling diode 34 and/or blocking diodes 42 are not ideal diodes, the diode recovery and circuit layout parameters in the power converter circuit 12 may cause spikes or overshoots in the DC bus voltage. In case of a voltage fed power converter system, a capacitor coupled to the power converter circuit 12 may be used to reduce the overshoots in the DC bus voltage. Alternatively, a clamp circuit 60 may be used to minimize the spikes in the current fed power converter systems, as the capacitor will act as a short circuit while charging. As illustrated in
As illustrated in
The power converter system 10, as described in the various embodiments discussed above, provides step down power conversion having high power factor and a low level of input current harmonics, thereby increasing the efficiency of the power converter system. This is achieved at a lower cost by utilizing a semiconductor switch having reverse voltage withstand capability. In addition, the power converter system 10 is compliant to IEEE 519 standards. As the power converter system 10 provides a high quality, efficient and compact AC to DC step down power conversion, it can be used in a wide variety of electrical system having lower level of DC voltage requirement than that achieved from normal rectification. For example, the power converter system 10 may be coupled to equipment, such as UPS system, battery chargers and other DC systems, for providing the DC power supply. Also, the power converter system 10 may be coupled to generators, thereby reducing the size of the generators that is otherwise oversized.
While only certain features of the invention have been illustrated and described herein, many modifications and changes will occur to those skilled in the art. It is, therefore, to be understood that the appended claims are intended to cover all such modifications and changes as fall within the true spirit of the invention.
Claims
1. A power converter system, comprising:
- a bridge rectifier circuit comprising a plurality of semiconductor switches configured to convert an AC power in a step down conversion to a DC power, wherein each of the plurality of semiconductor switches is a single bipolar switch configured to withstand voltage in either direction without a blocking diode.
2. The power converter system of claim 1, comprising a clamp circuit configured to minimize voltage overshoots in the DC power.
3. The power converter system of claim 2, wherein the clamp circuit comprises a non-dissipative active clamp circuit.
4. The power converter system of claim 3, wherein the non-dissipative active clamp circuit is configured to absorb energy from the voltage overshoots and transfer the energy to an electrical load.
5. The power converter system of claim 1, comprising an active clamp circuit coupled to the bridge rectifier circuit, wherein the active clamp circuit is configured to act as a constant voltage source by minimizing irregularities in the DC power.
6. The power converter system of claim 5, wherein the active clamp circuit comprises:
- a capacitor connected across a DC bus and charged to a DC bus voltage;
- a buck converter circuit configured to discharge the capacitor when voltage across the capacitor exceeds a reference value; and
- a boost converter circuit configured to charge the capacitor when voltage across the capacitor falls below the reference value.
7. The power converter system of claim 1, comprising a controller coupled to the bridge rectifier circuit and configured to control the plurality of semiconductor switches to provide a desired step down conversion.
8. The power converter system of claim 7, wherein the controller regulates switching of the plurality of semiconductor switches via pulse width modulation.
9. The power converter system of claim 1, comprising an AC filter configured to reduce irregularities relating to the bridge rectifier circuit.
10. The power converter system of claim 1, comprising a DC filter configured to reduce irregularities in the DC power output by the bridge rectifier circuit.
11. The power converter system of claim 10, wherein the DC filter further comprises an inductor and a capacitor.
12. The power converter system of claim 1, wherein the bridge rectifier circuit comprises a freewheeling diode in parallel with the plurality of semiconductor switches.
13. The power converter system of claim 1, wherein the plurality of semiconductor switches is configured to provide step down power conversion at a high power factor with reduced input current harmonics without employing an additional power factor correction stage.
14. A power converter system, comprising:
- a power converter circuit adapted to convert an AC power to a DC power; and
- an active clamp circuit coupled to the power converter circuit, wherein the active clamp circuit is configured to minimize irregularities in the DC power by storing energy from voltage overshoots and transferring the energy to an electrical load.
15. The power converter system of claim 14, wherein the power converter circuit comprises a step down power converter.
16. The power converter system of claim 14, wherein the power converter circuit comprises a plurality of semiconductor switches with integral or associated reverse voltage withstand capability, wherein the plurality of semiconductor switches is configured to provide step down power conversion at a high power factor with reduced input current harmonics without employing an additional power factor correction stage.
17. The power converter system of claim 14, wherein the power converter circuit comprises a plurality of bipolar semiconductor switches having integrated reverse voltage withstand capability.
18. The power converter system of claim 14, wherein the power converter circuit comprises a plurality of unipolar semiconductor switches and corresponding blocking diodes configured to provide reverse voltage withstand capability.
19. The power converter system of claim 14, wherein the power converter circuit comprises a plurality of semiconductor switches and a controller configured to control switching of the plurality of semiconductor switches via pulse width modulation.
20. The power converter system of claim 14, wherein the active clamp circuit is configured to charge and/or discharge a capacitor to maintain a generally constant DC voltage across a DC bus.
21. A method for power conversion, comprising:
- converting an input AC voltage to an output DC voltage via a plurality of bipolar semiconductor switches having integrated reverse voltage withstand capability; and
- controlling the plurality of bipolar semiconductor switches.
22. The method of claim 21, comprising minimizing irregularities in the output DC voltage by at least storing excess energy in response to voltage overshoots.
23. The method of claim 22, wherein minimizing comprises discharging a capacitor connected across a DC bus when voltage across the capacitor exceeds a reference value and charging the capacitor when voltage across the capacitor falls below the reference value.
24. The method of claim 21, wherein the AC to DC power conversion is a step down power conversion.
Type: Application
Filed: Oct 31, 2006
Publication Date: Feb 22, 2007
Applicant:
Inventors: Rajesh Ghosh (Bangalore), Bansidhar Phansalkar (Bangalore), Silvio Colombi (Losone)
Application Number: 11/590,713
International Classification: G05F 1/70 (20060101);