BLOCK PUNCTURING FOR TURBO CODE BASED INCREMENTAL REDUNDANCY
A method of block puncturing for turbo code based incremental redundancy includes a first step (1200) of coding an input data stream into systematic bits and parity bits. A next step (1202) includes loading the systematic bits and parity bits into respective systematic and parity block interleavers in a column-wise manner. A next step (1204) includes selecting a predefined redundancy. A next step (1206) includes outputting bits from the block interleavers in a row-wise manner in accordance with the selected predefined redundancy.
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This invention relates generally to communication systems, and more particularly to coding in a turbo coded communication system.
BACKGROUND OF THE INVENTIONConvolutional codes are often used in digital communication systems to protect transmitted information from error. Such communication systems include the Direct Sequence Code Division Multiple Access (DS-CDMA) standard IS-95, the Global System for Mobile Communications (GSM), and next generation wideband communication systems. Typically in these systems, a signal is convolutionally coded into an outgoing code vector that is transmitted. At a receiver, a decoder, such as a Viterbi decoder as is known in the art, uses a trellis structure to perform an optimum search for the transmitted signal bits based on maximum likelihood criterion.
More recently, turbo codes have been developed that outperform conventional coding techniques. Turbo codes are generally composed of two or more convolutional codes and turbo interleavers. Correspondingly, turbo decoding is iterative and uses a soft output decoder to decode the individual convolutional codes. The soft outputs of the decoders are used in the decoding procedure to iteratively approach the converged final results.
Typically, the encoded data is transmitted to a receiver, which uses error detection. If an error is detected, the receiver can request that the transmitter, such as a base station for example, retransmit the data using an Automatic Repeat Request (ARQ). In other words, if a receiver is not able to resolve (converge on) the data bits in time, the radio can request the transmitter to resend that portion of bits from the block or a portion of a frame of data that failed so as to be properly decoded. There are several known techniques to provide ARQ. In addition, there can be ARQ combining of different transmissions. Further, the receiver can attempt to provide error correction as well as error detection. This is referred to as a Hybrid Automatic Repeat Request (HARQ).
Two known forms of HARQ are Chase combining and Incremental Redundancy (IR). Chase combining is a simplified form of HARQ wherein the receiver simply requests a retransmission of the same codeword again. IR is more complicated in that it provides for a retransmission of the code word using more parity bits. However, this involves a lowering of the code rate due to the added information, which can only be alleviated by further puncturing of bits. Conventional means of defining a puncturing pattern, such as a rate matching algorithm or alternatively a classical code puncturing matrix, as are known in the art, are unable to provide the necessary smooth and flexible transition between changing coding rates, as are envisioned for next generation communication products.
What is needed is an improved turbo coder that utilizes a unified puncturing scheme, which allows flexibility in choosing coding rates for the initial and subsequent transmissions. It would also be advantageous to provide this improvement using any of the combined ARQ techniques. It would also be of benefit to provide an improved turbo coder with a minimal increase of computational complexity or implementation effort.
BRIEF DESCRIPTION OF THE DRAWINGSThe features of the present invention, which are believed to be novel, are set forth with particularity in the appended claims. The invention, together with further objects and advantages thereof, may best be understood by reference to the following description, taken in conjunction with the accompanying drawings, in the several figures of which like reference numerals identify like elements, and in which:
The present invention provides a turbo coder that supports incremental redundancy (IR) as a form of ARQ combining, using a single, unified puncturing scheme. In particular, the present invention uses a puncturing scheme based on a block interleaver. Codeword bits are read in column-wise while the desired amount of unpunctured data is then read out row-wise after row and column rearrangement. The block nature of the interleaver ensures a regular puncturing distributed throughout the encoder trellis ensuring good code performance. The block puncturing approach of the present invention has the advantage of ease of implementation as well as retaining the flexibility in adapting to any desired coding rate without a significant increase in complexity. As a result, the present invention provides for flexible and fine-grained support of predefined redundancy versions at each transmission with progressive reduction in effective coding rates and support for full and partial forms of both Chase combining and IR. Preferably, the present invention also provides for symbol priority mapping onto the most reliable Quadrature Amplitude Modulation (QAM) constellation points to further reduce decoding errors.
In application, The High Speed Downlink Packet Access (HSDPA) feature of the Third Generation Partnership Project (3GPP) UTRA (UMTS Terrestrial Radio Access) or Wideband Code Division Multiple Access (WCDMA) system details a hybrid-ARQ scheme based on Incremental Redundancy (IR) methods applied to a rate-1/3 turbo-code. The present invention defines the High Speed Downlink Shared Channel (HS-DSCH) coding and modulation scheme to permit the use of incremental redundancy block interleaving in user equipment (UE), such as a cellular radio communication device. The present invention describes a specific method and apparatus for applying IR to HSDPA.
IR methods are known in the art, and have been applied before to systems such as Enhanced Data for GSM Evaluation (EDGE). However, the HSDPA problem is novel, in that the number of Soft Metric Locations (or SMLs) available to the Hybrid Acknowledge Repeat Request (HARQ) process can change depending on factors such as the number of ARQ processes in existence. The present invention allows for a change in the final coding rate according to the available coded symbol memory. Also, unlike the present invention, prior systems, such as EDGE, utilized convolutional codes rather than turbo-codes, and supported a different number of redundancy versions.
The present invention provides a flexible IR scheme specifically applicable to HSDPA. In particular, the IR scheme of the present invention supports: a) a flexible method of controlling the instantaneous and variable final code rate of the HARQ process (ranging from Chase combining to rate-1/3 expansion), b) general QAM modulation, including 16-QAM, c) a specific set of possible redundancy versions from which can be selected an optimal (or simply preferred) sequence of redundancy versions, based on the specific acknowledge/negative acknowledge (ACK/NACK) signal evolution applicable to HSDPA, and d) a novel implementation of block interleavers. Prior art implementations for IR, such as those of EDGE, do not meet the specific requirements of the current problem since they cannot change the final coding rate according to the available coded symbol memory. The terminal memory requirements of the user equipment are derived based on Chase (soft) combining at the maximum data rate defined by the associated UE capability parameters. In other words, the UE has memory limitations and can only accept particular code rates. The present invention accounts for these memory limitations and allows the UE to vary coding rates accordingly.
To facilitate flexibility in supporting variable coding rates in the present invention, both columns and rows are permuted prior to reading out the block matrix contents. As an example of the benefit of row and column reordering, consider the case where Nrow=30 and Ncol=100. If the first two rows were to be read out without reordering, the codeword bits would correspond to the 29th, 30th, 59th, 60th, 89th, 90th, . . . stages in the encoder trellis. However, by reordering row 29 with row 15, then the transmitted codeword bits become those at the 15th, 30th, 45th, 60th, 75th, 90th, . . . stages in the encoder trellis, a more homogenous and therefore desirable distribution. In permuting the columns, it is ensured that no sub-block section of the trellis is neglected when only a portion of a row is read out to form the transmitted codeword. The row permutation is that defined by Table 7 in section 4.2.1.1 of TS 25.212, hereby incorporated by reference.
After the row and column permutation, the desired number of codeword bits can then be read out in row-wise fashion. Using the notation of
Note that all the independent variables in Eq. (1) are derivable at the UE following delivery of the signaled Hybrid Automatic Repeat Request (HARQ) information on the High Speed Downlink Secondary Control Channel (HS-DSCCH). When more coded bits are required than can be obtained by reading to the end of the Ni,max
Referring back to
Rule 1: Each rectangle represents rows 1 to Ni,max
Rule 2: The X (e.g. RV1, RV2, RV3) signifies no bits are used from that interleaver to form the instantaneous codeword.
Rule 3: The double arrowed line signifies all bits in 1 to Ni,max
Rule 4: In the case there is an X in one interleaver and a single arrowed line in the other, then codeword bits are only read from the block interleaver with the single arrowed line.
Rule 5: In the case there is a double arrowed line in one interleaver and a single arrowed line in the other, then codeword bits are only read from the block interleaver with the single arrowed line once reading from the double arrowed line is complete.
Rule 6: In the case there is a single arrowed line in both interleavers, then codeword bits are read equally from both block interleavers.
Rule 7: If reading from a block interleaver with a single arrowed line has reached the end of line Ni,max
Rule 8: A fractional number Nfrac
The present invention includes a specific set of eight redundancy versions for selecting coded bits from the systematic and parity interleavers in accordance with the above rules, as shown in
Redundancy version zero: the starting row is the top row of both the systematic and parity interleavers, and coded bits from the systematic interleaver is read from its starting row to completion before the remaining coded bits are read from the parity interleaver starting at its starting row.
Redundancy version one: the starting row is the top row of the parity interleaver, the coded bits are read from the parity interleaver starting at its starting row.
Redundancy version two: the starting row is Np,max
Redundancy version three: the starting row is 2×Np,max
Redundancy version four: the respective starting rows are the top row of the parity interleaver and NS,max
Redundancy version five: the respective starting rows are Np,max
Redundancy version six: the respective starting rows are the top row of the systematic interleaver and Np,max
Redundancy version seven: the respective starting rows are 3×Np,max
One aspect of these redundancy versions in the present invention is that their numbering does not suggest a particular order of transmission. For example, if on the first transmission RVO is signaled with enough codeword bits to result in a rate 3/5 code (exactly one third of the parity bits transmitted), the scheduler is permitted choose RV2 for the second transmission. Similarly, if in the first transmission, a rate 1/4 code is desired, RV4 might be selected for the second transmission. Moreover, systematic bits can be used in the first selected and unpunctured rows and parity bits in subsequent and punctured rows to reduce error. Using this approach, the chosen redundancy version can be used to support Chase, partial and full IR schemes in conjunction with any adaptive modulation and coding scheme (AMCS).
Referring back to
The symbol mapping is dependent on the type of modulation and the number of systematic and parity bits used in transmission. As an example, if redundancy version 0 (RV0) is used with an effective code rate of 3/4 and 16-QAM modulation, each QAM symbol comprises of three systematic bits and one parity bit, while if the same version is used with a code rate of 1/2 and 16-QAM modulation, each QAM symbol then comprises of two systematic and 2 parity bits.
Systematic codeword bits 700 are read from left-to-right into the BPM array one code block at a time. Once all systematic codeword bits 700 have been read in, parity codeword bits 702 are read in again from left-to-right and one code block at a time. The output of the BPM is a sequence of QAM symbols or bit vectors (a vector of four bits in the case of 16-QAM and a vector of two bits in the case of QPSK) given by the columns of the BPM array, read in sequence from left-to-right. Advantageously, this results in systematic bits 700 being mapped into the first rows of the bit mapper followed by subsequent mapping of parity bits. The puncturing matrix can then be chosen to select the rows of systematic bits to be unpunctured rows of the block for better accuracy. [correct? If not, why is having the systematic bits in the top row an advantage?] Optionally, it is also possible to reverse the sequence of high and low priority bits during a re-transmission of the same redundancy version to get further improved performance
Referring back to
Following channel segmentation 312, second interleaving 314, as described in section 4.2.1 1 in TS 25.212 is applied, again with a modification. In this case, instead of applying the interleaver on the bits comprising each physical channel, it is applied on the QAM symbols values or symbol indices of each of the physical channel which are output from the physical channel segmentation 312.
Finally and similarly, the physical channel mapping 314 described in section 4.2.12 of TS 25.212 is applied, again with substitution of QAM data symbols for bits.
EXAMPLE The block-puncturing technique of the present invention was compared to that traditionally defined by puncturing matrices. Simulations were conducted for a rate-1/2 16-QAM coding and for a rate 3/4 QPSK coding for both Chase and full IR combining.
The simulation was conducted to determine frame error rate (FER) for a Quadrature Phase Shift Keying (QPSK) signal at a 3/4 rate with a spreading factor (SF) of 16 and Orthogonal Variable Spreading Factor (OVSF) of 1 over an AWGN channel. The first curve 1100 shows the FER of the traditional IR scheme with one transmission (Chase combining). The second curve 1102 shows the FER of the traditional IR scheme with two transmissions. The third curve 1104 shows the FER of the traditional IR scheme with three transmissions. In comparison, and in accordance with the present invention, the fourth curve 1106 shows the FER of the block puncturing IR scheme with one transmission, the fifth curve 1108 shows the FER of the block puncturing IR scheme with two transmissions, and sixth curve 1110 shows the FER of the block puncturing IR scheme with three transmissions.
As can be seen, the block puncturing of the present invention so no loss of performance, for both Chase and IR schemes, in all cases except for in the three transmission, full incremental redundancy where there a slight loss in performance of the proposed block-puncturing scheme versus the more traditional yet very inflexible matrix based traditional puncturing approach. Considering the overall improvement provided by the present invention, this is quite acceptable. Moreover, symbol remapping may be used to alleviate deficiency.
Although the invention has been described and illustrated in the above description and drawings, it is understood that this description is by way of example only and that numerous changes and modifications can me made by those skilled in the art without departing from the broad scope of the invention. Although the present invention finds particular use in portable cellular radiotelephones, the invention could be applied to any two-way wireless communication device, including pagers, electronic organizers, and computers. Applicants' invention should be limited only by the following claims.
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21. A method of bit priority mapping a turbo codeword, the method comprising the steps of:
- associating predefined disjoint areas of an array with differing bit reliability positions offered by a constellation;
- loading the punctured systematic turbo codeword bits and punctured parity turbo codeword bits into the array, giving higher priority to one set of bits when loading a predefined disjoint area; and
- continuously gathering bits from all distinct disjoint areas to form a symbol.
22. The method of claim 21, wherein:
- the number of rows in the array is log2(M) where M is the constellation order;
- sets of rows are associated with bit reliability positions offered by a constellation;
- data is read out of the array on a column wise basis each column wholly associated with one modulated symbol.
Type: Application
Filed: Jul 5, 2006
Publication Date: Mar 15, 2007
Applicant: MOTOROLA, INC. (LIBERTYVILLE, IL)
Inventors: KENNETH STEWART (GRAYSLAKE, IL), AMITAVA GHOSH (BUFFALO GROVE, IL), MICHAEL BUCKLEY (GRAYSLAKE, IL), RAJA BACHU (DES PLAINES, IL), RAPEEPAT RATASUK (HOFFMAN ESTATES, IL)
Application Number: 11/428,656
International Classification: G06F 11/00 (20060101); H03M 13/00 (20060101);