Semiconductor Fuse Covering
A method and system for sealing or covering exposed fuses on a semiconductor device are disclosed. A semiconductor device prober incorporating a spray device for applying a sealing compound to individual fuses on a semiconductor device subsequent to testing the semiconductor device is disclosed. A method and system for sealing exposed fuses on a semiconductor device is disclosed which allows the sealing step to be performed either prior to or following singulation of the semiconductor device into individual dice.
Latest Patents:
The present invention relates generally to covering or sealing fuses of a semiconductor device.
As is known, many semiconductor dice are typically manufactured on a single semiconductor wafer. Once manufactured, the dice are typically subjected to a series of tests. These tests typically begin with initial gross functionality testing followed by more exacting testing, including, for example, burn-in testing. Typically, initial gross functionality tests are performed while the dice are in wafer form, and subsequent more exacting tests are performed on individual dice after they are singulated from the wafer. It should be noted, however, that the dice are sometimes subjected to the further testing while in wafer form. Often, although not always, the dice are packaged, at least partially, prior to some or all of the testing that follows the initial gross functionality testing.
Fuses may be formed on a semiconductor die that allows a defective circuit on the die to be replaced by a redundant or replacement circuit on the die. For example, fuses are often used on semiconductor memory die to replace a memory cell or column or row of memory cells found through testing of the die to be defective. Activation of a fuse disconnects the defective cell or column or row of cells and connects replacement cells, rows, or columns. A laser may be used to activate a fuse, which often involves cutting a fusible link on the die, but other fuse arrangements may be used.
Because dice are typically packaged before all testing of the dice has been completed, the fuses can only be used to replace defective circuits found during testing that occurs before packaging. This is because the packaging typically covers the fuses, making the fuses inaccessible after packaging has been applied. Even if the dice are not packaged or their packaging does not cover the fuses, the fuses nevertheless should be covered before the dice are used in their final applications to protect the fuses from environmental or other effects that might degrade the fuses and possibly cause the die to malfunction.
SUMMARY OF THE INVENTIONThe invention is set forth in the claims below, and the following is not in any way to limit, define or otherwise establish the scope of legal protection. In general terms, the present invention relates to a method and system for covering or sealing exposed fuses on a semiconductor device. This covering or sealing may be accomplished either prior to or after a wafer is singulated into individual die components.
BRIEF DESCRIPTION OF THE DRAWINGS
For the purposes of promoting an understanding of the principles of the invention, reference will now be made to the embodiments illustrated in the drawings and specific language will be used to describe the same. It will nevertheless be understood that no limitation of the scope of the invention is thereby intended, and alterations and modifications in the illustrated device and method and further applications of the principles of the invention as illustrated therein, are herein contemplated as would normally occur to one skilled in the art to which the invention relates.
During the testing procedure, the wafer 25 to be tested is removed from the boat 20 by the robotic arm 35 and placed on the stage 30. The stage 30 is then moved so that the probes 42 of the probe card 40 are in electrical contact with testing contacts (not shown) located on the individual dice 200 on the wafer 25 surface. Proper alignment of the wafer 25 relative to the probe card 40 may be ensured by the use of cameras 52 to guide the stage. Once the testing procedure is completed, the stage 30 is moved to disengage the wafer 25 from the probe card 40 and the robotic arm 35 returns the wafer 25 to the boat 20.
FIGS. 2 to 7 illustrate the general design of a typical wafer 25.
The invention is not, however, limited to use of an ink jet print head, much less an ink jet print head that delivers dots of ink with a diameter in the foregoing range, nor is the invention limited to use with fuses having dimensions in the foregoing ranges or spacings between fuses in the foregoing range.
The spray head support member 320 is shown as a single rod, but a spray head support member 320 which is more than one rod or other suitable support structure such as a track or series of tracks may also be used. Moreover, the spray head 310 is preferably moveable in X, Y, and Z directions with respect to the support 802 (discussed below). Alternatively, the support 802 is moveable in X, Y, and Z directions, or the spray head 310 and the support 802 are each moveable in one or more directions such that, with respect to each other, they are moveable in X, Y, and Z direction. The support may also be rotateable.
As seen in
A sealing or covering substance is delivered from a storage container (not shown) to the spray head 310, which then applies the sealing substance to cover the exposed fuses (not shown in
The spray head 310 is moved by the spray head support 320 from fuse region 220 to fuse region 220 on the wafer. When the spray head 310 arrives at an exposed fuse region 220, the spray head 310 delivers a predetermined amount of sealing substance to the fuse region 220 before the spray head support 320 moves the spray head 310 to the next exposed fuse region 220. The path 500 followed by the spray head 310 may be in a zigzag pattern as shown in
As an alternative to a movable spray head 310, a stationary spray head 310 may be used. In this example, a spray head 310 remains in fixed position while the wafer 25 is positioned below the spray head 310 by the support 802. As the support 802 moves the wafer 25 in a predetermined pattern beneath the spray head 310, the spray head 310 applies the sealing substance to the fuses on the die 200 as previously described.
As seen in
As an alternative to a movable spray head 310, a stationary spray head 310 may be used. In this example, a spray head 310 remains in fixed position while the wafer 25 is positioned below the spray head 310 by the stage 30. As the stage 30 moves the wafer 25 in a predetermined pattern beneath the spray head 310, the spray head 310 applies the sealing substance to the fuses 250 on the die 200 as previously described. Once the sealing process is complete the stage 30 moves the wafer 25 away from the spray head 310 so the robotic arm 35 may return the wafer 25 to the boat 20.
The present invention also contemplates a combination of a mobile spray member 300 and stage 30 to correctly position the wafer 25 during the sealing process. In one example of such a combination, the stage 30 includes a means for rotating a wafer 25. As the wafer 25 rotates on the stage 30, a spray head 310 capable of linear movement along the support member 320 applies the sealing substance to the fuses 250 on the wafer 25. This combination of a wafer 25 rotating below a linearly moving spray 310 head allows all fuses 250 on the wafer 25 surface to be sealed.
Although
Although the foregoing embodiments describe testing and processing of an unsingulated wafer 25, the present invention is also applicable to a singulated die. That is, testing may also be performed on a singulated die and fuses on the singulated die may be activated as needed, after which fuse regions on the singulated die are covered or sealed. For example, initial testing may be performed on the unsingulated wafer 25 as previously described. Once this initial testing is completed and any defects corrected, the wafer 25 may then be singulated into individual dice 200 and each die packaged or otherwise provided with a protective coating. Holes are left in this coating, however, so that the fuses 250 may still be accessed. Alternatively, no packaging or protective coating is applied to the singulated dice. Further testing of the individual dice 200 may be performed and defects corrected as the fuses 250 are still exposed (either through the holes or because no packaging or protective coating has been applied to the dice). Once this additional testing is completed and any defects fixed, the holes 235 allowing access to the fuses 250 may be sealed as previously described. Alternatively, if no packaging or protective coating has been applied to the dice, the exposed fuses my be covered or sealed as described previously described.
As mentioned above, semiconductor devices are typically subjected to a series of tests. Typically, such series of tests begin with some sort of initial gross functionality test followed by one or several more exacting tests. A wide variety of such tests and sequences of tests are known in the field, and the present invention may be used to seal or cover fuses following any one of the tests in any sequence of tests performed on semiconductor devices. For example, the fuses may be covered or sealed following initial gross functionality testing. Alternatively, the fuses may be covered or sealed following later testing. Of course, the further into the sequence of tests that the sealing or covering of fuses occurs, the further into the testing the fuses may be used to replace defective portions of the semiconductor die with nondefective portions. Thus, ideally, the fuses are not sealed or covered until all testing has been completed, allowing the fuses to be used to replace defective portions of the semiconductor die that are determined to be defective during any of the tests in the testing sequence. Of course, however, the invention is not limited only to use after completion of all testing of a semiconductor device.
After initial testing 1102, packaging is typically applied to the semiconductor device 1104. In some processes, the wafer is singulated into individual dice and the packaging is thereafter applied. Alternatively, the wafer may be left unsingulated and wafer level packaging applied to the dice while still in wafer form. As yet another alternative, no packaging may be applied to the dice, whether they are singulated or not. If packaging is applied, windows (e.g., 220 in
Whether in wafer form or singulated into individual dice, and whether packaged or unpackaged, the semiconductor device is next subjected to burn in 1106. As known in the field, burn in involves exercising the semiconductor device while at an elevated temperature. Following burn in, the semiconductor device is subjected to additional testing 1108, which may consist of one or more additional tests run on the semiconductor device. Because the fuses on the semiconductor device are still exposed, fuses may be activated to repair defects found during these additional tests. It should be noted that burn in may itself involve testing the semiconductor device. Thus, the additional testing 1108 may be combined with burn in 1106. After all testing has been completed, the fuses are sealed or covered 1110. It should be noted that the semiconductor wafer may be singulated at any time during the process shown in
Reverse fuses, such as those shown in
While the invention has been illustrated and described in detail in the drawings and foregoing description, the same is to be considered as illustrative and not restrictive in character, it being understood that exemplary embodiments have been shown and described and that all changes and modifications that come within the spirit of the invention are desired to be protected. The articles “a”, “an”, “said” and “the” are not limited to a singular element, and include one or more such elements. The term “semiconductor device” refers to any semiconductor based electronics element including without limitation an unsingulated wafer, singulated dice, or a singulated die, whether packaged or unpackaged. The term “fuse” refers to any fuse whether activated by cutting as shown in
Claims
1-27. (canceled)
28. A semiconductor die comprising:
- a fuse configured to allow a selective change to be made to the semiconductor die; and
- a coating covering the fuse, the coating comprising at least a portion of a droplet of a substance.
29. The semiconductor die of claim 28 further comprising a plurality of fuses each configured to allow a selective change to be made to the semiconductor die, and a plurality of coatings covering ones of the fuses, each coating comprising at least a portion of a droplet of the substance.
30. The semiconductor die of claim 28, wherein the droplet is a size in accordance with a print head.
31. The semiconductor die of claim 28, wherein a size of the droplet is approximately a size of the fuse.
32. The semiconductor die of claim 28, wherein the substance comprises dried ink.
33. The semiconductor die of claim 28, wherein:
- the semiconductor die comprises on a same surface a fuse region and a non-fuse region, the non-fuse region being substantially larger in area than the fuse region; and
- the fuse is disposed in the fuse region; and
- the coating is substantially absent from the non-fuse region.
34. The semiconductor die of claim 28, wherein the fuse is a reverse fuse and the substance is electrically conductive.
35. A semiconductor die made by a method comprising:
- providing a semiconductor die having an exposed fuse in a fuse region, the fuse allowing a selective change to be made to the semiconductor die;
- processing the semiconductor die while the fuse is exposed; and
- applying a substance in liquid form to cover the fuse in the fuse region.
36. The semiconductor die of claim 35, wherein the semiconductor die further comprises a plurality of exposed fuses each configured to allow a selective change to be made to the semiconductor die, and the applying comprises applying the substance in liquid form to cover ones of the fuses.
37. The semiconductor die of claim 35, wherein the substance comprises dried ink.
38. The semiconductor die of claim 35, wherein the applying comprises spraying the substance onto the fuse.
39. The semiconductor die of claim 35, wherein the applying comprises depositing a droplet of the substance onto the fuse.
40. The semiconductor die of claim 39, wherein the depositing comprises sizing the droplet to approximate a size of the fuse.
41. The semiconductor die of claim 39, wherein the applying comprises depositing a plurality of droplets of the substance onto the fuse.
42. The semiconductor die of claim 35, wherein the processing the semiconductor die comprises packaging the semiconductor die, wherein the packaging leaves the fuse exposed.
43. The semiconductor die of claim 35, wherein:
- the semiconductor die comprises on a same surface as the fuse region a non-fuse region, the non-fuse region being substantially larger in area than the fuse region; and
- the substance is substantially absent from the non-fuse region.
44. A semiconductor die comprising:
- a fuse configured to allow a selective change to be made to the semiconductor die; and
- a coating covering the fuse, the coating comprising a congealed liquid substance.
45. The semiconductor die of claim 44 further comprising a plurality of fuses each of configured to allow a selective change to be made to the semiconductor die, wherein the coating covers ones of the fuses.
Type: Application
Filed: Feb 20, 2007
Publication Date: Jun 14, 2007
Applicant:
Inventor: Benjamin Eldridge (Danville, CA)
Application Number: 11/676,930
International Classification: G01R 31/26 (20060101);