THERMALLY ENHANCED STACKED DIE PACKAGE AND FABRICATION METHOD
A substrate is provided. A first die is attached to the substrate. The first die is electrically connected to the substrate. A heat sink having an undercut around its periphery is attached to the first die. A second die is attached to the heat sink. The second die is electrically connected to the substrate, and the first die, the heat sink, and the second die are encapsulated.
This is a continuation of co-pending U.S. patent application Ser. No. 10/825,910 filed Apr. 16, 2004.
TECHNICAL FIELDThe present invention relates generally to semiconductor packages having stacked dies, and more particularly to a method and apparatus for manufacturing a thermally enhanced stacked die semiconductor package.
BACKGROUND ARTSemiconductors, or computer chips, have made their way into virtually every electrical product manufactured today. Chips are used not only in very sophisticated industrial and commercial electronic equipment, but also in many household and consumer items such as televisions, clothes washers and dryers, radios and telephones. As many of these types of products become smaller but more functional, there is a need to include more semiconductors in these smaller products. The reduction in size of cellular telephones is one example of how more and more capabilities find their way into smaller and smaller electronic products.
The popularity of smaller and more complicated electronic products has placed increased demands on the packaging for chips used in such devices. These increased demands have led to new packaging concepts and approaches. Unpackaged chips are referred to as die or dies, and current packaging methods include placing more than one die in a single package. One such approach is to stack one die on top of another and then enclose the stack of dies in one package. The final package for the multiple-stacked semiconductor dies is much smaller than would result if the dies each were packaged separately. In addition to providing a smaller size, these packages offer a number of advantages that relate to the manufacturing of the package such as ease of handling and assembling.
An example of a die stacking technique incorporates a pair of stacked dies encapsulated in a molded plastic package that has connectors or leads extending out from the package that function as input/output terminals of the dies inside the package. The package includes a substrate and a first die mounted on the top surface of the substrate. A second die is then stacked on top of the first die.
The substrate may be comprised of a flexible resin tape, a rigid fiber-glass/copper sheet laminate, a co-fired ceramic coupon, or a flexible metal lead frame, a ball grid array substrate or other well-known types of substrates in the semiconductor industry, depending on the particular type of semiconductor package being used.
The first die is conventionally mounted to the top surface of the substrate with, for example, a layer of an adhesive or an adhesive film, and then electrically connected to the substrate by a plurality of fine, conductive wires, typically gold (Au) or aluminum (Al), that electrically connects the die to the substrate. The wires are attached to the die at the bonding pads of the die, which are located around the periphery of the die.
The second die is mounted on the top surface of the first die with an adhesive layer that is positioned within the central area of the top surface of the first die. The adhesive layer may contact or cover both the bonding pads of the first die and the conductive wires bonded to the first die. The adhesive layer positions the second die sufficiently far above the first die to prevent the dies from contacting each other or any wires connected to the dies. The second die is then wire bonded to the substrate in the same fashion as the first die. One or more additional dies can then be stacked on top of the second die using the same technique.
In a stacked die arrangement, the dies are wire bonded sequentially, typically with automated wire bonding equipment employing well-known thermal-compression or ultrasonic wire bonding techniques. During the wire bonding process, the head of a wire bonding apparatus applies a downward pressure on a conductive wire held in contact with a wire-bonding pad on the die to weld or bond the wire to the bonding pad on the die.
After the dies are wire bonded to the substrate, the dies, substrate, and conductive wires are covered with plastic, or other suitable material, which encapsulates the stacked dies and protects them from moisture and other environmental elements.
Despite efforts to overcome problems resulting in lower yields of semiconductor packages with stacked dies problems still exist. In particular, dies within the stack fail prematurely.
In conventional multi-chip modules, by packing a number of dies in close proximity within a single package, thereby eliminating individual packages for each of the die, electrical performance is improved and the board space occupied by the semiconductor is reduced. Due to the increase in the packing density, however, the power density of the multi-chip module typically is higher than when each die is separately packaged, thus requiring more elaborate thermal design and thermal management schemes to maintain the device temperatures within acceptable ranges.
Consequently, there remains a need for improved, more economical, more efficient, and more readily manufactured and assembled heat sinks, heat sink packages, and fabrication methods for use with semiconductor packages.
Solutions to these problems have been long sought, but prior developments have not taught or suggested satisfactory solutions and, thus, solutions to these problems have long eluded those skilled in the art.
DISCLOSURE OF THE INVENTIONThe present invention provides a semiconductor package including a substrate. A first die is attached to the substrate. The first die is electrically connected to the substrate. A heat sink having an undercut around its periphery is attached to the first die. A second die is attached to the heat sink. The second die is electrically connected to the substrate, and the first die, the heat sink, and the second die are encapsulated.
The present invention provides a thermally enhanced semiconductor package that is more economical, more efficient, and more readily manufactured and assembled.
Certain embodiments of the invention have other advantages in addition to or in place of those mentioned above. The advantages will become apparent to those skilled in the art from a reading of the following detailed description when taken with reference to the accompanying drawings.
BRIEF DESCRIPTION OF THE DRAWINGS
In the following description, numerous specific details are given to provide a thorough understanding of the invention. However, it will be apparent that the invention may be practiced without these specific details. In order to avoid obscuring the present invention, some well-known system configurations, and process steps are not disclosed in detail. Likewise, the drawings showing embodiments of the invention are semi-diagrammatic and not to scale and, particularly, some of the dimensions are for the clarity of presentation and are shown greatly exaggerated in the FIGS. Generally, the device can be operated in any orientation. In addition, where multiple embodiments are disclosed and described having some features in common, for clarity and ease of illustration and description thereof like features one to another will ordinarily be described with like reference numerals.
The term “horizontal” as used herein is defined as a plane parallel to the conventional plane or surface of the substrate, regardless of its orientation. The term “vertical” refers to a direction perpendicular to the horizontal as just defined. Terms, such as “on”, “above”, “below”, “bottom”, “top”, “side” (as in “sidewall”), “higher”, “lower”, “over”, and “under”, are defined with respect to the horizontal plane. The term “processing” as used herein includes deposition of material or photoresist, patterning, exposure, development, etching, cleaning, and/or removal of the material or photoresist as required in forming a described structure.
Referring now to
While the substrate 102 shown is a rigid sheet laminate, a wide variety of substrates could be used without departing from the scope of the present invention as described and claimed herein. For example, the substrate 102 could be a flexible resin tape or a flexible metal lead frame, or other suitable material.
A first adhesive layer 106 may be an adhesive tape or, as shown in
Referring now to
Accordingly, the heat sink 200 can provide support for an additional die that is larger than the first die 104 if necessary or desirable for a particular design. The thickness of the heat sink 200 can be adjusted to meet the needs of a wide variety of designs. For example, if the dies in a particular design generate a significant amount of heat during operation the heat sink 200 can be made thicker. If on the other hand a lesser amount of heat is generated, a heat sink 200 that is thinner can be used.
Additionally, the heat sink 200 provides protection for the first number of bonding wires 108 during subsequent wire bonding of a die or dies that are attached to the upper surface of the heat sink as discussed below.
Referring now to
A second number of bonding wires 304 is connected between the second die 300 and the substrate 102. The second number of bonding wires 304 typically used in packages of the type described herein are made of very fine wires of metals such as copper (Cu), aluminum (Al), or gold (Au). The second number of bonding wires 304 is wire bonded using conventional techniques such as ultrasonic bonding, compression bonding, soldering, or other suitable techniques.
Additionally, a third number of bonding wires 306 can be used between the heat sink 200 and the substrate 102 to conduct heat away from the heat sink 200 to the substrate 102.
Referring now to
It will be noted that the heat sink 200 also acts as a spacer between the first die 104 and the second die 300, and if properly sized prevents the second die 300 from contacting the first number of bonding wires 108 that connect the first die 104 to the substrate 102. Additionally, the heat sink 200 provides support for the second die 300 during wire bonding of the second number of bonding wires 304 between the second die 300 and the substrate 102. As previously discussed, the undercut 204 can be varied to accommodate the size of the second die 300. For example, if the second die 300 is larger than the first die 104, the undercut 204 can extend over the number of bonding wires 108. The undercut 204 also provides protection for the first number of bonding wires 108 during wire bonding of the second number of bonding wires 304.
Referring now to
While the substrate 502 shown is a rigid sheet laminate, a wide variety of substrates could be used without departing from the scope of the present invention as described and claimed herein. For example, the substrate 502 could be a flexible resin tape or a flexible metal lead frame, or other suitable material.
A first adhesive layer 506 may be an adhesive tape or, as shown in
Referring now to
Accordingly, the heat sink 600 can provide support for a die that is larger than the first die 504 if necessary or desirable for a particular design. The heat sink 600 has a ground plane 604 formed, for example, by providing an electrically conductive material on its surface, such as by plating the electrically conductive material onto the heat sink 600.
In the embodiment shown in
Accordingly, the heat sink 600 can provide support for an additional die that is larger than the first die 504 if necessary or desirable for a particular design. The thickness of the heat sink 600 can be adjusted to meet the needs of a wide variety of designs. For example, if the dies in a particular design generate a significant amount of heat during operation the heat sink 600 can be made thicker. If on the other hand a lesser amount of heat is generated, a heat sink 600 that is thinner can be used.
Additionally, the heat sink 600 provides protection for the first number of bonding wires 108 during subsequent wire bonding of a die or dies that are attached to the upper surface of the heat sink as discussed below.
Referring now to
A second number of bonding wires 704 is connected between the second die 700 and the substrate 502. The second number of bonding wires 704 typically used in packages of the type described herein are made of very fine wires of metals such as copper (Cu), aluminum (Al), or gold (Au). The second number of bonding wires 704 is wire bonded using conventional techniques such as ultrasonic bonding, compression bonding, soldering, or other suitable techniques.
A first ground wire 706 is connected between the second die 700 and the heat sink 600. The heat sink 600, in turn, is connected to the substrate 502 by a second ground wire 708. The second die 700 therefore is electrically connected to the substrate 502 through the first ground wire 706, the heat sink 600, and the second ground wire 708. The first ground wire 706 and the second ground wire 708 also provide a path for heat to be conducted away from the heat sink 600 to the substrate 502.
Referring now to
It will be noted that the heat sink 600 also acts as a spacer between the first die 504 and the second die 700, and if properly sized prevents the second die 700 from contacting the first number of bonding wires 508 that connect the first die 504 to the substrate 502. Additionally, the heat sink 600 provides support for the second die 700 during wire bonding of the second number of bonding wires 704 between the second die 700 and the substrate 502. As previously discussed, the undercut 604 can be varied to accommodate the size of the second die 700. For example, if the second die 700 is larger than the first die 504, the undercut 604 can extend over the number of bonding wires 508. The undercut 604 also provides protection for the first number of bonding wires 508 during wire bonding of the second number of bonding wires 704.
Referring now to
Referring now to
A substrate, and die stack are shown in phantom lines in
Referring now to
Thus, it has been discovered that the method and apparatus of the present invention furnish important and heretofore unavailable solutions, capabilities, and functional advantages for manufacturing thermally enhanced semiconductors with stacked dies. The resulting process and configurations are straightforward, economical, uncomplicated, highly versatile, and effective, use conventional technologies, and are thus readily suited for manufacturing such devices and are fully compatible with conventional manufacturing processes and technologies.
It will be apparent to those skilled in the art that, although the present invention has been described with reference to a semiconductor having two dies, additional dies may be added to the semiconductor without departing from the scope of the present invention.
While the invention has been described in conjunction with a specific best mode, it is to be understood that many alternatives, modifications, and variations will be apparent to those skilled in the art in light of the foregoing description. Accordingly, it is intended to embrace all such alternatives, modifications, and variations that fall within the scope of the included claims. All matters set forth herein or shown in the accompanying drawings are to be interpreted in an illustrative and non-limiting sense.
Claims
1. A method of assembling a semiconductor package with stacked dies comprising:
- providing a substrate;
- attaching a first die to the substrate;
- electrically connecting the first die to the substrate;
- attaching a heat sink having an undercut around its periphery overhanging bond pads over the first die;
- attaching a second die to the heat sink;
- electrically connecting the second die to the substrate; and
- encapsulating the first die, the heat sink, and the second die.
2. The method of assembling a semiconductor package with stacked dies as claimed in claim 1 wherein:
- electrically connecting the first die to the substrate uses a number of bonding wires; and
- attaching a heat sink attaches a heat sink that extends laterally over the number of bonding wires.
3. The method of assembling a semiconductor package with stacked dies as claimed in claim 1 wherein attaching a heat sink attaches a heat sink that is electrically grounded.
4. The method of assembling a semiconductor package with stacked dies as claimed in claim 1 wherein attaching a heat sink attaches a heat sink that has an electrically conductive coating, further comprising:
- connecting the second die to the electrically conductive coating; and
- connecting the electrically conductive coating to a ground plane.
5. The method of assembling a semiconductor package with stacked dies as claimed in claim 1 wherein attaching a heat sink attaches a heat sink that extends laterally beyond the edges of the second die.
6. A method of thermally enhancing a semiconductor package with a stack of dies comprising providing a heat sink having an undercut around its periphery between dies in the stack.
7. The method of thermally enhancing a semiconductor package with a stack of dies as claimed in claim 6 wherein:
- providing a heat sink attaches a heat sink that extends laterally over the lower die to which the heat sink is attached.
8. The method of thermally enhancing a semiconductor package with a stack of dies as claimed in claim 6 wherein providing a heat sink attaches a heat sink that is electrically grounded.
9. The method of thermally enhancing a semiconductor package with a stack of dies as claimed in claim 6 wherein providing a heat sink attaches a heat sink that has an electrically conductive coating, further comprising:
- connecting one of the dies in the stack of dies to the electrically conductive coating; and
- connecting the electrically conductive coating to a ground plane.
10. The method of thermally enhancing a semiconductor package with a stack of dies as claimed in claim 6 wherein providing a heat sink attaches a heat sink between each adjoining pair of dies in the stack of dies.
11. A semiconductor package with stacked dies comprising:
- a substrate;
- a first die attached to the substrate;
- the first die being electrically connected to the substrate;
- a heat sink having an undercut around its periphery attached to the first die;
- a second die attached to the heat sink and electrically connected to the substrate; and
- an encapsulant over the first die, the heat sink, and the second die.
12. The semiconductor package with stacked dies as claimed in claim 11 further comprising:
- a number of bonding wires electrically connecting the first die to the substrate; and wherein:
- the undercut of the heat sink extends laterally over the number of bonding wires.
13. The semiconductor package with stacked dies as claimed in claim 11 wherein the heat sink is electrically grounded.
14. The semiconductor package with stacked dies as claimed in claim 11 wherein:
- the heat sink has an electrically conductive coating connected to a ground plane on the substrate; and
- the second die is connected to the electrically conductive coating.
15. The semiconductor package with stacked dies as claimed in claim 11 wherein the undercut of the heat sink extends laterally beyond the edges of the second die.
16. A thermally enhanced semiconductor package with a stack of dies comprising a heat sink having an undercut around its periphery between dies in the stack.
17. The thermally enhanced semiconductor package with a stack of dies as claimed in claim 16 wherein:
- the undercut of the heat sink extends laterally over the die to which the heat sink is attached.
18. The thermally enhanced semiconductor package with a stack of dies as claimed in claim 16 wherein the heat sink is electrically grounded.
19. The thermally enhanced semiconductor package with a stack of dies as claimed in claim 16 wherein:
- the heat sink has an electrically conductive coating;
- one of the dies in the stack of dies is connected to the electrically conductive coating; and
- the electrically conductive coating is connected to a ground plane.
20. The thermally enhanced semiconductor package with a stack of dies as claimed in claim 16 wherein a heat sink is positioned between each adjoining pair of dies in the stack of dies.
Type: Application
Filed: Mar 7, 2007
Publication Date: Jun 28, 2007
Inventors: Byung Tai Do (Singapore), Byung Hoon Ahn (Singapore)
Application Number: 11/683,329
International Classification: H01L 21/00 (20060101);