HIGH-HARDNESS AND CORROSION-TOLERANT INTEGRATED CIRCUIT PACKING MOLD
A high-hardness and corrosion-tolerant integrated circuit packing mold comprises a package mold including at least one filling channel, at least one mold cavity, and at least one channel between the mold cavities; a protecting layer deposited upon surfaces of the package mold and the protecting layer being an amorphous coating layer. In one case, the protecting layer is a graded layer including an amorphous coating layer and a middle layer. In a second case, the protecting layer is a multiplayer structure formed by at least one amorphous coating layer and at least one polycrystal coating layer. In the third case, the protecting layer is a compound structure formed by distributing polycrystal material into an amorphous coating layer.
The present invention is a division application of U.S. patent Series No. 11/172,028, which is assigned to and invented by the inventor of the present invention, and thus the contents of the U.S. patent Series No. 11/172,028 is incorporated into the present invention as a part of the present invention.
The present invention related to the species about the claim 4 in the U.S. patent Series No. 11/172,028.
FIELD OF THE INVENTIONThe present invention relates to IC package, and in particular to a high-hardness and corrosion-tolerant integrated circuit packing mold, where a protecting layer is adhered to the surface of a package mold so as to protect the package mold from corrosion and wearing.
BACKGROUND OF THE INVENTIONThe packaging of integrating circuit starts from the end of manufacturing of semiconductors. The object of the packaging is to increase the bearing and protection functions to protect the ICs from corrosion physically and chemically, to provide transferring paths of energy and signal distribution of the chips, to prevent the signals from delay so as not to affect the function of the system; and to provide heat dissipation path.
Referring to
To improve the packing process, the surface process and design of the channels of the package mold 92 are important in the packaging of ICs. In one prior art, a protecting layer 95 is electric plated upon the surface of the package mold 92 with a thickness between 1 to 2 μm. The material of the protecting layer is hard chromium or polycrystal chromium nitride which is coated upon the surfaces of the mold cavities 93 so as to have preferred anti-corrosion ability and can be separated from the mold easily. However this prior art has the following disadvantages.
In the packaging process of the ICs, the resin will corrode the surfaces of the mold cavities 93 so that the corrosion is dramatic. In general, the Vickers hardness in electrical plating chromium to the protecting layer is about HV700. The corrosion will induce the viscosity on the surface of the mold cavities 93. This will reduce the lifetime of the package mold 92. Furthermore, a long time for clearing the package mold 92 is necessary.
Furthermore, in electrically plating chromium to the package mold 92, a high expense is necessary to clear the wasted water and gas in the electric plating process. Thereby a large operation space is necessary.
To coat nitride chromium to the package mold 92 by vacuum electric plating will have a Vickers hardness of HV1600 to 2000, but the protecting layer generally has a polycrystal cylindrical structure with worse anti-corrosion ability. Thereby the package mold 92 will be worn by the resin in packaging. Thereby it is difficult to separate from the mold.
As adhesive corrosion is formed on the surface of the package mold 92, the package mold 92 must be detached from a punching machine and is washed by strong acid or strong alkali which will corrode the surfaces of the mold cavities 93 of the package mold 92 with chromium or polycrystal nitride chromium so as to reduce the lifetime of the package mold 92.
SUMMARY OF THE INVENTIONAccordingly, the primary object of the present invention is to provide a high-hardness and corrosion-tolerant integrated circuit packing mold, where a protecting layer is adhered to the surface of a package mold so as to protect the package mold from corrosion and wearing.
To achieve above objects, the present invention provides a high-hardness and corrosion-tolerant integrated circuit packing mold comprising: a package mold including at least one filling channel, at least one mold cavity, and at least one channel between the mold cavities; a protecting layer deposited upon surfaces of the package mold and the protecting layer being an amorphous coating layer. In one case, the protecting layer is a graded layer including an amorphous coating layer and a middle layer. In a second case, the protecting layer is a multiplayer structure formed by at least one amorphous coating layer and at least one polycrystal coating layer. In the third case, the protecting layer is a compound structure formed by distributing polycrystal material into an amorphous coating layer.
The various objects and advantages of the present invention will be more readily understood from the following detailed description when read in conjunction with the appended drawing.
BRIEF DESCRIPTION OF THE DRAWINGS
In order that those skilled in the art can further understand the present invention, a description will be described in the following in details. However, these descriptions and the appended drawings are only used to cause those skilled in the art to understand the objects, features, and characteristics of the present invention, but not to be used to confine the scope and spirit of the present invention defined in the appended claims.
With reference to
The amorphous coating layer 21 is not only coated upon the surfaces of the filling channel 10 and the mold cavities 11 and the channel 12, but also it can be deposited on all the upper surfaces 13 of the package mold 1 so as to protect the package mold 1 not to wear or corroded in the resin-packaging process.
The amorphous coating layer 21 used on the package mold 1 has a dense amorphous structure so as to increase the ability of anti-corrosion, moreover, the pollution on the channel 12 in the resin-packing process (generally, carbides are accumulated thereon) is reduced. Furthermore, the hardness of the amorphous coating layer 21 is greater than 30 Gpa, which is far higher than the hardness of the prior art coating layer. Thereby when high viscosity and high hardness solidified resins are applied thereon, the surfaces of the filling channel 10 and mold cavities 11 and the channel 12 are protected from wearing to have the effect of protecting the package mold 1.
Referring to
The graded layer in this embodiment causes that the surfaces of the filling channel 10 and mold cavities 11, the channel 12, and all the upper surface 13 of the package mold 1 have preferred adhesion. The hardness of the graded layer is greater than 30 GPa. Thereby when high viscosity and high hardness solidified resins are applied thereon, the surfaces of the filling channel 10 and mold cavities 11 and the channel 12 are protected from wearing to have the effect of protecting the package mold 1.
Referring to
In this embodiment, the coating layers are formed periodically, such as polycrystal chromium oxide (Cr1-xNx), amorphous coating silicon nitride (amorphous Si3N4). The multi-layered coating layer in this embodiment causes that the surfaces of the filling channel 10 and mold cavities 11, the channel 12, and all the upper surface 13 of the package mold 1 have preferred adhesion. The hardness of the graded layer is greater than 30 GPa. Thereby when high viscosity and high hardness solidified resins are applied thereon, the surfaces of the filling channel 10 and mold cavities 11 and the channel 12 are protected from wearing to have the effect of protecting the package mold 1.
Referring to
In this embodiment, the compound coating layer in this embodiment causes that the surfaces of the filling channel 10 and mold cavities 11, the channel 12, and all the upper surface 13 of the package mold 1 have preferred adhesion. The hardness of the graded layer is greater than 30 GPa. Thereby when high viscosity and high hardness solidified resins are applied thereon, the surfaces of the filling channel 10 and mold cavities 11 and the channel 12 are protected from wearing to have the effect of protecting the package mold 1.
Moreover the atom ratios of the nitrogen or carbon in the polycrystal metal nitride, polycrystal metal carbides of the middle layer 22 is between 30% to 80%. The polycrystal coating layer 23 is deposited on the surfaces of the filling channel 10 and mold cavities 11, the channel 12, and all the upper surface 13 of the package mold 1, and an amorphous coating layer 21 is deposited upon the polycrystal coating layer 23. Thickness of the amorphous coating layer 21 is between 0.001 μm to 1 μm. The structure, assembly and components of the amorphous coating layer 21 are identical to those in the first embodiment. The multi-layered structure is not confined to six layers illustrated in
The present invention is thus described, it will be obvious that the same may be varied in many ways. Such variations are not to be regarded as a departure from the spirit and scope of the present invention, and all such modifications as would be obvious to one skilled in the art are intended to be included within the scope of the following claims.
Claims
1. A high-hardness and corrosion-tolerant integrated circuit packing mold comprising:
- a package mold including at least one filling channel, at least one mold cavity, and at least one channel between the mold cavities;
- a protecting layer deposited upon surfaces of the package mold and the protecting layer being an amorphous coating layer.
2. The high-hardness and corrosion-tolerant integrated circuit packing mold as claimed in claim 1, wherein the protecting layer is a graded layer including an amorphous coating layer and a middle layer.
3. The high-hardness and corrosion-tolerant integrated circuit packing mold as claimed in claim 1, wherein the protecting layer is a compound structure formed by distributing polycrystal material into an amorphous coating layer.
4. The high-hardness and corrosion-tolerant integrated circuit packing mold as claimed in claim 1, wherein the protecting layer is coated on the filling channel, mold cavities, channels and upper surfaces of the package mold.
5. The high-hardness and corrosion-tolerant integrated circuit packing mold as claimed in claim 1, wherein the protecting layer is made by one of physical vapor deposition (PVD) or chemical vapor deposition (CVD)
6. The high-hardness and corrosion-tolerant integrated circuit packing mold as claimed in claim 1, wherein the protection layer is an amorphous coating layer; the amorphous coating layer is mainly made of one of amorphous metal oxides (a-Me1-xCx) with x is between 0.3 to 0.7; amorphous metal carbides (a-Me1-yCy)) with y between 0.25 to 0.9, and amorphous metal carbide-nitrides (a-Me(C, N))), or amorphous silicon nitrides (a-Si1-zNz) with z between 0.3 to 0.8, wherein x, y, and z are atomic ratio, in that the Me (metal) is one of transition metals.
7. The high-hardness and corrosion-tolerant integrated circuit packing mold as claimed in claim 1, wherein the hardness of the protecting layer is greater than 30 GPa.
8. The high-hardness and corrosion-tolerant integrated circuit packing mold as claimed in claim 1, wherein and the thickness of the amorphous coating layer 21 is selected from a value between 0.1 μm to 10 μm or a value between 0.2 μm and 0.5 μm.
9. The high-hardness and corrosion-tolerant integrated circuit packing mold as claimed in claim 2, wherein the graded layer is formed by coating a middle layer on a surface of the package mold and then an amorphous coating layer is coated upon the middle layer.
10. The high-hardness and corrosion-tolerant integrated circuit packing mold as claimed in claim 2, wherein a thickness of the middle layer is between 0.01 μm to 3 μm.
11. The high-hardness and corrosion-tolerant integrated circuit packing mold as claimed in claim 2, wherein the middle layer is a silicon layer.
12. The high-hardness and corrosion-tolerant integrated circuit packing mold as claimed in claim 2, wherein the middle layer is one of a polycrystal metal layer, polycrystal metal nitride, a polycrystal metal carbide, and a polycrystal metal carbide-nitride; where the metal is one of transition metals.
13. The high-hardness and corrosion-tolerant integrated circuit packing mold as claimed in claim 3, wherein the size of the polycrystal material is between 5 nm to 100 nm (nanometers).
14. The high-hardness and corrosion-tolerant integrated circuit packing mold as claimed in claim 3, wherein the polycrystal material is selected from one of silicon, polycrystal metals, polycrystal metal nitrides, polycrystal metal carbides, and polycrystal metal carbide-nitrides, where the metal is one of transition metals.
15. The high-hardness and corrosion-tolerant integrated circuit packing mold as claimed in claim 6, wherein the transition metal is selected from one of chromium, aluminum, and zirconium.
16. The high-hardness and corrosion-tolerant integrated circuit packing mold as claimed in claim 12, wherein the transition metal is one selected from chromium, aluminum, zirconium.
17. The high-hardness and corrosion-tolerant integrated circuit packing mold as claimed in claim 14, wherein the transition metal is one selected from chromium, aluminum, zirconium.
18. The high-hardness and corrosion-tolerant integrated circuit packing mold as claimed in claim 12, wherein the ratio of the nitrogen atom in the polycrystal metal nitride is from 30% to 80%; and the ratio of the carbon atom in the polycrystal metal carbide is from 30% to 80%.
19. The high-hardness and corrosion-tolerant integrated circuit packing mold as claimed in claim 14, wherein the ratio of the nitrogen atom in the polycrystal metal nitride is from 30% to 80%; and the ratio of the carbon atom in the polycrystal metal carbide is from 30% to 80%.
International Classification: B28B 7/36 (20060101);