SYSTEM AND METHOD FOR VERTICAL WAFER HANDLING IN A PROCESS LINE

Abstract

By orienting substrates in a substantially vertical manner during the transport of substrates in automatic wafer transport systems of complex manufacturing environments for processing microstructure devices, a significant reduction of floor space consumption in the respective clean room environment may be achieved. In particular, for large diameter substrates, a significant reduction of the lateral dimensions of the corresponding transport system may be obtained, while an even further enhancement in this respect may be obtained for process strategies using standard lots of reduced size.

Description

BACKGROUND OF THE INVENTION

1. Field of the Invention

Generally, the present disclosure relates to the field of fabricating microstructures in highly automated manufacturing environments, and, more particularly, to the transport and handling of substrates for forming microstructures, such as integrated circuits.

2. Description of the Related Art

Today's global market forces manufacturers of mass-produced products to offer high quality products at a low price. It is thus important to improve yield and process efficiency to minimize production costs. This holds especially true in the field of microstructure fabrication, for instance, for manufacturing semiconductor devices, since in this field it is essential to combine cutting edge technology with mass production techniques. It is, therefore, the goal of manufacturers of semiconductors or generally of microstructures to reduce the consumption of raw materials and consumables while at the same time improve yield and process tool utilization. The latter aspects are especially important since the equipment required in modern semiconductor facilities is extremely cost intensive and represents the dominant part of the total production costs. At the same time, the process tools of a semiconductor facility have to be replaced more frequently compared to most other technical fields due to the rapid development of new products and processes, which may also demand correspondingly adapted process tools.

Integrated circuits are typically manufactured in automated or semi-automated facilities, thereby passing through a large number of process and metrology steps to complete the device. The number and the type of process steps and metrology steps a semiconductor device has to go through depends on the specifics of the semiconductor device to be fabricated. For instance, a sophisticated CPU requires several hundred process steps, each of which has to be carried out within specified process margins so as to fulfill the specifications for the device under consideration.

In many process lines for microstructure devices, such as semiconductor facilities, a plurality of different product types are usually manufactured at the same time, such as memory chips of different design and storage capacity, CPUs of different design and operating speed and the like, wherein the number of different product types may even reach a hundred and more in production lines for manufacturing ASICs (application specific ICs). As a consequence, passing the various product types through the plurality of process tools requires a complex scheduling regime to ensure high product quality and achieve a high performance, such as a high overall throughput of the process tools to obtain a maximum number of products per time and per tool investment costs. Hence, the tool performance, especially in terms of throughput, is a very critical manufacturing parameter as it significantly affects the overall production costs of the individual products. Therefore, in the field of semiconductor production, various strategies are practiced in an attempt to optimize the stream of products for achieving a high yield with moderate consumption of raw materials.

In semiconductor plants, substrates, typically wafers, are usually handled in groups, called lots, which are, depending on the degree of automation, conveyed within the manufacturing environment by an automated transport system, also referred to as automated material handling system (AMHS), delivering the substrates in corresponding carriers, for example, front opening unified pods (FOUPs), in which the plurality of substrates are stacked and each substrate is horizontally oriented, to so-called load ports of the tools and picking up carriers therefrom that contain previously processed substrates. Thus, the transport process itself may represent an important factor for efficiently scheduling and managing the manufacturing environment, since the time for loading and unloading carriers may take up to several minutes per carrier exchange event and may be subjected to a great variance, which may result in unwanted idle times at specific process tools, thereby reducing the performance thereof. On the other hand, there is an ongoing drive to increase the size of the corresponding substrates in order to enhance process efficiency, since although single wafer processing is becoming a dominant process regime with respect to process uniformity, nevertheless the surface area per substrate is increased to increase the number of devices that may be processed in one single wafer process. For example, in the past, a development from 150 mm to 200 mm has occurred, while currently 300 mm is becoming an industrial standard in IC production, with the prospect of 450 mm wafers in the foreseeable future. Furthermore, as previously explained, a plurality of product types may be processed concurrently with varying amounts of products per type. Hence, in view of cycle time enhancement and to address flexibility in coping with customers' specific demands, the lot size may decrease in future process strategies. For example, currently 25 wafers per transport carrier may be a frequently used lot size, wherein, however, many lots may have to be handled with a lesser number of wafers, thereby imposing a high burden on the process capabilities of the automatic transport system and the scheduling regime in the facility in order to maintain a high overall tool utilization. That is, the variability of the carrier exchange times for exchanging the carriers with respective load stations of the process tools may be high and thus a significant influence of the transport status in the manufacturing environment on the overall productivity may be observed. Thus, when designing or re-designing a manufacturing environment, for instance by installing new or additional equipment, the tool characteristics with respect to transport capabilities, such as the number of load ports for specific tools and the like, and the capabilities and operational behavior of the AMHS may represent important factors for the performance of the manufacturing environment as a whole. Furthermore, the available floor space in a modern clean room environment is very cost intensive, wherein, for increasing substrate sizes, an increasing amount of area may be occupied by the transport system, which is typically provided as a monorail system receiving respective transport carriers and conveying them to their destination. For example, a transport carrier for 25 stacked 200 mm wafers represents a cube-like device having a dimension of approximately 240 mm in width and height. For a carrier having a capability for accommodating 25 stacked 300 mm wafers, the width may be approximately 350 mm. Hence, with increasing wafer diameter, the corresponding monorails may require an increased spacing, which, in combination with increased transport activity, may result in higher clean room area “consumption.”

Although in some conventional techniques it is attempted to assess the influence of the transport capabilities on the overall behavior of the manufacturing environment on the basis of simulation models in order to determine process line specific characteristics with respect to wafer transport and schedule-caused dependencies on the characteristics of the AMHS, the above-identified developments and the current status of the transport hardware may represent a challenge for obtaining and maintaining a high overall throughput.

The present disclosure is directed to various methods and systems that may avoid, or at least reduce, the effects of one or more of the problems identified above.

SUMMARY OF THE INVENTION

The following presents a simplified summary of the invention in order to provide a basic understanding of some aspects of the invention. This summary is not an exhaustive overview of the invention. It is not intended to identify key or critical elements of the invention or to delineate the scope of the invention. Its sole purpose is to present some concepts in a simplified form as a prelude to the more detailed description that is discussed later.

Generally, the subject matter disclosed herein relates to a technique for enhancing the transport capabilities of automatic transportation systems for handling substrates, i.e., wafers, for the processing of microstructure devices, wherein the required footprint of the transportation system may be significantly reduced compared to conventional systems by conveying corresponding wafers in a substantially vertical orientation. In this manner, in particular for wafers of increased diameters such as 300 mm, 450 mm and the like, the corresponding transport capability of a respective automatic transportation system may be increased, while not requiring increased footprint relative to conventional systems, or for a given transport capability, the corresponding transportation system may be installed with a reduced requirement with respect to precious clean room area. Moreover, the subject matter disclosed herein provides increased flexibility with respect to adapting the transportation capabilities to the requirements of sophisticated semiconductor production lines, in which wafer lots of reduced size may be required due to a high degree of flexibility in handling the product mix within the manufacturing environment and enhancing the scheduling capabilities for the environment under consideration.

According to one illustrative embodiment, a transport carrier is provided for substrates, such as wafers, for microstructure devices, wherein the transport carrier comprises one or more compartments for receiving and supporting a substrate in a substantially vertical orientation during transport.

According to another illustrative embodiment, a load port system for a process tool of a manufacturing environment for processing substrates is provided. The load port system comprises a carrier handling unit configured to receive a transport carrier including at least one compartment for supporting a substrate in a substantially vertical orientation.

According to yet another illustrative embodiment, a method comprises conveying a substrate to a process tool of a manufacturing environment for processing microstructure devices by an automotive transport system, wherein the substrate has a substantially vertical orientation relative to ground during transport.

According to a further illustrative embodiment, a system comprises an automatic transport system for supplying substrates within a manufacturing environment for processing microstructure devices. The system further comprises a process tool configured to receive and process the substrates, wherein the process tool receives the substrates in a substantially vertical orientation relative to ground.

BRIEF DESCRIPTION OF THE DRAWINGS

The disclosure may be understood by reference to the following description taken in conjunction with the accompanying drawings, in which like reference numerals identify like elements, and in which:

FIG. 1a schematically illustrates a top view of an automated transport system in a manufacturing environment for processing substrates, such as a wafer for forming microstructure devices, wherein a vertical transport orientation of the corresponding wafers is used according to illustrative embodiments disclosed herein;

FIG. 1b schematically illustrates conventional transport carriers relative to respective transport carriers according to illustrative embodiments disclosed herein, thereby indicating the significant saving in clean room area;

FIG. 1c schematically illustrates a transport carrier according to one illustrative embodiment disclosed herein;

FIG. 1d schematically illustrates the “area consumption” of a conventional monorail transport system for wafers of increased diameter, such as 450 mm substrates, relative to a corresponding monorail system according to illustrative embodiments disclosed herein;

FIG. 2a schematically illustrates a load port system for receiving the respective wafers with substantially vertical orientation according to illustrative embodiments disclosed herein;

FIG. 2b schematically illustrates a front view of a corresponding transport system including a plurality of load port stations in order to provide enhanced tool utilization even for lots of reduced size according to illustrative embodiments disclosed herein; and

FIGS. 2c-2d schematically illustrate a further load port system in two different operating states according to yet another illustrative embodiment disclosed herein.

While the subject matter disclosed herein is susceptible to various modifications and alternative forms, specific embodiments thereof have been shown by way of example in the drawings and are herein described in detail. It should be understood, however, that the description herein of specific embodiments is not intended to limit the invention to the particular forms disclosed, but on the contrary, the intention is to cover all modifications, equivalents, and alternatives falling within the spirit and scope of the invention as defined by the appended claims.

DETAILED DESCRIPTION OF THE INVENTION

Various illustrative embodiments of the invention are described below. In the interest of clarity, not all features of an actual implementation are described in this specification. It will of course be appreciated that in the development of any such actual embodiment, numerous implementation-specific decisions must be made to achieve the developers' specific goals, such as compliance with system-related and business-related constraints, which will vary from one implementation to another. Moreover, it will be appreciated that such a development effort might be complex and time-consuming, but would nevertheless be a routine undertaking for those of ordinary skill in the art having the benefit of this disclosure.

The present subject matter will now be described with reference to the attached figures. Various structures, systems and devices are schematically depicted in the drawings for purposes of explanation only and so as to not obscure the present disclosure with details that are well known to those skilled in the art. Nevertheless, the attached drawings are included to describe and explain illustrative examples of the present disclosure. The words and phrases used herein should be understood and interpreted to have a meaning consistent with the understanding of those words and phrases by those skilled in the relevant art. No special definition of a term or phrase, i.e., a definition that is different from the ordinary and customary meaning as understood by those skilled in the art, is intended to be implied by consistent usage of the term or phrase herein. To the extent that a term or phrase is intended to have a special meaning, i.e., a meaning other than that understood by skilled artisans, such a special definition will be expressly set forth in the specification in a definitional manner that directly and unequivocally provides the special definition for the term or phrase.

Generally, the subject matter disclosed herein relates to a technique that provides enhanced transport capabilities in a complex manufacturing environment, in which respective substrates or wafers for microstructure devices may be exchanged between the respective process tools on the basis of an automated transport system. For this purpose, the orientation of the respective wafers during transportation is selected such that a significant reduction of the footprint of the automated transport system may be obtained. As previously explained, in conventional strategies for operating automated transport systems in semiconductor facilities, respective transport carriers or containers, such as FOUPs (front opening unified pods), are provided and are configured to receive and support the respective substrates in a substantially horizontal manner relative to the ground or floor of the clean room. For a standard lot size of 25 wafers and a typical substrate diameter of 200 mm, a corresponding transport carrier may have a similar height and width. However, when respective transport carriers for a reduced lot size may be used, for instance with respect to enhanced flexibility in scheduling their complex manufacturing flow in the environment, in conventional strategies, substantially the same amount of area may be required by a correspondingly adapted transport system, wherein a corresponding increase of transport capabilities may be required by enhanced scheduling regimes, a significant amount of area of the clean room may be occupied by the automatic transport system. The corresponding situation may even be more critical in a respective manufacturing environment, in which wafers of increased size, such as 300 mm, have to be processed. In this situation, the area consumption of horizontally oriented wafers in combination with enhanced transport capabilities may significantly contribute to a larger layout of the corresponding facility, thereby increasing the corresponding costs. The subject matter disclosed herein provides a more efficient utilization of the available floor space in the respective clean room environment by appropriately positioning the substrates in an area efficient manner. For instance, the substrates may be positioned and oriented wherein they are substantially vertical relative to the ground or floor of the clean room, and wherein the planar surface of the substrates are substantially parallel to the transport direction. Thus, for a given transport capability, significant reduction of required floor space may be achieved since the corresponding increase in height is typically not a problem as the respective height in the clean rooms is readily available. In particular, if reduced lot sizes may be increasingly introduced as a standard metric in complex manufacturing environments, an even further enhanced reduction of floor space required by the transport system of a given transport capacity may be achieved compared to conventional strategies, in which a reduction of lot size may not result in any area saving of the corresponding transport system.

The subject matter disclosed herein is thus highly advantageous for production facilities using wafers of large diameters, such as 300 mm, 450 mm, or any other wafer size that may become a standard substrate size in future technology nodes. However, the subject matter disclosed herein may also be advantageously applied to manufacturing environments with reduced wafer sizes, such as 200 mm and the like, especially if reduced standard lot sizes are to be implemented in the corresponding environment, for instance by stacking respective wafers in the vertical direction in order to significantly reduce the width of the corresponding transport carriers.

FIG. 1a schematically illustrates part of a manufacturing environment 150, which may represent a process line including a plurality of process tools 151A, 151B, in which respective substrates, such as wafers in a plate-like form, may be processed in order to form microstructure devices thereon and therein. Furthermore, the manufacturing environment 150 may comprise an automated transport system 100 that is configured to provide substrates to at least some of the tools 151A, 151B. The transport system 100 may be an automated system which may receive respective transport carriers or containers 110A, 110B from dedicated portions, such as load ports of the process tools 151A, 151B, and may convey the respective transport carriers 110A, 110B from a source tool to a destination tool under the control of an appropriate supervising control unit. The corresponding transport system 100 may also represent a part of an automated material handling system (AMHS), as is typically provided in sophisticated semiconductor facilities. The system 100 may comprise a plurality of respective rails 101 or any other appropriate mechanical structures which may be used as support and guide elements for respective conveyor devices (not shown) receiving the corresponding transport carriers 110A, 110B. The rails 101 may define a direction of motion as indicated by 101M. The corresponding rails 101 may therefore require a certain amount of area of the environment 150, depending on the lateral dimensions of the respective transport carriers 110A, 110B and depending on the number of respective rails 101, which may, among others, determine the overall transport capacity of the transport system 100.

Since the dimensions of the transport system 100 in the height direction, i.e., the direction perpendicular to the drawing plane of FIG. 1a, may be readily extended, the transport system 100 is configured to appropriately increase the height of the respective transport carriers 110A, 110B for the benefit of a significantly reduced lateral size 110L or width of the transport carriers 110A, 110B. It should be appreciated that the term “lateral” indicates a positional information describing a substantially horizontal orientation, which is, however, substantially perpendicular to the direction of movement 101M defined by the rails 101. Thus, the lateral size, indicated as 110L, may substantially determine the minimal distance between adjacent rails 101. Thus, by reducing the lateral size or width 110L of the respective transport carriers 110A, 110B, an increased number of rails 101 and, thus, an increased transport capability may be implemented in the manufacturing environment 150. It should be appreciated that even if one or more of the rails 101 may be stacked in the vertical direction, nevertheless a significant reduction of required floor space within the environment 150 may be achieved by reducing the lateral size for a given transport capacity of the containers 110A, 110B.

During the operation of the transport system 100 in the manufacturing environment 150, the respective load port stations in the process tool 151A may appropriately load substrates 121 into the transport carriers 110A, as will be described later on in more detail, and the corresponding carriers 110A, 110B may be exchanged between respective process tools via the transport system 100 according to a well-defined scheduling regime, which may significantly depend on the overall transport capabilities of the system 100. During transportation, the substrates 121 are orientated substantially vertical relative to the ground or floor of the clean room within the transport carriers 110A, 110B, while it should be understood that the term “vertical” with respect to the transport orientation of the substrates 121 is to be understood as a vertical orientation, wherein the substrates 121 are concurrently aligned wherein their faces 121S are substantially parallel to the direction of movement 101M that is defined by the rails 101.

FIG. 1b schematically illustrates front views of carriers to present a comparison of a conventional carrier configuration, i.e., a carrier configured for horizontal support of the wafers, relative to the substantially vertical orientation according to illustrative embodiments disclosed herein. In the upper portion of FIG. 1b, a conventional transport carrier 120A is shown which may, for instance, be designed for receiving 25 wafers having a diameter of 200 mm, which is a commonly used standard wafer size for semiconductor production. Consequently, the conventional transport carrier 120A may have a substantially square-like cross-section, wherein the lateral size thereof 120L is substantially determined by the diameter of the substrate 121. Similarly, a conventional substrate carrier 120B, wherein the corresponding substrate 121 may have a diameter of 300 mm, may have the lateral dimension 120L as substantially determined by the diameter of 300 mm. However, the respective height of the conventional carrier 120B indicated as 120H may be significantly less compared to the lateral dimension 120L, and may be, for instance, for a standard lot size of 25 wafers, approximately 240 mm. Thus, in conventional transport systems, the lateral size and, thus, the amount of floor space required is substantially determined by the diameter of the respective substrates that have to be handled by the corresponding transport system, wherein, for instance, a reduction of the standard lot size may actually not contribute to any reduction of the required floor space, since this may only reduce the corresponding height of the conventional transport carriers 120A, 120B.

In the lower part of FIG. 1b, the respective transport carriers 110A, 110B according to illustrative embodiments are illustrated, wherein, for instance, the transport carrier 110A on the left-hand side may represent a carrier for 200 mm wafers for a standard lot size that is comparable to the standard lot size of the carrier 120A. In this case, the respective substrates or wafers 121 may be positioned so as to be substantially vertically oriented relative to the ground or floor of the clean room, wherein, in the embodiment shown, the respective substrates 121 may be vertically stacked in the carrier 110A to provide two levels, thereby providing a reduced lateral size 110L, while nevertheless providing the potential for accommodating a comparable number of substrates or even an increased number of substrates compared to the transport carrier 120A. In other illustrative embodiments, the carrier 110A for receiving 200 mm wafers may be designed so as to accommodate a reduced number of substrates, such as 12 substrates or even less, thereby providing a significantly reduced lateral dimension 110L as previously explained, while the reduced standard lot size may provide enhanced scheduling flexibility and the like, as previously explained. Thus, in this case, with substantially the same amount of floor space required by the transport system 100, the transport capacity may be doubled, that is, the number of rails 101 may be doubled, thereby providing the desired enhanced flexibility for scheduling the substrate flow in the manufacturing environment 150. On the other hand, by providing a corresponding transport carrier having a stacked configuration, as shown in FIG. 1b on the left-hand side, the transport capability per transport event may be comparable to the conventional system or may even be enhanced, depending on the number of wafer levels. Consequently, even for standard wafer sizes of 200 mm, a significant enhancement of transport capacity and/or scheduling flexibility may be provided. It should be appreciated that the corresponding transport system 100 may even be incorporated in existing transport systems by appropriately modifying the corresponding load port systems of the conventional process tools.

On the right-hand side of FIG. 1b, the transport carrier 110A is shown according to an embodiment corresponding to a wafer size of more than 200 mm, such as 300 mm, or even more. In this case, a significant reduction of the lateral size 110L may be achieved compared to the lateral size 120L of the conventional transport carrier 120B for otherwise identical transport capacity, thereby providing the same advantages as previously described. Furthermore, in the case of generally reduced standard lot sizes, the discrepancy in efficiency between vertical wafer transport and conventional horizontal transport increases, since the reduction of the number of wafers may respectively translate into a corresponding reduction of the lateral dimension 110L, contrary to the conventional carriers. As previously explained, a corresponding development may increase flexibility of the material handling process in the environment 150, and further increased substrate diameters, such as 450 mm, are likely to become standard lot sizes.

FIG. 1c schematically illustrates the transport carrier 110A according to another illustrative embodiment, in which the carrier 110A may have at least one compartment 111 for accommodating the substrate 121 having a diameter of approximately 450 mm or even more. In the embodiment shown, the carrier 110A may be configured for a maximum lot size of 12 wafers, wherein it should be appreciated that, in other illustrative embodiments, any appropriate number of compartments 111 may be provided, as is required by the manufacturing environment 150. In some illustrative embodiments, a single compartment 111 may be provided per carrier 110A in order to provide single wafer processing and transport within the environment 150, thereby reducing the wafer cycle time. Furthermore, due to the substantial vertical orientation of the substrate 121, at least during transport, a significant deformation of the substrate 121 may be reduced or avoided compared to conventional horizontal orientation of the wafers. A corresponding deformation may be significant for large diameters such as 450 mm, which may necessitate additional measures, such as specifically designed support elements and the like, which may therefore introduce additional complexity in the process of loading and unloading the substrates 121, when horizontally oriented. Furthermore, the carrier 110A may comprise a respective coupling unit 112, which may be configured to engage with the respective rails 101 in the transport system 100 For this purpose, well-established coupling devices or any other appropriate fastening systems may be used.

It should be appreciated that the design with respect to the compartments 111, the number thereof and the like may, in a similar manner, be applied to any of the transport carriers 110A, 110B, irrespective of the size of the respective wafers 121 to be conveyed therein. For example, the carrier 110A as shown in FIG. 1c may also be configured to have one or more compartments stacked vertically on top of each other, for instance as shown in FIG. 1b on the left-hand side, thereby providing high transport capacity per each transport event while nevertheless providing a reduced lateral size. In other illustrative embodiments, the transport system 100 may be configured to convey two or more of the transport carriers 110A in a vertically stacked manner, at least within space critical areas of the manufacturing environment 150, thereby also contributing to enhanced transport flexibility and capability, while not unduly contributing to floor space consumption.

FIG. 1d schematically illustrates a comparison of a conventional transport system, which may, for instance, be designed for substrates 121 having a large diameter such as 450 mm on the basis of a transport system having two substantially parallel rails.

In the upper portion of FIG. 1d, respective conventional transport carriers 120 are shown to be attached to the rails 101, wherein the conventional horizontal orientation is used during transport. Consequently, a lateral dimension of at least approximately 1000 mm may be required, or even more, depending on the complexity of the corresponding transport carriers 120.

In the lower portion of FIG. 1d, a corresponding arrangement may be illustrated in accordance with one illustrative embodiment, wherein the vertical orientation of the substrates provides a significant reduction of the overall lateral dimension 110L required by the rail system of the transport system 100, as indicated by the dashed lines, wherein, contrary to the conventional design, a further reduction of the maximum lot size to be used in the environment 150 may even further reduce the corresponding lateral dimension 110L. Consequently, the transport capability of the system 100 may be significantly increased compared to the conventional system as shown in the upper portion of FIG. 1d by providing a respective increased number of rails 101 for a given floor space.

As a consequence, by substantially vertically orienting relative to the ground or floor of the clean room the substrates or wafers 121 during transport, the corresponding transport capability of the system 100 may be significantly increased for a given amount of required floor space, or the number of transport events may be increased by providing a respective increased number of rails without unduly contributing to further floor space consumption. Consequently, even in existing complex manufacturing environments, the standard lot size may be efficiently reduced, for instance in view of flexibility for handling the overall process flow, by appropriately increasing the transport capability, wherein existing clean room layouts may still be used. On the other hand, manufacturing environments based on substrates of large diameter may be equipped with highly efficient transport systems without undue space consumption. However, the subject matter disclosed herein may not only be advantageous with respect to the flexibility and capability of the respective transport system, but may also provide increased i/o (input/output) capabilities of the respective process tools by providing respective load port systems, which may be adapted to receive the corresponding transport carriers with vertically oriented wafers contained therein. Also, as in the case of the transport system 100, respective process tools may require increased load/unload capabilities to accommodate an increased number of carrier exchange events without unduly affecting the overall throughput of the respective process tools. That is, the carrier exchange time, i.e., the time for receiving a transport carrier in a load port and dispatching a carrier from the tool to the transport system, may be substantially independent from the number of substrates contained in a respective carrier. Thus, if, in general, a reduced number of substrates may be contained in the carriers, for instance in view of process flexibility, the number of carrier exchange events may have to be increased in order to maintain the desired tool utilization. In this case, an increased number of load ports may be necessary, which may also result in undue floor space consumption while the effective wafer processing area of the process tool may actually not need to be increased.

FIG. 2a schematically illustrates a side view of a portion of a process tool 251, which may represent any process tool as may be used in a complex manufacturing environment for processing microstructure devices. The process tool 251 may comprise a load port system 260, which may be configured to receive or dispatch a transport carrier 210 containing vertical oriented substrates 221. The load port system 260 may further comprise a wafer handling unit 261, which may be configured to access the transport carrier 210 for removing or inserting the respective wafers 221 in their substantially vertical orientation. For this purpose, any well-established mechanical systems, such as robot arms, vacuum grippers and the like, may be used. Furthermore, the wafer handling unit 261 may be configured to appropriately position the substrate 221 with respect to the further processing in the process tool 251. For instance, as shown when the subsequent process chambers in the tool 251 or any further transport entities in the tool 251 may require a substantially horizontal orientation of the substrates 221, the wafer handling unit 261 may appropriately position the substrate for the further processing in the tool 251. Hence, the load port system 260 may provide an appropriate mechanical interface for a transport system, which may provide the substrates 221 in a substantially vertical orientation relative to the ground or floor of the clean room, such as a transport system 100 described above in combination with respective transport carriers 110A, 110B.

FIG. 2b schematically illustrates the load port system 260 in a front view according to illustrative embodiments disclosed herein. In this example, the load port system 260 may comprise a plurality of load port stations 260A, 260B, 260C in order to provide a high input/output capability of the tool 251, as may be required when handling small lot sizes in the respective manufacturing environment. Thus, each of the load port stations 260A, 260B, 260C may receive or dispatch a corresponding transport carrier 210A, 210B, 210C, in which a respective number of substantially vertically oriented substrates may be contained. As previously explained with respect to the transport system 100, also in this case, the lateral size of the load port system 260 may be significantly reduced compared to a conventional system providing the same degree of input/output capability on the basis of horizontally oriented substrates. Also in this case, the respective height of the load port system 260 may be less critical, while, however, the percentage of floor space occupied by the system 260, compared to the actual process chambers of the tool 252, may be significantly reduced compared to a horizontal arrangement. Furthermore, in some illustrative embodiments, a respective vertically stacked configuration may be implemented into the system 260, wherein two or more of the transport carriers 210A, 210B, 210C may be vertically stacked in order to further reduce the corresponding lateral dimensions. In other illustrative embodiments, the vertical stacked arrangement may be obtained by using respectively stacked transport carriers, such as the carrier 110A as shown in FIG. 1b on the left-hand side having two or more wafer levels.

FIG. 2c schematically illustrates the load port system 260 according to a further illustrative embodiment. In this embodiment, the system 260 may comprise a carrier handling unit 262 which may be configured to receive the transport carrier 210, with the corresponding substrates 221 in the substantially vertical orientation and to perform a respective rotation in order to transfer the carrier 210 in a substantially horizontal orientation, when a corresponding horizontal orientation of the substrates 210 may be required for the further handling in the respective process tool.

FIG. 2d schematically illustrates the load port system 260 in a corresponding operating state, in which the transport carrier 210 may be rotated by 90 degrees in order to provide a substantially horizontal orientation for the further handling of the substrates 221. Hence, providing the load port system 260 as described with reference to FIGS. 2c-2d, a high degree of compatibility with conventional wafer handling processes may be achieved, since the respective carrier handling unit 262 may be based on conventional wafer handling units and may be modified so as to be able to perform an additional 90 degree rotation.

As a result, the subject matter disclosed herein relates to a technique in which respective wafers are transported by an automatic transport system in a complex manufacturing environment for processing wafers, such as semiconductor wafers, wherein, at least during transportation, the respective wafers are substantially vertically oriented relative to the ground or floor of the clean room, that is, the plate-like substrates are positioned in a substantially upright orientation and are aligned such that the faces of the substrates are substantially parallel to the direction of motion, defined by the length direction of the rails or other guide elements in order to significantly reduce the lateral size or width of the respective transport carriers and, thus, of the required floor space of the corresponding transport system. In this way, the transport system may be provided with an increased transport capacity without consuming precious floor space of the clean room. Thus, the clean room space may be utilized more efficiently for process relevant requirements, i.e., for actually processing the substrates. Even the vertical air flow in the clean room may be enhanced due to the reduced cross-sectional area that is “seen” by the vertical air flow when the respective transport carriers are provided with vertically arranged wafer compartments. In particular, significant space savings may be achieved in combination with large diameter substrates, such as substrates having a diameter of 300 mm and significantly more, such as 450 mm substrates, wherein a significant wafer deformation may be reduced during transport and storage of the large diameter wafers compared to a conventional horizontal orientation. Furthermore, the subject matter disclosed herein provides increased transport capabilities in future process flow control strategies, in particular, when the maximum number of substrates per the transport event may be reduced for the benefit of reduced cycle time and increased efficiency and flexibility. Furthermore, the interface capabilities of process tools may also be enhanced by providing respective load port systems adapted to handle vertically oriented substrates, thereby also supporting process strategies with reduced lot sizes and increased wafer diameters.

The particular embodiments disclosed above are illustrative only, as the invention may be modified and practiced in different but equivalent manners apparent to those skilled in the art having the benefit of the teachings herein. For example, the process steps set forth above may be performed in a different order. Furthermore, no limitations are intended to the details of construction or design herein shown, other than as described in the claims below. It is therefore evident that the particular embodiments disclosed above may be altered or modified and all such variations are considered within the scope and spirit of the invention. Accordingly, the protection sought herein is as set forth in the claims below.

Claims

1. A transport carrier for substrates for microstructure devices, comprising:

a body, said body comprising one or more compartments for receiving and supporting a substrate in a substantially vertical orientation relative to ground during transport.

2. The transport carrier of claim 1, further comprising a coupling mechanism configured to releasably connect said transport carrier with a conveyor of an automatic transport system.

3. The transport carrier of claim 1, wherein said one or more compartments are configured to receive a substrate having a diameter of approximately 200 mm.

4. The transport carrier of claim 1, wherein said one or more compartments are configured to receive a substrate having a diameter of approximately 300 mm.

5. The transport carrier of claim 1, wherein said one or more compartments are configured to receive a substrate having a diameter of approximately 450 mm.

6. The transport carrier of claim 1, wherein said transport carrier has a width dimension and a height dimension, said height dimension being substantially vertical when said transport carrier is in its transport orientation, wherein said width dimension is less than said height dimension.

7. The transport carrier of claim 1, wherein said transport carrier comprises at least two compartments, said at least two compartments being vertically stacked.

8. The transport carrier of claim 1, wherein said one or more compartments are further configured to support said wafer when said transport carrier is rotated to position said wafer in a substantially horizontal orientation.

9. A load port system for a process tool of a manufacturing environment for processing substrates, said load port system comprising:

a carrier handling unit configured to receive a transport carrier including at least one compartment for supporting a substrate in a substantially vertical orientation relative to ground.

10. The load port system of claim 9, further comprising a substrate handling unit configured to access said at least one compartment when positioned in said substantially vertical orientation.

11. The load port system of claim 9, wherein said carrier handling unit is configured to rotate said transport carrier to position said at least one compartment in a substantially horizontal orientation.

12. The load port system of claim 9, wherein said carrier handling unit is configured to handle transport carriers containing substrates of 200 mm diameter.

13. The load port system of claim 9, wherein said carrier handling unit is configured to handle transport carriers containing substrates of 300 mm diameter.

14. The load port system of claim 9, wherein said carrier handling unit is configured to handle transport carriers containing substrates of 400 mm diameter.

15. A method, comprising:

conveying a substrate to a process tool of a manufacturing environment for processing microstructure devices by an automated transport system, said substrate having a substantially vertical orientation relative to ground during transport.

16. The method of claim 15, wherein one or more further substrates are conveyed in a substantially vertical orientation concurrently with said substrate.

17. The method of claim 16, wherein at least one of said one or more further substrates is arranged horizontally adjacent to said substrate.

18. The method of claim 16, wherein at least one of said one or more further substrates is arranged vertically adjacent to said substrate.

19. The method of claim 15, wherein conveying said substrate comprises positioning said substrate in a transport carrier adapted to support said substrate in a substantially vertical transport orientation, and wherein said substrate is removed from said transport carrier by said process tool in the substantially vertical orientation.

20. The method of claim 15, further comprising receiving said substrate at said process tool, said substrate being contained in a transport carrier and rotating said transport carrier in said process tool so as to position said substrate into a substantially horizontal orientation.

21. A system, comprising:

an automatic transport system configured to supply substrates; and

a process tool configured to receive from said automatic transport system and to process substrates, said process tool receiving said substrates in a substantially vertical orientation relative to ground.