HIGH PERFORMANCE ARCHITECTURE FOR PROCESS TRANSMITTERS
A process transmitter includes at least one sensor which monitors a process variable, and analog-to-digital (A/D) converter circuitry coupled to the at least one sensor and configured to provide process variable data indicative of process variable values. A digital signal processor (DSP) is coupled to the A/D converter circuitry to receive the process variable data. The DSP comprises a co-processor configured to receive and perform calculations on the process variable data from the A/D converter circuitry to generate output data. Communications circuitry of the process transmitter is configured either to control communication over loop wiring which can be coupled to the process transmitter, or to control wireless communications with the process transmitter. A microprocessor, separate from the co-processor of the DSP, is coupled between the co-processor and the communications circuitry to control movement of the output data from the DSP to the communications circuitry.
Process transmitters generally include process variable sensors and measurement circuitry for measuring process related parameters (temperature, pressure, flow rate, volume, etc.). Process transmitters also include output circuitry for transmitting a process parameter output to instrumentation and control equipment. Frequently, this transmission is over an analog circuit, such as a 4-20 mA current loop, which requires analog output circuitry. Also, it is common for process transmitters to transmit process related information using pulse output circuitry to transmit pulses over the current loop or digital communication circuitry to transmit digital signals over the 4-20 mA current loop.
Most “smart” process transmitters share a common architecture which centers around a microcontroller. The demands on the microcontroller are very high as it must generally operate under micro power (typically under 1 mA) requirements; it must read, process and publish sensor updates at a regular rate; it must generally provide signal correction functions to compensate primary sensed variables for various sources of error; it must support digital communication functions; and it must perform and manage diagnostic activities to ensure accurate operation of the process transmitter. Implementation of a system which satisfies the requirements in all of these areas taxes the resources of modern microcontrollers. The resources fall into 3 categories: power consumption, memory space, and execution time.
Microcontroller technology has improved over the years providing much more capability than existed previously. However product requirements and marketing desires have seemingly outpaced advances in microcontroller technology. Future generations of process transmitter products could require more speed, more sophisticated correction algorithms, multi-variable support, and advanced diagnostics, for example. Often, legacy process transmitter architectures only allow incremental improvements to be made to support these needs, potentially falling short of future process transmitter needs.
The discussion above is merely provided for general background information and is not intended to be used as an aid in determining the scope of the claimed subject matter.SUMMARY
A process transmitter includes at least one sensor which monitors a process variable, and analog-to-digital (A/D) converter circuitry coupled to the at least one sensor and configured to provide process variable data indicative of process variable values. A digital signal processor (DSP) is coupled to the A/D converter circuitry to receive the process variable data. The DSP comprises a co-processor configured to receive and perform calculations on the process variable data from the A/D converter circuitry to generate output data. Communications circuitry of the process transmitter is configured to control communication over loop wiring or to control wireless communications with the process transmitter. A microprocessor, separate from the co-processor of the DSP, is coupled between the co-processor and the communications circuitry to control movement of the output data from the DSP to the communications circuitry for wireless communication or communication over the loop wiring.
Most “smart” process transmitters share a common architecture which centers around a microcontroller as depicted in
As shown in
As can be seen, the demands on the microcontroller are very high as it must typically adhere to requirements, which are provided as examples and are not represented as being absolute requirements, such as those included in the following list:
- Micro power operation (under 11 mA)
- Real time operating system: it must read, process, and publish sensor updates at a regular rate (e.g., typically every 45 mS)
- Signal correction: it reads sensor information and executes a correction algorithm to compensate the primary variable for various sources of error.
- Digital communication: all smart devices support a digital communication protocol (e.g., the HART® communication protocol). This places a burden on the microcontroller to accept and validate messages, compose a response, and publish.
- Diagnostic activity: the controller must manage diagnostic activity that ensures accurate operation of the device.
As noted above, implementation of a system in a process transmitter which satisfies the requirements in all of these areas taxes the resources (e.g., power consumption, memory space, and execution time) of modern microcontrollers. Given that the process transmitter product requirements often outpace improvements in microcontroller technology, different process transmitter architectures are disclosed which allow performance improvement beyond what microcontroller technology improvements would otherwise allow. These process transmitter architectures can help to provide more speed (e.g., 20 mS update rates), more sophisticated correction algorithms, multi-variable support, and advanced diagnostics, for example, without exceeding power limitations.
The term “DSP” (digital signal processor) refers to a broad range of techniques for operating on digital (binary) signals. The implementation is typically hardware oriented, but it can also be done using software executed by a microcontroller. The advantage of using a hardware approach is that computational operations can be done much more efficiently than a software approach. To this end there are many off the shelf hardware DSP products available. The vast majority of these products however are geared for high speed, high power environments where current consumption can easily exceed 1001 mA. Since these devices are designed to run fast (e.g. 100 MHz) they typically do not allow their power/performance to scale to the power levels that loop powered process instruments demand.
In exemplary embodiments, a DSP is used which is a mixture of hardware operating algorithms and software operating in a coprocessor. This takes advantage of lower power for hardware implementations (at the cost of flexibility) and software to provide flexibility and to facilitate easy update processes. Examples of such mixed DSP architectures include flowmeter DSP chips that utilize hardware filters and a coprocessor configured with software. In the present embodiments, hardware can be used to implement polynomial equations that determine pressure from the AD converter values and temperature values for the various sensors that are used. In these equations, only the coefficients need to be changeable, and that can be handled using registers.
Unlike conventional process transmitter architectures in which a microcontroller, such as microprocessor 230, handles both the sensor data processing (e.g., calculation, compensation, etc.) functions and the communication functions for transmitting the sensor related data over a two-wire process loop, in the architecture used in
DSP 210 reads the values provided by A/D converters 204 over an SPI bus and stores them in input data registers 212. Co-processor 215 in DSP 210 then calculates the output values, stores them in output data registers 217, and creates an interrupt to the microprocessor 230 which has associated memory such as E2 or FRAM memory, for example. Generally, microprocessor access to the A/D converters will be provided through DSP 210 to avoid timing issues and bus contention issues.
Once the microprocessor 230 receives the sensor information calculated by DSP 210, it controls the transmission of the data over the process loop 145 using a digital communication modem and/or a digital-to-analog converter (DAC). In the illustrated embodiment, the digital communication modem and the DAC are combined into a single communications circuitry chip 240. However, in other embodiments, separate digital communication modem and DAC chips are used. The representation of these circuits in a single chip does not limit disclosed embodiments to this configuration. An example of a digital communications modem is a HART modem which communicates over the two-wire process loop 145 using the HART communications protocol. Loop communications can also be through other industry standard communication protocols. Examples of suitable industry standard communication protocols include, but are not limited to, HART®, FOUNDATION™ Fieldbus, Profibus-PA and Controller Area Network (CAN). Illustration in the present FIGS. of digital communications modems in the form of HART® modems is an example only, and does not limit disclosed embodiments to the HART® communication protocol.
A HART® filter 245 is coupled to the 4-20 mA lines of the process loop and filters out the DC component so that a frequency shift keying (FSK) signal used in HART® communications can be analyzed. The DAC is used to control the output circuit 250, which in turn sets the 4-20 mA current on loop 145. The digital communications modem is used to transmit a digital signal over the current loop via the output circuit 250. Communication with the digital communications modem or DAC is implemented, for example, using CS and SPI bus lines. Also, for the digital communications modem portion of communications circuitry 240, a transmit data (TXD)/receive data (RXD) line between the microprocessor 230 and the communications circuitry 240 is also used to control the transmission or receipt of digital data. A transmit data line and signal (TXA) is provided between circuitry 240 and output circuit 250 to control the output circuit to thereby facilitate the digital communications over the loop. A one-bit signal MSB (e.g., most significant bit signal), which is a pulse density modulated signal, can be provided from the DAC portion of the communications circuitry to the output circuit 250 to control the loop current levels.
In addition to handling communication functions over the process loop, microprocessor 230 also controls other communications functions, such as controller area network (CAN) communications. A SPI-to-CAN communications chip communicates between microprocessor 230 and CAN devices, using INT, CS and SPI bus lines in the illustrated embodiment. Also, microprocessor 230 communicates with a diagnostics A/D converter 270 which is used for purposes of diagnostics and monitoring safe operation of the system. In an example embodiment, A/D 270 is a 10-bit device used in conjunction with monitoring loop current levels, supply voltage levels, reference power and other voltages, and board temperature.
In the architecture utilized in process transmitter 200-1, microprocessor 230 is unburdened by the conventional tasks of handing measurement channel A/D interrupts and the resulting computations on sensor data. Instead, microprocessor 230 is reserved primarily for communications or system control. This is particularly useful since, with the low power levels which are available for process transmitters powered from the process loop 145, the main microprocessor has had difficulty in keeping up with faster sample rates (resulting in faster interrupt rates, etc).
Depending on the application, wireless communication module 280 may be adapted to communicate in accordance with any suitable wireless communication protocol including, but not limited to: wireless networking technologies (such as IEEE 802.11(b) wireless access points and wireless networking devices built by Linksys of Irvine, Calif.) cellular or digital networking technologies (such as Microburst® by Aeris Communications Inc. of San Jose, Calif.), ultra wideband, global system for mobile communications (OSM), general packet radio services (GPRS), code division multiple access (CDMA), spread spectrum technology, short messaging service/text messaging (SMS), or any other suitable radio frequency wireless technology. Further, known data collision technology can be employed such that multiple process transmitters and/or handheld field maintenance tools employing radio frequency communication module 280 can coexist and operate within wireless operating range of one another. Such collision prevention can include a number of different radio-frequency channels and/or spread spectrum techniques. Additionally, communication module 280 can be a commercially available Bluetooth communication module. In the embodiment illustrated in
Remaining process transmitter embodiments are illustrated, for example purposes, as being of types which couple to and communicate via a process control loop (e.g., wired embodiments). However, it must be understood that each of these embodiments should be interpreted as also encompassing a corresponding wirelessly communicating process transmitter embodiment. In these corresponding wireless embodiments, circuitry (shown in the corresponding wired embodiment) relating to communication over the process control loop can be replaced with wireless communication module 280. Further, due to the common architectures employed, for discussion purposes, process transmitters 200-1 and 200-2 are hereafter generically referred to as process transmitter “200”, and
To allow these functions from various circuit components to be combined into a single communications module 420, the DAC functions from communication circuitry 240 is separated from the digital modem functions, allowing the digital modem functions to be implemented in the communications module. The DAC circuitry can then instead be implemented elsewhere as a stand alone integrated chip (IC) if desired. In an exemplary embodiment as illustrated in
DSP 510, which implements similar functions as described above with reference to DSP 410 shown in
In some optional embodiments, as illustrated, microprocessor 230 and A/D converters 504 can communicate directly between each other for diagnostics configuration, or other purposes. This is facilitated in process transmitter 500 via the addition of INT, CS and SPI bus lines connecting A/D converters 504 and microprocessor 230. Also, instead of (or in addition to) communication between A/D converters 504 and DSP 510 using the HSD lines, an encoder 506 and a decoder 508 can optionally be added to the process transmitter to facilitate secure communications between the A/D converters 504 and remaining portions of the process transmitter.
In process transmitter 500, analog components can be completely separated from digital components, using a three or more ASIC configuration. With the decimation filter function added to DSP 510 along with other digital functions, smaller geometries can be used for the digital components, and less power consumption can result. This can be an important factor as process transmitter manufacturers attempt to add more and more functionality to their devices, while still being constrained by the same power limits.
The HSD lines from sigma-delta modulators 706 are fed into a data encoder 707, which combines the data streams from the sigma-delta modulators into a single data stream. The single data stream is passed through an isolation transformer 708, and provided to a data decoder 709 included within DSP ASIC 710. The decoder 709 separates the single data stream back into separate data streams. Decimation filters 515 inside the DSP 710 then transform each individual data stream into multi-bit words. Each multi-bit word is then stored in a data register 212. Although in some FIGS. decimation filter 515 and data register 212 are illustrated by single boxes, these circuitry components can be implemented using multiple decimation filters and multiple data registers, as shown in
Aside from the inclusion of data decoder 709, DSP 710 functions very similarly to the architectures described above. Co-processor 215 is again coupled to data registers 212 and is configured to perform calculations on the data in registers 212. A DAC register 712 is optionally included for storing data from co-processor 215 before it is provided as an input to DAC 415 for controlling output circuit 250 to set the 4-20 mA current on the loop wiring 145. Also as in above-described architectures, an SPI data register 520 is coupled to co-processor 215 and other components to facilitate SPI communications with microprocessor 230. Microprocessor 230 again controls digital communications via digital communication modem 742.
Also shown in DSP 710 is optional communication detection circuitry 720 which detects whether communication with the sensors/sigma-delta modulators has been interrupted so that the microprocessor 230 in charge of communication over the loop wiring can be notified accordingly. Also optionally included in DSP 710 in flowmeter embodiments of process transmitter 700 is pulse output circuitry 725 coupled between co-processor 215 and output circuit 250. Pulse output circuitry 725 controls output circuit 250 to generate a pulse output, the frequency of which is indicative of flow. A totalizer circuit 730 coupled to the pulse output is configured to keep a total flow count based on the pulse output.
Also included in process transmitter 700 is clock circuit 735 which provides a clock signal for operation of components. Optionally, a second isolation transformer 740 can be used to provide the clock signal also to DSP 710 while maintaining the isolation of the DSP from the measurement channel circuitry. Two other optional components in process transmitter 700 include communication decoding circuitry 745 and failure data storage circuitry 750. The communication decoding circuitry 745 is coupled to data encoder 707 and used to decode the encoded data for various purposes such as diagnostic functions, etc. The failure data storage circuitry 750 stores data indicative of failures in sensor or other component functionality.
Although the present invention has been described with reference to example embodiments, workers skilled in the art will recognize that changes may be made in form and detail without departing from the spirit and scope of the invention. For example, various features of different embodiments can be combined for particular implementations. Although the subject matter has been described in language specific to structural features and/or methodological acts, it is to be understood that the subject matter defined in the appended claims is not necessarily limited to the specific features or acts described above. Rather, the specific features and acts described above are disclosed as example forms of implementing the claims.
1. A process transmitters comprising:
- at least one sensor which monitors a process variable;
- analog-to-digital (A/D) converter circuitry coupled to the at least one sensor and configured to provide process variable data indicative of process variable values;
- a digital signal processor (DSP) coupled to the A/D converter circuitry to receive the process variable data, the DSP comprising a co-processor configured to receive and perform calculations on the process variable data from the A/D converter circuitry to generate output data;
- communications circuitry configured to control communication with the process transmitter; and
- a microprocessor, separate from the co-processor of the DSP, the microprocessor coupled between the co-processor and the communications circuitry to control movement of the output data from the DSP to the communications circuitry for communication from the process transmitter.
2. The process transmitter of claim 1, wherein the co-processor of the DSP is configured to receive interrupt requests from the A/D converter circuitry and in response to control communication with the A/D converter circuitry.
3. The process transmitter of claim 2, wherein the process transmitter is configured to be coupled to loop wiring and the communications circuitry is configured to control communication over the loop wiring, and further comprising an output circuit configured to be coupled to the loop wiring to control a 4-20 mA current on the loop wiring.
4. The process transmitter of claim 3, wherein the communications circuitry comprises:
- loop power circuitry configured to control the 4-20 mA current on the loop wiring;
- a digital modem coupled to the output circuit and configured to control the output circuit to communicate over the loop wiring using a digital communications protocol; and
- a digital-to-analog converter (DAC) coupled to the output circuit and configured to provide an analog signal to the output circuit to thereby control the 4-20 mA current on the loop wiring.
5. The process transmitter of claim 4, wherein the digital communications protocol is the HART communications protocol.
6. The process transmitter of claim 4, wherein the DSP is coupled to the DAC to provide a digital value to the DAC for controlling the analog signal and thereby controlling the 4-20 mA current on the loop wiring, and wherein the microprocessor is coupled to the digital modem to control digital communications over the loop wiring using the digital communications protocol.
7. The process transmitter of claim 6, wherein the DSP further comprises the DAC of the communications circuitry.
8. The process transmitter of claim 7, and further comprising a serial peripheral interface (SPI) to controller area network (SPI to CAN) communications circuit coupled to the microprocessor and receiving SPI communications from the microprocessor.
9. The process transmitter of claim 8, and further comprising a communications module comprising the digital modem and the SPI to CAN communications circuit.
10. The process transmitter of claim 9, and further comprising a diagnostics A/D converter coupled to the microprocessor and receiving SPI communications from the microprocessor.
11. The process transmitter of claim 10, wherein the communications module further comprises the diagnostics A/D converter.
12. The process transmitter of claim 9, wherein the A/D converter circuitry coupled to the at least one sensor comprises only analog components, the analog components of the A/D converter circuitry configured to provide outputs indicative of the process variable data over pairs of high speed data (HSD) data lines coupled to the DSP, wherein the DSP further comprises decimation filter circuitry coupled to the pairs of high speed data lines and configured to convert the outputs of the A/D converter circuitry into multi-bit digital words representing the process variable data.
13. The process transmitter of claim 12, and further comprising a mixed mode application specific integrated chip (ASIC), the mixed mode ASIC comprising the communications module and the analog components of the A/D converter circuitry.
14. The process transmitter of claim 13, and further comprising a digital DSP ASIC, the digital DSP ASIC comprising the DSP and the microprocessor.
15. The process transmitter of claim 12, and further comprising a combined analog and digital ASIC, the combined analog and digital ASIC comprising the DSP, the microprocessor, the communications module and the A/D) converter circuitry.
16. The process transmitter of claim 12, wherein the A/D converter circuitry comprises sigma-delta converter circuitry, the process transmitter further comprising:
- data encoding circuitry coupled to the sigma-delta converter circuitry and encoding the outputs of the sigma-delta converter circuitry into a single data signal;
- data decoding circuitry in the DSP and coupled to the decimation filter circuitry, the data decoding circuitry decoding the single data signal into multiple data signals and providing the multiple data signals to the decimation filter circuitry for conversion into multi-bit digital words representing the process variable data; and
- an isolation transformer coupled between the data encoding circuitry and the data decoding circuitry.
17. The process transmitter of claim 16, and flier comprising:
- a clock circuit providing a clock signal to the sigma-delta converters and to the data encoding circuitry; and
- a clock signal isolation transformer coupled between the clock circuit and the DSP to provide the clock signal to the DSP while isolating the DSP from the clock circuit.
18. The process transmitter of claim 2, wherein the communications circuitry comprises a wireless communication module.
International Classification: G08C 19/06 (20060101);