USER DEFINED PROTOCOL FOR ZERO-ADDED-JITTER AND ERROR FREE TRANSMISSION OF LAYER-2 DATAGRAMS ACROSS LOSSY PACKET-SWITCHED NETWORK LINKS

A zero-added-jitter protocol for transmission of datagrams over packet-switched networks between two or more connected microprocessor devices with negligible packet delay variation, adjustable forward error correction, congestion control, and negative acknowledgment datagram recovery. A method for the analysis and preservation of the instantaneous bitrate and packet spacing provides for the output of the datagrams to a network facing provider edge device matching in timing and inter-packet spacing, that which was originally received, along with a pre-configured time-delay for error correction. Additional embodiments provide duplication of path for reduction of re-requests; the splitting of path for faster transport between transmitter and receiver; encryption for more secure transport between transmitter and receiver; compression for more efficient transport between transmitter and receiver; and encryption and compression, for more secure, efficient transport between transmitter and receiver.

Skip to: Description  ·  Claims  · Patent History  ·  Patent History
Description
CROSS-REFERENCE TO RELATED APPLICATIONS

This application is a continuation-in-part application of co-pending U.S. patent application Ser. No. 14/173,183 entitled: “A User Defined Protocol for Zero-Added Jitter and Error Free Transmission of Layer-2 Datagrams Across Lossy Packet-Switched Network Links” U.S. application Ser. No. 14/173,183 filed Feb. 5, 2014, and priority to which is hereby claimed under 35 U.S.C. §120.

STATEMENT REGARDING FEDERALLY SPONSORED-RESEARCH OR DEVELOPMENT

Not Applicable.

INCORPORATION BY REFERENCE

U.S. patent application Ser. No. 14/173,183 entitled: “A User Defined Protocol for Zero-Added Jitter and Error Free Transmission of Layer-2 Datagrams Across Lossy Packet-Switched Network Links” filed Feb. 5, 2014 is expressly incorporated herein by reference in its entirety to form a part of the present disclosure.

FIELD OF THE INVENTION

The invention relates to (most applicable USPTO Class Schedule) CLASS 725, INTERACTIVE VIDEO DISTRIBUTION SYSTEMS, 86 USER-REQUESTED VIDEO PROGRAM SYSTEM: 87. Video-on-demand: 91 . . . Server or headend: 93 . . . Control process: 95 . . . . Channel or bandwidth allocation.

BACKGROUND OF THE INVENTION

Various User Defined Protocols (UDP) enable the transport of layer-2 datagrams, primarily but not limited to carrying media streams across packet switched networks. Prior art is limited to packet recovery, re-request mechanisms, and buffering[1]; to management of the number of re-requests[2]; or to dynamically adjusting the size of the buffer[3],[4], the latter method having been developed specifically for voice communications. These mechanisms correct for packet loss due to congestion, router queue overflow or other transmission errors sometimes present when sending large bursts of data. Prior art lacks means to restore the original instantaneous bitrate and inter-packet spacing which are lost when buffering.

Failure to restore the original instantaneous bitrate and inter-packet spacing may lead to increased jitter, the irregular movement, variation, or unsteadiness that is perceived when watching, measuring or listening to such a media or data stream. All means cited in the prior art attempt to ensure the datagrams are as complete as possible, subject to an upper limit of the maximum time period that a buffer may hold. They do not attempt to restore the original instantaneous bitrate and inter-packet spacing. Prior art [1] notes that transmission re-requests may in fact add jitter, and attempts to minimize the perception of it by time-stamping, leaving it to the receiver to make adjustments.

SUMMARY OF THE INVENTION

In this invention, we present a method for the preservation of the instantaneous bitrate and packet spacing for transmission with zero-added-jitter, even while adding forward error correction as well as a pre-configured time delay for negative error correction.

Embodiment 1 of the present invention analyzes the original instantaneous bitrate and inter-packet spacing of the original transmitted datagrams, calculates a virtual packet size based on the bytes required to fill a private wire or set of point-to-point virtual circuits of predefined bitrate capacity set by the user, in a time equal to the inter-packet interval between the current and previous incoming datagrams, and in addition provides forward error correction for packet recovery, a re-request mechanism for packets which cannot be reconstructed using FEC, network congestion detection and buffering. A transmitter transmits the datagrams from one point in a packet switched network to another. The receiver then outputs datagrams to a network facing provider edge device with zero-added-jitter, because the output matches in timing and inter-packet spacing, that which was originally received, along with a pre-configured time-delay for error correction.

Further embodiments of the invention add duplication of path for higher reliability of transmission, splitting of path for faster transmission, encryption for improved security and privacy of transmission, compression for improved efficiency of transmission, and combined compression and encryption for improved privacy and efficiency.

DESCRIPTION OF THE DRAWINGS

FIG. 1 is a schematic diagram illustrating first embodiment, and

FIG. 2 is a schematic diagram illustrating a second embodiment adding data duplication, and

FIG. 3 is a schematic diagram illustrating a third embodiment adding data splitting, and

FIG. 4 is a schematic diagram illustrating a fourth embodiment adding data encryption, and

FIG. 5 is a schematic diagram illustrating a fifth embodiment adding data compression, and

FIG. 6 is a schematic diagram illustrating a sixth embodiment adding both data compression and encryption.

DETAILED DESCRIPTION OF PREFERRED EMBODIMENTS First Embodiment

In embodiment 1 of the present invention, shown in FIG. 1, the transmitter datagram processing module (1a) contains the virtual packet size calculator (1d) which analyzes the original instantaneous bitrate and inter-packet spacing of the incoming packets which arrive via the network facing provider edge device (1c). It calculates a virtual packet size based on the bytes required to fill a private wire or set of point-to-point virtual circuits of predefined bitrate capacity set by the user, in a time equal to the inter-packet interval between the current and previous incoming datagrams. It tags the datagram with that calculated virtual packet size. The counter unit (1b) had previously tagged the datagram with a sequence number. The datagram, tagged with the two additional pieces of information, is copied and the copy stored in the datagram storage module (1f) which is part of the negative acknowledgement processing module (1e). The tagged datagram is processed by the Forward Error Correction unit (1q) which tags parity computation data in the datagram header, and creates additional packets of parity computation data according to an FEC mode set by the user along a scale ranging from least bandwidth/least redundancy overhead to highest bandwidth/highest redundancy. A Congestion Control Module (1r), forwards the modified packets including FEC data to the Virtual Provider Edge Device (1t). Should, however, the Congestion Control Module detect bandwidth saturation, it relieves congestion by dropping packets in proportion to the bandwidth saturation.

At the receiver datagram processing module (1i) side of the VLPS (Virtual Private LAN Service) (1h), the datagram arrives through the virtual provider edge device (1j) at the datagram parser module (1k). The datagram parser module examines the sequence, and discards duplicates. If not a duplicate, it is forwarded to the datagram buffer module (1l), and a copy sent to the negative acknowledgement request module (1p).

For the datagrams stored in the datagram buffer module, the gate (1m) reads the tagged virtual packet size, and with it, releases the datagrams on a first-in, first-out basis using the following algorithm:

    • 1. A total value of virtual bytes (TVVB) is calculated for the entire buffer using the sum of all the virtual packet sizes for all the packets stored in it.
    • 2. A fixed virtual total target buffer size (VTTBS) is calculated using the bitrate of the private wire (BPW) and the desired delay (DD) using this formula: VTTBS=BPW (bytes/seconds)×DD (seconds)
    • 3. The gate will output datagrams to the counter removal unit (1n) at a rate that keeps TVVB=VTTBS.

This produces a rate and inter-packet spacing matching the incoming inter-packet spacing as calculated by the virtual packet size calculator, while at the same time provides a fixed precise delay. The datagram restoration unit (1n) removes the tags and the packets are released to the network facing edge provider (1o).

By having matched the rate and inter-packet spacing, embodiment 1 has transported the datagrams without additional jitter, while adding a buffer in which to request and correct errors in transmission.

For the datagrams that had been copied and forwarded to the negative acknowledgement request module, should that module detect a packet missing from the sequence, it first attempts to rebuild the packet using FEC data. If rebuilding is not possible, it sends a negative acknowledgement notification via the virtual provider edge devices and VPLS tunnel to the retransmit module (1g) in the transmitter datagram processor module. The retransmit module retrieves its copy of the specific packet from the datagram storage module, and resends it via the virtual provider edge devices and VPLS tunnel to the datagram parser module in the receiver datagram processing module, which then adds it to the datagram buffer module. If, however, the Congestion Control Module (1r) in the transmitter datagram processing module has detected network saturation, it may drop retransmitted datagrams at random. Dropping retransmitted packets is the primary means by which the Congestion Control Module alleviates saturation. Dropping of packets being transmitted for the first time is a secondary means of alleviation. The Receiver Datagram Processing Module also has a Congestion Control Module (1s). Should congestion be detected, it will drop negative acknowledgement requests at random.

Description—Additional Embodiment 2

Embodiment 2 of the invention, seen in FIG. 2, provides the same process and benefits as that of Embodiment 1, and adds a data duplication module (2d) and redundant path (2r and 2t) between transmitter and receiver to reduce re-requests.

Description—Additional Embodiment 3

Embodiment 3 of the invention, seen in FIG. 3, provides the same process and benefits as that of Embodiment 1, and adds a data splitting module (3d) and a split path (3w and 3q) between transmitter and receiver to transmit up to twice as fast.

Description—Additional Embodiment 4

Embodiment 4 of the invention, seen in FIG. 4, provides the same process and benefits as that of Embodiment 1, and adds a data encryption module (4e) and a data decryption module (4m), providing greater security and privacy for transmission between the transmitter datagram processing module and the receiver datagram processor module.

Description—Additional Embodiment 5

Embodiment 5 of the invention, seen in FIG. 5, provides the same process and benefits as that of Embodiment 1, and adds a data compression module (5e) and a data decompression module (5m), providing more efficient transmission between the transmitter datagram processing module and the receiver datagram processor module.

Description—Additional Embodiment 6

Embodiment 6 of the invention, seen in FIG. 6, provides the same process and benefits as that of Embodiment 1, and adds a data encryption module (6f), a data decryption module (6n), a data compression module (6c) and a data decompression module (6o), providing greater security, privacy and efficiency for transmission between the transmitter datagram processing module and the receiver datagram processor module.

Claims

1. A process of operating two or more connected microprocessor devices of a known type so that the connected microprocessor devices may execute the transmission of datagrams over packet-switched networks with negligible packet delay variation and datagram recovery, said process comprising

a. a transmitter datagram processing module including i. a counter unit to tag each incoming datagram from a network facing provider edge device with a sequential incremental number, ii. a virtual packet size calculator to tag additional information in the datagram header, specifically, the virtual packet size, a number calculated as the bytes required to fill a private wire or set of point-to-point virtual circuits of predefined bitrate capacity set by the user, in a time equal to the inter-packet interval between the current and previous incoming datagrams, and send said tagged datagram to a virtual provider edge device and VPLS tunnel, and iii. a forward error correction (FEC) unit to A. tag parity computation data in the datagram header, and B. create additional packets of parity computation data according to an FEC mode set by the user along a scale ranging from least bandwidth/least redundancy overhead to highest bandwidth/highest redundancy, iv. a congestion control module comprising an algorithm to detect bandwidth saturation and reduce the rate of transmission of datagrams should saturation be detected, by dropping packets firstly in the re transmission stream, or secondly, on the main stream if necessary, in proportion to the bandwidth saturation, v. a negative acknowledgment processing module including A. a datagram storage module to store a copy of said tagged datagrams received from said virtual packet size calculator, and B. a retransmit module to fetch one or more of said datagrams from said datagram storage module upon a negative acknowledgment notification and to retransmit said tagged datagrams via said virtual provider edge device
b. a receiver datagram processing module including i. a datagram buffer module to hold one or more tagged datagrams, ii. a datagram parser module to receive tagged datagrams from said transmitter datagram processing module via a virtual provider edge device, and insert them into said datagram buffer module based on said sequential incremental number, and to discard them if duplicate, iii. a gate to maintain said datagram buffer module at a limited size by the controlled release of said received tagged datagrams on a first-in, first-out basis, at a rate and inter-packet spacing matching the incoming inter-packet spacing, the gate having utilized the said private wire size and said virtual packet size in its calculations, to said transmitter datagram processing module, with a fixed delay of user determined size in conjunction with said datagram buffer module, iv. a datagram restoration unit to remove said sequential tags and said virtual packet size information from said tagged datagrams before release to a network facing provider edge device, v. a negative acknowledgment request module to receive copies of said tagged datagrams from the datagram parser module, to detect lost tagged datagrams based on said sequential incremental number, to rebuild said tagged datagrams using said forward error correction data where applicable or if said rebuilding fails, to send said negative acknowledgment notification upon detection of said lost tagged datagrams to said transmitter datagram processing module vi. a congestion control module comprising an algorithm to detect bandwidth saturation and reduce the rate of lost packet requests should saturation be detected, by randomly dropping said requests, in proportion to the saturation level.

2. A process as claimed in claim 1 wherein said transmitter datagram processing module further includes a data duplication module to duplicate said tagged datagrams, so that they may be transmitted separately

3. A process for the transmission of datagrams over packet-switched networks as claimed in claim 1 wherein said transmitter datagram processing module further includes a data splitting module to split said tagged datagrams, so that they may be transmitted separately

4. A process as claimed in claim 1, 2, or 3, wherein said transmitter datagram processing module further includes a data encryption module to encrypt said tagged datagrams so that they may be transmitted encrypted, and wherein said receiver datagram processing module further includes a data decryption module to decrypt said tagged and encrypted datagrams

5. A process as claimed in claim 1, 2, or 3, wherein said transmitter datagram processing module further includes a data compression module to compress the said tagged datagrams, so that they may be transmitted compressed, and wherein said receiver datagram processing module further includes a data decompression module to decompress the said tagged and compressed datagrams.

6. A process as claimed in claim 1, 2, or 3, wherein said transmitter datagram processing module further includes

a. a data compression module to compress the said tagged datagrams, so that they may be transmitted compressed, and
b. a data encryption module to encrypt the said tagged and compressed datagrams so that they may be transmitted encrypted and compressed,
and wherein said receiver datagram processing module further includes
a. a data decryption module to decrypt the said tagged, encrypted and compressed datagrams,
b. and a data decompression module to decompress the said tagged and compressed datagrams.
Patent History
Publication number: 20170118008
Type: Application
Filed: Oct 26, 2015
Publication Date: Apr 27, 2017
Inventor: Sergio Ammirata (Coral Springs, FL)
Application Number: 14/922,690
Classifications
International Classification: H04L 7/00 (20060101); H04L 1/00 (20060101); H04L 12/721 (20060101); H04L 1/20 (20060101); H04L 29/06 (20060101);