COATED BOND WIRES FOR DIE PACKAGES AND METHODS OF MANUFACTURING SAID COATED BOND WIRES

A method of manufacturing a bond wire having a metal core, a dielectric layer, and a ground connectable metallization, wherein the bond wire has one or more vapor barrier coatings, and manufacturing a die package with at least one bond wire according to the invention.

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Description
BACKGROUND OF THE INVENTION

1. Field of the Invention

Improved methods for coating a metal core with a dielectric to form a ground connectable lead after metallization are described.

2. Description of Related Art

Electronic devices and components are operating at ever increasing speeds and over increasing frequency ranges. Popular semiconductor package types use wire bonds that can connect to a substrate or leadframe, which in turn can connect to second level interconnects, vias, substrate or package traces, solder balls, or the like, for connection to a printed circuit board (PCB) of an electronic device.

Manufacture can be costly, and failure due to material deposition errors can destroy die functionality. Methods that decrease manufacture cost and improved reliability are needed.

SUMMARY OF THE INVENTION

Bearing in mind the problems and deficiencies of the prior art, it is an object of the present invention to provide a lead and a die package including at least one lead that can be manufactured with decreased manufacture cost and improved reliability.

The above and other objects, which will be apparent to those skilled in the art, are achieved in the present invention which is directed to a method of manufacturing a die package according to the invention.

The dependent claims are directed to advantageous embodiments of the invention.

With the leads according to invention, which include the application of a vapor barrier, areas that are not covered by metal due to selective metal deposition or removal can be protected. Therefore, failure of the die packages due to material deposition errors destroying the die functionality can be prevented.

BRIEF DESCRIPTION OF THE DRAWINGS

The features of the invention believed to be novel and the elements characteristic of the invention are set forth with particularity in the appended claims. The figures are for illustration purposes only and are not drawn to scale. The invention itself, however, both as to organization and method of operation, may best be understood by reference to the detailed description which follows taken in conjunction with the accompanying drawings in which:

FIG. 1 is an illustration of selected methods for forming dielectric and metal coated leads with a vapor barrier optimized for various requirements;

FIG. 2 illustrates method steps for manufacture of dielectric coated leads with outer ground connected metallization;

FIG. 3 illustrates a subtractive method for manufacture of dielectric coated leads with outer ground connected metallization;

FIG. 4 illustrates a BGA package having dielectric coated leads with outer ground connected metallization; and

FIG. 5 illustrates a portion of leadframe package having dielectric coated leads with outer ground connected metallization.

DETAILED DESCRIPTION

In describing the preferred embodiment of the present invention, reference will be made herein to FIGS. 1-5 of the drawings in which like numerals refer to like features of the invention.

As seen with respect to the method illustrated in FIG. 1, wirebonding (10) is used to provide an interconnection between a metal core of a lead to both die and substrate connection pads. The metal core is coated (11) with a dielectric. The dielectric layer is etched away (12) to expose ground pads, followed by metallization (13) to connect the metallized layer to the ground pad. As needed, additional metal layers can also be removed (14), followed by deposition (15) of additional dielectrics or vapor barriers to improve resistance to oxygen degradation. If necessary, additional coatings can be applied to promote adhesion to mold compounds, and the die can be overmolded (16), cured, and singulated for use.

In certain embodiments electrical characteristics can be adjusted by having dielectric coated leads used in semiconductor die packaging formed to have varying dielectric thickness. Thick, thin, and intermediate thicknesses are possible by varying dielectric coating times and manufacture steps. Both the core diameter and the dielectric thickness can be varied. In certain embodiments the composition of the deposited dielectric can be also varied, with for example distinct dielectric materials surrounding a metal core and in turn be surrounded by a ground connectable metal coating. This allows, for example, a high performance dielectric having superior vapor barrier, oxygen degradation resistance, or the like, to be thinly deposited over a thick layer of a low cost dielectric material. In still other embodiments multiple layers of dielectric of varying thickness, can be separated by thin metal layers, with the outermost metal layer being connected to ground.

Generally, thin dielectric layers will provide low impedance good for power lines, thick dielectric layers good for signal integrity, and outer metal layers connected to the same ground. Note that a combination of core diameters and dielectric thicknesses is possible and a series of such steps may be performed to achieve more than two impedances. In certain embodiments it may be desirable to have large cores on power lines to increase power handling capacity, reduce power line temperatures, and/or further reduce any inductance on power supply and ground lines that would exacerbate ground bounce or power sag. Dielectric layers of intermediate thickness are also useful, since many packages could benefit from having leads of three (3) or more different dielectric thicknesses. For example, a lead have an intermediate dielectric thickness could be used to connect a source and load of substantially different impedance to maximize power transfer. For example, a 10 ohm source can be coupled to a 40 ohm load with a 20 ohm lead. Also, since cost of dielectric can be high, critical signal pathways can be interconnected using thick dielectric, with less critical status, reset, or the like leads can be coated with a dielectric layer having a thickness greater than the power leads, but less than (intermediate) to the critical signal leads. Advantageously, this can reduce dielectric deposition material cost and time.

The precise thickness of the dielectric coating may be chosen, in combination with the wirebond diameter, to achieve a particular desired impedance value for each lead.

Z 0 = L C = 138 ɛ r · log ( b a ) ( 1 )

The characteristic impedance of a coax line is given in Eq. (1), where L is the inductance per unit length, C is the capacitance per unit length, a is the diameter of the bond wire, b is the outside diameter of the dielectric and ∈r is relative permittivity of the coaxial dielectric.

As illustrated in FIG. 2, in one embodiment manufacture of dielectric coated leads with outer ground connected metallization can proceed using the following steps. Connection pads are cleaned (50) on the die and the substrate and a wirebonder is used to connect the die to the connection pads (51). Optionally, a second diameter wire can be attached (52) (e.g. a larger diameter wire suitable for power connections), or areas of the die can be masked (53) or otherwise protected to allow for selective deposition. One or more layers of dielectric of the same or different composition can be deposited (54), followed by selective laser or thermal ablation, or chemical removal of portions of the dielectric to allow access to ground connections covered in the dielectric deposition step (55). This step is optional, since in some embodiments, the need for a ground via can be eliminated. This is particularly true for die operating at higher frequencies, since a virtual RF ground may be established through capacitive coupling. Metallization (57) follows, covering the dielectric with a metal layer that forms the outermost metallized layer of the leads, and also connecting the leads to ground. The entire process can be repeated multiple times (58), useful for those embodiments using selective deposition techniques, and particularly for those embodiments supporting multiple die or complex and varied impedance leads. In the final step, for non-cavity packages, an overmold can be used to encapsulate leads (59).

In certain embodiments, modifications and additions to the described process are possible. For example, providing conformal coatings of dielectric can be accomplished through a variety of methods using chemical (electrophoretic), mechanical (surface tension), catalytic (primer, electromagnetic [UV, IR], electron beam), other suitable techniques. Electrophoretic polymers are particularly advantageous because they can rely on self-limiting reactions that can deposit precise thicknesses readily by adjusting process parameters and or simple additive, concentration, chemical, thermal, or timing changes to an electrophoretic coating solution.

In other embodiments, dielectric precoated bondwires can be used to form leads. While commercially available coated wires typically are thinner in dielectric thickness than is necessary to create, for example, 50 ohm leads, the foregoing discussed dielectric deposition steps can be used to increase dielectric thickness to set the desired impedance. Use of these precoated wires can simplify other process steps necessary to create coaxial lines, and can allow for thinner layers of needed vapor deposited dielectrics and faster processing times to create ground vias. Precoated bondwires can be used to prevent shorting for narrowly spaced or crossing leads. In certain embodiments the precoated bondwire can have a dielectric made from a photosensitive material to allow for selective patterning techniques.

In other embodiments, the dielectric Parylene™ can be used. Parylene™ is the trade name for a variety of chemical vapor deposited polyp-xylylene)polymers used as moisture and dielectric barriers. Parylene™ can be formed in a growth limited condensation reaction using a modified Parylene™ deposition system where the die, substrate, and leads are aligned to a photoplate which allows EM radiation (IR, UV or other) to strike in a precise manner causing selective growth rate of dielectric. Advantageously, this can minimize or eliminate the need for processes to create contact vias, bulk removal of Parylene™, etc.

Parylene™ and other dielectrics are known to suffer from degradation due to oxygen scission in the presence of oxygen, water vapor and heat. Damage can be limited by metal layers that form excellent oxygen vapor barriers, with thin layers of 3-5 micron thickness capable of forming true hermetic interfaces. Alternatively, if metal has been selectively removed, or not deposited in certain areas due to electrical, thermal, or manufacturing requirements, a wide range of polymer based vapor oxygen barriers can be used, with polyvinyl alcohol (PVA) being one widely used polymer. These polymers can be glob topped, screen printed, stenciled, gantry dispensed, sprayed onto Parylene™ surface that will be exposed to the oxygen or —H2O vapor environment. Advantageously, use of vapor barrier polymers can be a part of a cost reduction strategy, since thicker layers of high cost Parylene™ or other oxygen sensitive might otherwise be required.

As will be appreciated, all of the described method steps can benefit from various selective deposition techniques. Selective deposition can be by physical masking, directed polymer deposition, photoresist methods, or any other suitable method for ensuring differential deposition thickness on the metal core, dielectric layer, or other outermost layer at time of deposition. While selective deposition allows for additive methods to build leads, it also allows for subtractive techniques in which dielectric or metal is removed to form interconnects of differing impedances. For example, a package populated by one or more die can be wire-bonded as appropriate for interconnect of all package and device pads.

As seen with respect to FIG. 3, which illustrate steps and structures for manufacture of a die package, the dielectric coating 200 can be deposited (Step A) to a thickness X-A over a wirebond metal conductor 202, where A is the thickness of the dielectric needed for the secondary interconnect impedance. The secondary impedance wirebond dielectrics can be removed (Step B) for example by an etch step, followed by a second coating 204 deposition (Step C) followed by metallization 206 of both interconnects (Step D). This subtractive process will create wirebonds of two distinct impedances.

In an embodiment illustrated with respect to FIG. 4, a ball grid array (BGA) package that includes dielectric and metal coated leads having well defined and adjustable lead electrical characteristics is described.

A BGA is a surface-mount packaging widely used for integrated circuits, and can generally provide more interconnection pins than dual in-line, leadframe, or other flat package since the entire bottom surface of the BGA can be used for connection pads. In many types of BGA packages, a die 216 is attached to a substrate 218 having fillable vias 220 connected to connection pads. Wirebonds 212, 214 can be used to connect the top side die 216 to the pads/vias 220, consequently providing electrical connections from a top side of the substrate to the bottom. In a BGA package, balls of solder 222 are attached to the bottom of the package and held in place with a tacky flux until soldering to a printed circuit board or other substrate. As described herein, the wirebonds of conventional BGA packages can be replaced with improved leads having a dielectric layer and an outer ground connectable metal layer. The leads can have varying dielectric thickness over an inner core and an outer metal layer, as well as being selectively optimized to have specific impedances, which can be selected to be different or well-matched based in part on dielectric layer thickness. As seen in the FIG. 6, both long 212 and short 214 leads are supported.

In more detail, assembly of an improved BGA package can require face up attachment of a die to a substrate supporting a connection pad formed adjacent and around a via in the substrate. This assembly is wirebonded as appropriate for each required interconnect, with a wirebond formed between a connection pad on the substrate and a connection pad on the die. Low frequency and power inputs are connected to the low frequency signal leads, while high-frequency inputs and outputs are connected to the high frequency signal leads. In some embodiments, the low frequency and power inputs can have a thickness that differs from high frequency signal leads. The assembly is then subjected to the coating of any essentially conformal dielectric material. Because of its low cost, ease of vacuum deposition, and superior performance characteristics, Parylene™ can be used. A small part of the dielectric layer near the leadframe attachment point can be selectively removed by etch, thermal degradation, or laser ablation, in order to form electrical connection to a ground contact point or ground shield layer. Similarly, a small portion of the dielectric layer is removed near the die connection pads to permit ground connections.

Connection to ground in the structure follows from application of a metallized layer over the top of the dielectric layer, forming a ground shield. The thickness of the preferred metal layer should be chosen in consideration of skin depth and DC resistance issues, and should be composed primarily of an excellent electrical conductor such as silver, copper, or gold. For most applications, a 1 micron coating thickness is adequate for functionality, but thicker coatings can help minimize cross-talk between leads. These coatings may be added in defined areas through a combination of lithography or other masking methods, and plating or other selective deposition methods. The package can be completed by placement of an overmold or lid over the die, followed by dicing (singulation) and testing.

Alternatively, in an embodiment illustrated with respect to FIG. 5, low cost leadframe based die package 300 including wire bonds extending from the die to a leadframe can be manufactured by forming a leadframe strip containing a two-dimensional array of individual package sites and outside frame portion. Leadframe fabrication is conventional, and can include formation of separate leads through etching, stamping, or electrodeposition. The leadframe strip can be placed in a mold including, but not limited to, an injection molding or transfer molding apparatus. An appropriate dielectric material, preferably plastic such as commercially available epoxy mold compound, is injected, pumped, or otherwise transferred into the mold to achieve a leadframe/mold material composite structure. The properties of the mold material are important for their dielectric constant, loss tangent, and electrically dispersive properties as well as their temperature, moisture, and other mechanical performance attributes.

Each package site on the resulting composite leadframe strip is cleaned of mold release material and or mold-flash, and prepared for deposition of a metal finish over the exposed metal portions of the leadframe. This may be accomplished through plating techniques such as immersion or electroplating, and the metals would be chosen for corrosion suppression and ease of wirebonding. An example of such finishing is a thin layer of nickel (for protection) followed by a layer of gold (added protection and ability to wirebond). Each package site of the resultant molded leadframe strip can then be populated with the required die, which are attached to the base, with die attach material being chosen for mechanical and thermal properties for a particular packaging application. The resultant assembly is then wirebonded as appropriate for each required interconnect, with a wirebond formed between a lead on the leadframe and a connection pad on the die. Low frequency and power inputs are connected to the low frequency signal leads, while high-frequency inputs and outputs are connected to the high frequency signal leads. In some embodiments, the low frequency and power inputs can have a thickness that differs from high frequency signal leads

Like the foregoing described BGA package 210, the populated leadframe strip is then subjected to the coating of any essentially conformal dielectric material including Parylene™. In the case of Parylene™, it may be preferable to mask the bottom of the packages with tape, such as a vacuum-compatible polyimide with acrylic adhesive, or similar material to prevent deposition onto the area of the leads that will eventually attached to the PCB. This will facilitate easier soldering at a subsequent step. A small part of the dielectric layer near the leadframe attachment point is selectively removed by etch, thermal degradation, or laser ablation, in order to form electrical connection to a ground contact point or ground shield layer. Similarly, a small portion of the dielectric layer is removed near the die connection pads to permit ground connections. Connection to ground in the structure follows from application of a metallized layer over the top of the dielectric layer, forming a ground shield. The thickness of the preferred metal layer should be chosen in consideration of skin depth and DC resistance issues, and should be composed primarily of an excellent electrical conductor such as silver, copper, or gold. For most applications, a 1 micron coating thickness is adequate for functionality, but thicker coatings can help minimize cross-talk between leads. These coatings may be added in defined areas through a combination of lithography or other masking methods, and plating or other selective deposition methods. The package is completed by placement of an overmold or lid over the die, followed by dicing (singulation) and testing.

In particular, the present invention is directed to a lead having a metal core, a dielectric layer, a ground connectable metallization, and one or more vapor barrier coatings (or mold adhesion compound).

Further, the present invention is directed to a die package comprising a die having a plurality of connection pads, a die substrate supporting a plurality of connection elements, a lead connected between the die and die substrate, the lead having a first metal core with a defined core diameter, a dielectric layer surrounding the first metal core having a first dielectric thickness, an outer metal layer at least partially surrounding the dielectric layer, and a vapor barrier overcoat.

Further, the present invention is directed to a manufacturing method described with reference to FIG. 1.

While the present invention has been particularly described, in conjunction with a specific preferred embodiment, it is evident that many alternatives, modifications and variations will be apparent to those skilled in the art in light of the foregoing description. It is therefore contemplated that the appended claims will embrace any such alternatives, modifications and variations as falling within the true scope and spirit of the present invention.

Thus, having described the invention, what is claimed is:

Claims

1. A method of manufacturing the die package including a die having a plurality of connection pads; a die substrate supporting a plurality of connection elements; and one or more leads connected between the die and the die substrate, said one or more leads having a metal core, a dielectric layer at least partially surrounding the metal core, the dielectric in turn being at least partially surrounded by a ground connectable metal coating, wherein that the lead further has at least one vapor barrier coating for protecting areas that are not covered by metal, said method including the following steps:

using wirebonding to provide an interconnection between a metal core of a lead to both die and substrate connection pads;
coating the metal core with a dielectric;
metallization; and
deposition of at least one vapor barrier.

2. The method of claim 1, further comprising applying an additional coating to promote adhesion to mold compounds.

3. The method of claim 1, further comprising overmolding, curing, and/or singulating the die.

4. The method of claim 1, further comprising removing at least part of the dielectric to expose ground pads, followed by metallization to connect the metallized layer to the ground pad.

5. The method of claim 1, further comprising removing at least part of the metal layer and/or of an additional metal layer, followed by the deposition of an additional dielectric layer and/or of the at least one vapor barrier.

6. The method of claim 2, further comprising removing at least part of the dielectric to expose ground pads, followed by metallization to connect the metallized layer to the ground pad.

7. The method of claim 6, further comprising removing at least part of the metal layer and/or of an additional metal layer, followed by the deposition of an additional dielectric layer and/or of the at least one vapor barrier.

Patent History
Publication number: 20170271296
Type: Application
Filed: May 17, 2017
Publication Date: Sep 21, 2017
Inventors: Sean S. Cahill (Santa Clara, CA), Eric A. Sanjuan (Santa Clara, CA)
Application Number: 15/597,367
Classifications
International Classification: H01L 23/00 (20060101); H01L 23/66 (20060101);