Charging Method, Power Supply Device and Terminal Device

Abstract

The present disclosure provides a charging method, a power supply device, and a terminal device. The method includes: transmitting, by the power supply device, clock signal to the terminal device via a first data line of the USB interface in a process of that the power supply device is coupled to the terminal device, wherein the clock signal is used for indicating a communication sequence between the power supply device and the terminal device; conducting, by the power supply device, a bidirectional communication with the terminal device via a second data line of the USB interface under control of the communication sequence, so as to determine to charge the terminal device in the quick charging mode; and adjusting, by the power supply device, a charging current of the power supply device to the charging current corresponding to the quick charging mode to charge the terminal device.

Description

CROSS-REFERENCE TO RELATED APPLICATION(S)

This application is a continuation application of U.S. patent application Ser. No. 15/317,383, filed on Dec. 8, 2016, which is a national phase of PCT Patent Application No. PCT/CN2015/078908, filed on May 13, 2015, the contents of both of which are hereby incorporated by reference in their entireties.

TECHNICAL FIELD

The present disclosure relates to the field of charging, and more particularly to a charging method, a power supply device, and a terminal device.

BACKGROUND

Presently, terminal devices (e.g., smart phones) become more and more popular with consumers. However, the power consumption of terminal devices is great, thus terminal devices need to be charged frequently. As the battery capacity of terminal devices becomes greater and greater, correspondingly, the charging time becomes longer. How to realize quick charging is a problem that needed to be solved instantly.

In the present technology, to achieve the purpose of quick charging, the output current of a power supply device is directly increased without consideration of endurance of a terminal device, which will result in a phenomenon of overheating and even burnout of the terminal device, and reduce the lifespan of the terminal device.

SUMMARY

The embodiments of the present disclosure provide a quick charging method, a power supply device, and a terminal device, which can increase security of a quick charging process.

A first aspect provides a quick charging method. The method is applied to a power supply device. The power supply device is coupled to a terminal device via a USB interface. A power line of the USB interface is used for the power supply device to charge the terminal device. The power supply device supports a normal charging mode and a quick charging mode, and a charging current corresponding to the quick charging mode is greater than a charging current corresponding to the normal charging mode. The method comprises: transmitting, by the power supply device, clock signal to the terminal device via a first data line of the USB interface in a process of that the power supply device is coupled to the terminal device, wherein the clock signal is used for indicating a communication sequence between the power supply device and the terminal device; conducting, by the power supply device, a bidirectional communication with the terminal device via a second data line of the USB interface under control of the communication sequence to determine to charge the terminal device in the quick charging mode; and adjusting, by the power supply device, a charging current of the power supply device to the charging current corresponding to the quick charging mode to charge the terminal device.

In combination with the first aspect, in an implementation manner of the first aspect, the communication sequence comprises instruction transmission time slots of the power supply device and instruction reception time slots of the power supply device, and the instruction transmission time slots and the instruction reception time slots are alternatively generated. Conducting, by the power supply device, a bidirectional communication with the terminal device via a second data line of the USB interface under control of the communication sequence to determine to charge the terminal device in the quick charging mode comprises: transmitting, by the power supply device, a first instruction to the terminal device via the second data line during the instruction transmission time slot of the power supply device, wherein the first instruction is used for querying the terminal device for whether or not to activate the quick charging mode; receiving, by the power supply device, a reply instruction corresponding to the first instruction via the second data line during the instruction reception time slot of the power supply device, wherein the reply instruction corresponding to the first instruction is used for indicating that the terminal device agrees to activate the quick charging mode; and determining, by the power supply device, to charge the terminal device in the quick charging mode according to the reply instruction corresponding to the first instruction.

In combination with the first aspect or any of the above implementation manners, in another implementation manner of the first aspect, the instruction transmission time slot of the power supply device comprises a plurality of clock periods, and each of the plurality of clock periods is used for transmitting a 1-bit data.

In combination with the first aspect or any of the above implementation manners, in another implementation manner of the first aspect, the instruction transmission time slot of the power supply device comprises eight clock periods, and the first instruction comprises a 8-bit data.

In combination with the first aspect or any of the above implementation manners, in another implementation manner of the first aspect, the instruction reception time slot of the power supply device comprises a plurality of clock periods, and each of the plurality of clock periods is used for receiving a 1-bit data.

In combination with the first aspect or any of the above implementation manners, in another implementation manner of the first aspect, the instruction reception time slot of the power supply device comprises ten clock periods, and the reply instruction corresponding to the first instruction comprises a 10-bit data.

In combination with the first aspect or any of the above implementation manners, in another implementation manner of the first aspect, the first instruction is an instruction of a quick charging communication instruction set of the power supply device, and instructions of the quick charging communication instruction set have the same previous n bits.

In combination with the first aspect or any of the above implementation manners, in another implementation manner of the first aspect, each clock period of the clock signal comprises a low level of 10 s and a high level of 500 s.

In combination with the first aspect or any of the above implementation manners, in another implementation manner of the first aspect, the first data line is a D+ data line of the USB interface, and the second data line is a D− data line of the USB interface.

A second aspect provides a quick charging method. The method is applied to a terminal device. The terminal device is coupled to a power supply device via a USB interface. A power line of the USB interface is used for the power supply device to charge the terminal device. The terminal device supports a normal charging mode and a quick charging mode, and a charging current corresponding to the quick charging mode is greater than a charging current corresponding to the normal charging mode. The method comprises: receiving, by the terminal device, clock signal from the power supply device via a first data line of the USB interface in a process of that the terminal device is coupled to the power supply device, wherein the clock signal is used for indicating a communication sequence between the terminal device and the power supply device; conducting, by the terminal device, a bidirectional communication with the power supply device via a second data line of the USB interface under control of the communication sequence to cause the power supply device to determine to charge the terminal device in the quick charging mode; and receiving, by the terminal device, the charging current corresponding to the quick charging mode from the power supply device to charge a battery of the terminal device.

In combination with the second aspect, in an implementation of the second aspect, the communication sequence comprises instruction reception time slots of the terminal device and instruction transmission time slots of the terminal device, and the instruction reception time slots and the instruction transmission time slots are alternatively generated. Conducting, by the terminal device, a bidirectional communication with the power supply device via a second data line of the USB interface under control of the communication sequence to cause the power supply device to determine to charge the terminal device in the quick charging mode comprises: receiving, by the terminal device, a first instruction from the power supply device via the second data line during the instruction reception time slot of the terminal device, wherein the first instruction is used to query the terminal device for whether or not to activate the quick charging mode; and transmitting, by the terminal device, a reply instruction corresponding to the first instruction to the power supply device via the second data line during the instruction transmission time slot of the power supply device, wherein the reply instruction corresponding to the first instruction is used for indicating that the terminal device agrees to activate the quick charging mode.

In combination with the second aspect or any of the above implementation manners, in another implementation manner of the second aspect, the instruction reception time slot of the terminal device comprises a plurality of clock periods, and each of the plurality of clock periods is used for receiving a 1-bit data.

In combination with the second aspect or any of the above implementation manners, in another implementation manner of the second aspect, the instruction reception time slot of the terminal device comprises eight clock periods, and the first instruction comprises a 8-bit data.

In combination with the second aspect or any of the above implementation manners, in another implementation manner of the second aspect, the instruction transmission time slot of the terminal device comprises a plurality of clock periods, and each of the plurality of clock periods is used for transmitting a 1-bit data.

In combination with the second aspect or any of the above implementation manners, in another implementation manner of the second aspect, the instruction transmission time slot of the terminal device comprises ten clock periods, and the reply instruction corresponding to the first instruction comprises a 10-bit data.

In combination with the second aspect or any of the above implementation manners, in another implementation manner of the second aspect, the reply instruction corresponding to the first instruction is an instruction of a quick charging communication instruction set of the terminal device, and instructions of the quick charging communication instruction set have the same previous n bits.

In combination with the second aspect or any of the above implementation manners, in another implementation manner of the second aspect, each clock period of the clock signal comprises a low level of 10 μs and a high level of 500 μs.

In combination with the second aspect or any of the above implementation manners, in another implementation manner of the second aspect, the first data line is a D+ data line of the USB interface, and the second data line is a D− data line of the USB interface.

A third aspect provides a power supply device. The power supply device is coupled to a terminal device via a USB interface. A power line of the USB interface is used for the power supply device to charge the terminal device. The power supply device supports a normal charging mode and a quick charging mode, and a charging current corresponding to the quick charging mode is greater than a charging current corresponding to the normal charging mode. The power supply device comprises a communication unit configured to transmit clock signal to the terminal device via a first data line of the USB interface in a process of that the power supply device is coupled to the terminal device, wherein the clock signal is used for indicating a communication sequence between the power supply device and the terminal device. The communication unit is further configured to conduct a bidirectional communication with the terminal device via a second data line of the USB interface under control of the communication sequence to determine to charge the terminal device in the quick charging mode. The power supply device further comprises a current adjusting unit configured to adjust a charging current of the power supply device to the charging current corresponding to the quick charging mode to charge the terminal device.

In combination with the third aspect, in an implementation manner of the third aspect, the communication sequence comprises instruction transmission time slots of the power supply device and instruction reception time slots of the power supply device, and the instruction transmission time slots and the instruction reception time slots are alternatively generated. The communication unit is configured to transmit a first instruction to the terminal device via the second data line during the instruction transmission time slot of the power supply device, and the first instruction is used to query the terminal device for whether or not to activate the quick charging mode. The communication unit is further configured to receive a reply instruction corresponding to the first instruction via the second data line during the instruction reception time slot of the power supply device, and the reply instruction corresponding to the first instruction is used for indicating that the terminal device agrees to activate the quick charging mode. The communication unit is further configured to determine to charge the terminal device in the quick charging mode according to the reply instruction corresponding to the first instruction.

In combination with the third aspect or any of the above implementation manners, in another implementation manner of the third aspect, the instruction transmission time slot of the power supply device comprises a plurality of clock periods, and each of the plurality of clock periods is used for transmitting a 1-bit data.

In combination with the third aspect or any of the above implementation manners, in another implementation manner of the third aspect, the instruction transmission time slot of the power supply device comprises eight clock periods, and the first instruction comprises a 8-bit data.

In combination with the third aspect or any of the above implementation manners, in another implementation manner of the third aspect, the instruction reception time slot of the power supply device comprises a plurality of clock periods, and each of the plurality of clock periods is used for receiving a 1-bit data.

In combination with the third aspect or any of the above implementation manners, in another implementation manner of the third aspect, the instruction reception time slot of the power supply device comprises ten clock periods, and the reply instruction corresponding to the first instruction comprises a 10-bit data.

In combination with the third aspect or any of the above implementation manners, in another implementation manner of the third aspect, the first instruction is an instruction of a quick charging communication instruction set of the power supply device, and instructions of the quick charging communication instruction set have the same previous n bits.

In combination with the third aspect or any of the above implementation manners, in another implementation manner of the third aspect, each clock period of the clock signal comprises a low level of 10 μs and a high level of 500 μs.

In combination with the third aspect or any of the above implementation manners, in another implementation manner of the third aspect, the first data line is a D+ data line of the USB interface, and the second data line is a D− data line of the USB interface.

A fourth aspect provides a terminal device. The terminal device is coupled to a power supply device via a USB interface. A power line of the USB interface is used for the power supply device to charge the terminal device. The terminal device supports a normal charging mode and a quick charging mode, and a charging current corresponding to the quick charging mode is greater than a charging current corresponding to the normal charging mode. The terminal device includes a communication unit configured to receive clock signal from the power supply device via a first data line of the USB interface in a process of that the terminal device is coupled to the power supply device, wherein the clock signal is used for indicating a communication sequence between the terminal device and the power supply device. The communication unit is further configured to conduct a bidirectional communication with the power supply device via a second data line of the USB interface under control of the communication sequence to cause the power supply device to determine to charge the terminal device in the quick charging mode. The terminal device further comprises a charging unit configured to receive the charging current corresponding to the quick charging mode from the power supply device to charge a battery of the terminal device.

In combination with the fourth aspect, in an implementation manner of the fourth aspect, the communication sequence comprises instruction reception time slots of the terminal device and instruction transmission time slots of the terminal device, and the instruction reception time slots and the instruction transmission time slots are alternatively generated. The communication unit is configured to receive a first instruction from the power supply device via the second data line during the instruction reception time slot of the terminal device, and the first instruction is used to query the terminal device for whether or not to activate the quick charging mode. The communication unit is further configured to transmit a reply instruction corresponding to the first instruction to the power supply device via the second data line during the instruction transmission time slot of the terminal device, and the reply instruction corresponding to the first instruction is used for indicating that the terminal device agrees to activate the quick charging mode.

In combination with the fourth aspect or any of the above implementation manners, in another implementation manner of the fourth aspect, the instruction reception time slot of the terminal device comprises a plurality of clock periods, and each of the plurality of clock periods is used for receiving a 1-bit data.

In combination with the fourth aspect or any of the above implementation manners, in another implementation manner of the fourth aspect, the instruction reception time slot of the terminal device comprises eight clock periods, and the first instruction comprises a 8-bit data.

In combination with the fourth aspect or any of the above implementation manners, in another implementation manner of the fourth aspect, the instruction transmission time slot of the terminal device comprises a plurality of clock periods, and each of the plurality of clock periods is used for transmitting a 1-bit data.

In combination with the fourth aspect or any of the above implementation manners, in another implementation manner of the fourth aspect, the instruction transmission time slot of the terminal device comprises ten clock periods, and the reply instruction corresponding to the first instruction comprises a 10-bit data.

In combination with the fourth aspect or any of the above implementation manners, in another implementation manner of the fourth aspect, the reply instruction corresponding to the first instruction is an instruction of a quick charging communication instruction set of the terminal device, and instructions of the quick charging communication instruction set have the same previous n bits.

In combination with the fourth aspect or any of the above implementation manners, in another implementation manner of the fourth aspect, each clock period of the clock signal comprises a low level of 10 μs and a high level of 500 μs.

In combination with the fourth aspect or any of the above implementation manners, in another implementation manner of the fourth aspect, the first data line is a D+ data line of the USB interface, and the second data line is a D− data line of the USB interface.

In embodiments of the present disclosure, the power supply device does not increase the charging current blindly to implement quick charging, but negotiates with the terminal device via the bidirectional communication with the terminal device to determine whether or not the quick charging mode can be adopted. Compared with the present technology, the security of the quick charging process is improved.

BRIEF DESCRIPTION OF DRAWINGS

To better illustrate the technical solution of embodiments of the present disclosure, the following descriptions will briefly illustrate the accompanying drawings described in the embodiments. Obviously, the following described accompanying drawings are some embodiments of the present disclosure. Those skilled in the art can obtain other accompanying drawings according to the described accompanying drawings without creative work.

FIG. 1 is a schematic flow chart of a quick charging method in accordance with an embodiment of the present disclosure.

FIG. 2 is a schematic flow chart of a quick charging method in accordance with another embodiment of the present disclosure.

FIG. 3 is a schematic view showing that a power supply device implements a data reception and transmission in accordance with an embodiment of the present disclosure.

FIG. 4 is a schematic view of a sequence of that the power supply device implements a communication in accordance with an embodiment of the present disclosure.

FIG. 5 is a schematic view of a sequence of that the power supply device implements a communication in accordance with another embodiment of the present disclosure.

FIG. 6 is a diagrammatic view of a structure of a power supply device in accordance with an embodiment of the present disclosure.

FIG. 7 is diagrammatic view of a structure of a terminal device in accordance with an embodiment of the present disclosure.

DETAILED DESCRIPTION

The technical solution of embodiments of the present disclosure will be described clearly and completely in combination with the accompanying drawings of the embodiments of the present disclosure. Obviously, the described embodiments are a part of embodiments of the present disclosure, and not all of the embodiments. According to the embodiments of the present disclosure, other embodiments obtained by those skilled in the art without creative work all fall within the protection scope of the present disclosure.

FIG. 1 is a schematic flow chart of a quick charging method in accordance with an embodiment of the present disclosure. The method is applied to a power supply device. The power supply device is coupled to a terminal device via a universal serial bus (USB) interface. The USB interface can be a normal USB interface, and can also be a micro USB interface. A power line of the USB interface is used for the power supply device to charge the terminal device, and the power line of the USB interface can be a VBus line and/or grounding line. The power supply device supports a normal charging mode and a quick charging mode, and a charging current corresponding to the quick charging mode is greater than a charging current corresponding to the normal charging mode. For example, the charging current corresponding to the normal charging mode is generally less than 2.5 A, and the charging current corresponding to the quick charging mode can be greater than 3 A.

The method of FIG. 1 includes the following.

At block 110, the power supply device transmits clock signal to the terminal device via a first data line of the USB interface in a process of that the power supply device is coupled to the terminal device, and the clock signal is used to indicate a communication sequence between the power supply device and the terminal device.

It should be understood that the power supply device actively transmits the clock signal to the terminal device, and keeps transmission of the clock signal during the whole process of that the power supply device is coupled to the terminal device.

At block 120, the power supply device conducts a bidirectional communication with the terminal device via a second data line of the USB interface under control of the communication sequence, so as to determine to charge the terminal device in the quick charging mode.

At block 130, the power supply device adjusts a charging current of the power supply device to the charging current corresponding to the quick charging mode to charge the terminal device.

In detail, the power supply device can record the charging current corresponding to the quick charging mode in advance. When it is determined that the quick charging mode is adopted to charge the terminal device, the charging current of the power supply device is directly adjusted to the charging current corresponding to the quick charging mode. Or, the power supply device can negotiate with the terminal device via the bidirectional communication to determine the charging current corresponding to the quick charging mode. After negotiation, the charging current is adjusted.

In embodiments of the present disclosure, the power supply device does not increase the charging current blindly to implement quick charging, but negotiates with the terminal device via the bidirectional communication with the terminal device to determine whether or not the quick charging mode can be adopted. Compared with the present technology, the security of the quick charging process is improved.

Optionally, in an embodiment, the communication sequence includes instruction transmission time slots of the power supply device and instruction reception time slots of the power supply device, and the instruction transmission time slots and the instruction reception time slots are alternatively generated. Conducting, by the power supply device, a bidirectional communication with the terminal device via a second data line of the USB interface under control of the communication sequence to determine to charge the terminal device in the quick charging mode, includes: transmitting, by the power supply device, a first instruction to the terminal device via the second data line during the instruction transmission time slot of the power supply device, wherein the first instruction is used to query the terminal device for whether or not to activate the quick charging mode; receiving, by the power supply device, a reply instruction corresponding to the first instruction via the second data line during the instruction reception time slot of the power supply device, wherein the reply instruction corresponding to the first instruction is used for indicating that the terminal device agrees to activate the quick charging mode; and determining, by the power supply device, to charge the terminal device in the quick charging mode according to the reply instruction corresponding to the first instruction.

Optionally, in an embodiment, the instruction transmission time slot of the power supply device includes a number of clock periods, and each clock period is used for transmitting a 1-bit data.

Optionally, in an embodiment, the instruction transmission time slot of the power supply device includes eight clock periods, and the first instruction includes a 8-bit data.

Optionally, in an embodiment, the instruction reception time slot of the power supply device includes a number of clock periods, and each clock period is used for receiving 1-bit data.

Optionally, in an embodiment, the instruction reception time slot of the power supply device includes ten clock periods, and the reply instruction corresponding to the first instruction includes a 10-bit data.

Optionally, in an embodiment, the first instruction is an instruction of the quick charging communication instruction set of the power supply device, and instructions of the quick charging communication instruction set have the same previous n bits.

Optionally, in an embodiment, each clock period of the clock signal includes a low level of 10 us and a high level of 500 us.

Optionally, in an embodiment, the first data line is a D+ data line of the USB interface, and the second data line is a D− data line of the USB interface.

The above description in combination with FIG. 1 describes the quick charging method of the embodiments of the present disclosure executed by the power supply device. The following description in combination with FIG. 2 will describes the quick charging method of the embodiments of the present disclosure executed by the terminal device.

It can be understood that interaction and relevance properties and functions of the power supply device and the terminal device described in the quick charging method executed by the terminal device corresponds to the description of the quick charging method executed by the power supply device. For simplicity, repeated description will be omitted appropriately.

FIG. 2 is a schematic flow chart of a quick charging method in accordance with an embodiment of the present disclosure. The method illustrated in FIG. 2 is applied to a terminal device. The terminal device is coupled to a power supply device via a USB interface. A power line of the USB interface is used for the power supply device to charge the terminal device. The terminal device supports a normal charging mode and a quick charging mode, and a charging current corresponding to the quick charging mode is greater than a charging current corresponding to the normal charging mode. The method of FIG. 2 includes the following.

At block 210, the terminal device receives clock signal from the power supply device via a first data line of the USB interface in a process of that the terminal device is coupled to the power supply device, and the clock signal is used to indicate a communication sequence between the terminal device and the power supply device.

At block 220, the terminal device conducts a bidirectional communication with the power supply device via a second data line of the USB interface under control of the communication sequence, so as to cause the power supply device to determine to charge the terminal device in the quick charging mode.

At block 230, the terminal device receives the charging current corresponding to the quick charging mode from the power supply device to charge a battery of the terminal device.

In embodiments of the present disclosure, the power supply device does not increase the charging current blindly to implement quick charging, but negotiates with the terminal device via the bidirectional communication with the terminal device to determine whether or not the quick charging mode can be adopted. Compared with related arts, the security of the quick charging process is improved.

Optionally, in an embodiment, the communication sequence includes instruction reception time slots of the terminal device and instruction transmission time slots of the terminal device, and the instruction reception time slots and the instruction reception time slots are alternatively generated. Conducting, by the terminal device, the bidirectional communication with the power supply device via a second data line of the USB interface under control of the communication sequence to cause the power supply device to determine to charge the terminal device in the quick charging mode includes: receiving, by the terminal device, a first instruction from the power supply device via the second data line during the instruction reception time slot of the terminal device, wherein the first instruction is used to query the terminal device for whether or not to activate the quick charging mode; transmitting, by the terminal device, a reply instruction corresponding to the first instruction via the second data line during the instruction transmission time slot of the terminal device, wherein the reply instruction corresponding to the first instruction is used for indicating that the terminal device agrees to activate the quick charging mode.

Optionally, in an embodiment, the instruction reception time slot of the terminal device includes a number of clock periods, and each clock period is used for receiving a 1-bit data.

Optionally, in an embodiment, the instruction reception time slot of the terminal device includes eight clock periods, and the first instruction includes a 8-bit data.

Optionally, in an embodiment, the instruction transmission time slot of the terminal device includes a number of clock periods, and each clock period is used for transmitting 1-bit data.

Optionally, in an embodiment, the instruction transmission time slot of the terminal device includes ten clock periods, and the reply instruction corresponding to the first instruction includes a 10-bit data.

Optionally, in an embodiment, the reply instruction corresponding to the first instruction is an instruction of the quick charging communication instruction set of the terminal device, and instructions of the quick charging communication instruction set have the same previous n bits.

Optionally, in an embodiment, each clock period of the clock signal includes a low level of 10 us and a high level of 500 us.

Optionally, in an embodiment, the first data line is a D+ data line of the USB interface, and the second data line is a D− data line of the USB interface.

The following will describe embodiments of the present disclosure more specifically in combination with detailed examples. It should be noted that examples illustrated in FIGS. 3-5 are just used to help those skilled in the art to understand the embodiments of the present disclosure, and not used to limit the embodiments of the present disclosure to detailed values or detailed scenarios which are shown in the examples. Apparently, those skilled in the art can make various equivalent modification or change according to the examples shown in FIGS. 3-5, and such modification or change shall fall within the scope of the embodiments of the present disclosure.

Firstly, the quick charging communication instruction set of the power supply device and the terminal device can be defined. For example, the quick charging communication instruction set is shown in the table 1.

TABLE 1
Quick charging communication instruction set
Instruction 1: requesting for quick charging
Power supply device−>Terminal	10101000	0xA8
device
Terminal device−>Power supply	101XYYYYYY	X: 1−>Agree 0−>Disagree,
device		Path impedance =
		YYYYYY*5(mΩ)
Instruction 2: querying whether or not a voltage of the power supply device is proper
Power supply device−>Terminal	10100100	0xA4
device
Terminal device−>Power supply	1010XX0000	XX: 11−>Proper 10−>High
device		01−>Low 00−>Error
Instruction 3: querying for a maximum charging current which is currently supported by the terminal device
Power supply device−>Terminal	10100110	0xA6
device
Terminal device−>Power supply	1010XXXXXX	Maximum charging current
device		currently supported by
		the terminal
		device = 3000 +
		(XXXXXX*250)(mA)
Instruction 4: querying for a current voltage of a battery of the terminal device
Power supply device−>Terminal	10100010	0xA2
device
Terminal device−>Power supply	101XYYYYYY	X: 1−>Being charged
device		0−>Uncharged, Battery
		voltage = 3404 +
		(YYYYYY*16)(mV)
Instruction 5: informing the terminal device that USB connection is poor and quick charging should be stopped
Power supply device−>Terminal	10110010	0xB2
device
Terminal device−>Power supply	NONE
device

From table 1, it can be seen that in each communication the power supply device firstly transmits a 8-bit data, and then the terminal device returns a 10-bit data. When the power supply device transmits a data, the power supply device can firstly transmit most significant bit (MSB). Similarly, when the power supply device receives a data, the power supply device firstly receives MSB. The clock signal for data transmission and data reception of the power supply device can be provided by the power supply device.

When the power supply device transmits a data, the power supply device transmits each bit of the data before transmitting the clock interrupt signal, which can guarantee the accuracy of the data received by the terminal device. When the power supply device receives a data, the power supply device can firstly transmit the clock interrupt signal, and then receive each bit of the data after a certain time, which can guarantee the accuracy and reliability of the data received by the power supply device.

FIG. 3 is a schematic view showing that the power supply device implements a data reception and data transmission in accordance with an embodiment of the present disclosure. For FIG. 3, there are a number of methods for parsing a data to determine whether or not the data is valid. For example, previous n bits of a data can be defined as 101 in advance. When previous 3 bits of a data received by the power supply device is not 101, the data is determined as an invalid data, and communication fails. Or, a received data is defined to include 10 bits in advance. If a received data does not include 10 bits, the received data is determined as an invalid data, and communication fails.

FIG. 4 is a schematic view of a sequence of that the power supply device implements a communication in accordance with an embodiment of the present disclosure. From FIG. 4, a relationship between a communication sequence indicated by the clock signal which is transmitted by the D+ data line and data signal transmitted by the D− data line is shown. FIG. 5 illustrates a detailed example. In FIG. 5, after the power supply device transmits the instruction 10101000 to the terminal device, the power supply device receives the reply instruction 1011001111 from the terminal device.

In combination with FIGS. 1-5, the above describes the quick charging method of the embodiments of the present disclosure. Referring to FIGS. 6-7, the following will specifically describe the power supply device and the terminal device of the embodiments of the present disclosure. It can be understood that the power supply device of FIG. 6 can implement various steps executed by the power supply device of FIGS. 1-5, and the terminal device of FIG. 7 can implement various steps executed by the terminal device of FIGS. 1-5. To avoid repetition, detailed description will be omitted.

FIG. 6 is a schematic structural diagram of a power supply device in accordance with an embodiment of the present disclosure. A power supply device 600 in FIG. 6 is coupled to a terminal device via a USB interface. A power line of the USB interface is used for the power supply device 600 to charge the terminal device. The power supply device 600 supports a normal charging mode and a quick charging mode, and a charging current corresponding to the quick charging mode is greater than a charging current corresponding to the normal charging mode. The power supply device 600 includes the following.

A communication circuit 610 is configured to transmit clock signal to the terminal device via a first data line of the USB interface in a process of that the power supply device 600 is coupled to the terminal device, and the clock signal is used to indicate a communication sequence between the power supply device 600 and the terminal device. The communication circuit 610 is further configured to conduct a bidirectional communication with the terminal device via a second data line of the USB interface under control of the communication sequence, so as to determine to charge the terminal device in the quick charging mode.

A current adjusting circuit 620 is configured to adjust a charging current of the power supply device to the charging current corresponding to the quick charging mode to charge the terminal device.

In embodiments of the present disclosure, the power supply device does not increase the charging current blindly to implement quick charging, but negotiates with the terminal device via the bidirectional communication with the terminal device to determine whether or not the quick charging mode can be adopted. Compared with the related art, the security of the quick charging process is improved.

Optionally, in an embodiment, the communication sequence includes instruction transmission time slots of the power supply device 600 and instruction reception time slots of the power supply device 600, and the instruction transmission time slots and the instruction reception time slots are alternatively generated. The communication circuit 610 is configured to transmit a first instruction to the terminal device via the second data line during the instruction transmission time slot of the power supply device 600, and the first instruction is used to query the terminal device for whether or not to activate the quick charging mode. The communication circuit 610 is further configured to receive a reply instruction corresponding to the first instruction via the second data line during the instruction reception time slot of the power supply device 600, and the reply instruction corresponding to the first instruction is used for indicating that the terminal device agrees to activate the quick charging mode. The communication circuit 610 is further configured to determine to charge the terminal device in the quick charging mode according to the reply instruction corresponding to the first instruction.

Optionally, in an embodiment, the instruction transmission time slot of the power supply device 600 includes a number of clock periods, and each clock period is used for transmitting a 1-bit data.

Optionally, in an embodiment, the instruction transmission time slot of the power supply device 600 includes eight clock periods, and the first instruction includes a 8-bit data.

Optionally, in an embodiment, the instruction reception time slot of the power supply device 600 includes a number of clock periods, and each clock period is used for receiving a 1-bit data.

Optionally, in an embodiment, the instruction reception time slot of the power supply device 600 includes ten clock periods, and the reply instruction corresponding to the first instruction includes a 10-bit data.

Optionally, in an embodiment, the first instruction is an instruction of the quick charging communication instruction set of the power supply device 600, and instructions of the quick charging communication instruction set have the same previous n bits.

Optionally, in an embodiment, each clock period of the clock signal includes a low level of 10 us and a high level of 500 us.

Optionally, in an embodiment, the first data line is a D+ data line of the USB interface, and the second data line is a D− data line of the USB interface.

FIG. 7 is a schematic block diagram of a terminal device in accordance with an embodiment of the present disclosure. A terminal device 700 in FIG. 7 is coupled to a power supply device via a USB interface. A power line of the USB interface is used for the power supply device to charge the terminal device 700. The terminal device 700 supports a normal charging mode and a quick charging mode, and a charging current corresponding to the quick charging mode is greater than a charging current corresponding to the normal charging mode. The terminal device 700 includes the following.

A communication circuit 710 is configured to receive clock signal from the power supply device via a first data line of the USB interface in a process of that the terminal device 700 is coupled to the power supply device, and the clock signal is used to indicate a communication sequence between the terminal device 700 and the power supply device. The communication circuit 710 is further configured to conduct a bidirectional communication with the power supply device via a second data line of the USB interface under control of the communication sequence, so as to cause the power supply device to determine to charge the terminal device 700 in the quick charging mode.

A charging circuit 720 is configured to receive the charging current corresponding to the quick charging mode from the power supply device to charge a battery of the terminal device 700.

In embodiments of the present disclosure, the power supply device does not increase the charging current blindly to implement quick charging, but negotiates with the terminal device via the bidirectional communication with the terminal device to determine whether or not the quick charging mode can be adopted. Compared to the present technology, the security of the quick charging process is improved.

Optionally, in an embodiment, the communication sequence includes instruction reception time slots of the terminal device 700 and instruction transmission time slots of the terminal device 700, and the instruction reception time slots and the instruction transmission time slots are alternatively generated. The communication circuit 710 is configured to receive a first instruction from the power supply device via the second data line during the instruction reception time slot of the terminal device 700, and the first instruction is used to query the terminal device 700 for whether or not to activate the quick charging mode. The communication circuit 710 is further configured to transmit a reply instruction corresponding to the first instruction to the power supply device via the second data line during the instruction transmission time slot of the terminal device 700, and the reply instruction corresponding to the first instruction is used for indicating that the terminal device 700 agrees to activate the quick charging mode.

Optionally, in an embodiment, the instruction reception time slot of the terminal device 700 includes a number of clock periods, and each clock period is used for receiving a 1-bit data.

Optionally, in an embodiment, the instruction reception time slot of the terminal device 700 includes eight clock periods, and the first instruction includes a 8-bit data.

Optionally, in an embodiment, the instruction transmission time slot of the terminal device 700 includes a number of clock periods, and each clock period is used for transmitting a 1-bit data.

Optionally, in an embodiment, the instruction transmission time slot of the terminal device 700 includes ten clock periods, and the reply instruction corresponding to the first instruction includes a 10-bit data.

Optionally, in an embodiment, the reply instruction corresponding to the first instruction is an instruction of the quick charging communication instruction set of the terminal device 700, and instructions of the quick charging communication instruction set have the same previous n bits.

Optionally, in an embodiment, each clock period of the clock signal includes a low level of 10 us and a high level of 500 us.

Optionally, in an embodiment, the first data line is a D+ data line of the USB interface, and the second data line is a D− data line of the USB interface.

Those skilled in the art should appreciate that units and programming steps of various examples described in the embodiments of the present disclosure can be realized by electronic hardware or a combination of computer software and electronic hardware. Whether these functions are realized by hardware or software depends on particular applications and design constraint conditions. For each particular application, professionals can employ different methods to realize described functions, but this realization should fall into the scope of the present disclosure.

For convenience and simplicity, those skilled in the art can clearly understand that when the specific work processes of the above described systems, devices, and units are described, the corresponding processes of the above method embodiments can be referred, which will not be repeated herein.

In several embodiments provided by the present disclosure, it can be understood that the disclosed systems, devices, and methods can be implemented by other manners. For example, the device embodiments described above are only schematic. For example, the units are divided according to logic functions and can be divided by another manner in an actual implementation. For example, several units or assemblies can be combined or can be integrated into another system, or some features can be ignored, or are not executed. Another point is that mutual coupling or direct coupling or communication connection shown or discussed herein can be indirect coupling or communication connection through certain interfaces, devices, or units, and can be in the form of electricity, machine, or other.

The units illustrated as separate units can be or cannot be physically separated, and components shown in units can be or cannot be physical units, that is, can be in a place, or can be distributed in several network units. A part of or all of the units can be selected according to actual need to realize the purpose of the solution of the embodiments.

Additionally, various functional units in the embodiments of the present disclosure can be integrated into one processing unit, or various functional units can exist alone, or two or more units can be integrated into one unit.

If the functions can be realized in the form of software functional units and can be sold or used as stand-alone products, they can be stored in a computer-readable storage medium. Based on such understanding, the technical solution of the present disclosure or the part that contributes to the existing technology or a part of the technical solution can be embodied in the form of a software product. The computer software product can be stored in a storage medium, and include a plurality of instructions configured to direct a computer device (personal computer, server, or network device) to execute all of or a part of steps of various embodiments of the present disclosure. The storage mediums described above include a U disk, a mobile disk, a read-only memory (ROM), a random access memory (RAM), a disc, a compact disc, or other medium storing program codes.

The foregoing descriptions are merely preferred embodiments of the present disclosure, rather than limiting the present disclosure. Any one skilled in the art can easily make change or alterations within the technology range of the present disclosure, and those change or alterations shall fall within the protection scope of the present disclosure. Therefore, the protection scope of the present disclosure shall be limited by the protection scope of the claims.

Claims

1. A charging method comprising:

transmitting a clock signal from a power supply device to a terminal device when the power supply device becomes coupled to the terminal device via a Universal Serial Bus (USB) interface, wherein the clock signal indicates a communication sequence between the power supply device and the terminal device;

conducting a bidirectional communication between the power supply device and the terminal device under control of the communication sequence to determine to charge the terminal device in a charging mode upon an instruction indicating that the terminal device agrees to activate the charging mode is received from the terminal device by the power supply device via the bidirectional communication; and

adjusting a charging current of the power supply device to be a charging current corresponding to the charging mode to charge the terminal device.

2. The method of claim 1, wherein the communication sequence comprises instruction transmission time slots of the power supply device and instruction reception time slots of the power supply device, wherein the instruction transmission time slots and the instruction reception time slots are alternatively generated; and

an instruction is transmitted from the power supply device to the terminal device during each of the instruction transmission time slots of the power supply device, and an instruction is received by the power supply device from the terminal device during each of the instruction reception time slots of the power supply device.

3. The method of claim 2, wherein of the power supply device comprises a plurality of clock periods, wherein each of the plurality of clock periods is used for transmitting a 1-bit data.

4. The method of claim 3, wherein the instruction transmission time slot of the power supply device comprises eight clock periods.

5. The method of claim 2, wherein the instruction reception time slot of the power supply device comprises a plurality of clock periods, wherein each of the plurality of clock periods is used for receiving a 1-bit data.

6. The method of claim 5, wherein the instruction reception time slot of the power supply device comprises ten clock periods.

7. The method of claim 1, wherein each clock period of the clock signal comprises a low level of 10 μs and a high level of 500 μs.

8. A power supply device comprising:

at least one processor; and

a computer readable memory, coupled to the at least one processor and storing at least one computer executable instruction therein which, when executed by the at least one processor, causes the at least one processor to: transmit a clock signal to a terminal device when the power supply device becomes coupled to the terminal device via a Universal Serial Bus (USB) interface, wherein the clock signal indicates a communication sequence between the power supply device and the terminal device; conduct a bidirectional communication between the power supply device and the terminal device under control of the communication sequence to determine to charge a battery of the terminal device in a charging mode upon that an instruction indicating that the terminal device agrees to activate the charging mode is received from the terminal device via the bidirectional communication; and adjust a charging current of the power supply device to be a charging current corresponding to the charging mode to charge the terminal device.

9. The power supply device of claim 8, wherein the communication sequence comprises instruction transmission time slots of the power supply device and instruction reception time slots of the power supply device, wherein the instruction transmission time slots and the instruction reception time slots are alternatively generated; and

an instruction is transmitted from the power supply device to the terminal device during each of the instruction transmission time slots of the power supply device, and an instruction is received by the power supply device from the terminal device during each of the instruction reception time slots of the power supply device.

10. The power supply device of claim 9, wherein the instruction transmission time slot of the power supply device comprises a plurality of clock periods, wherein each of the plurality of clock periods is used for transmitting a 1-bit data.

11. The power supply device of claim 10, wherein the instruction transmission time slot of the power supply device comprises eight clock periods.

12. The power supply device of claim 9, wherein the instruction reception time slot of the power supply device comprises a plurality of clock periods, wherein each of the plurality of clock periods is used for receiving a 1-bit data.

13. The power supply device of claim 12, wherein the instruction reception time slot of the power supply device comprises ten clock periods.

14. The power supply device of claim 8, wherein each clock period of the clock signal comprises a low level of 10 s and a high level of 500 s.

15. A terminal device comprising:

at least one processor; and

a computer readable memory, coupled to the at least one processor and storing at least one computer executable instruction therein which, when executed by the at least one processor, causes the at least one processor to: receive a clock signal from a power supply device when the power supply device becomes coupled to the terminal device via a Universal Serial Bus (USB) interface, wherein the clock signal indicates a communication sequence between the power supply device and the terminal device; conduct a bidirectional communication between the power supply device and the terminal device under control of the communication sequence to determine to charge a battery of the terminal device in a charging mode upon that an instruction indicating that the terminal device agrees to activate the charging mode is transmitted to the power supply device via the bidirectional communication; and receive a charging current corresponding to the charging mode from the power supply device to charge the battery of the terminal device.

16. The terminal device of claim 15, wherein the communication sequence comprises instruction reception time slots of the terminal device and instruction transmission time slots of the terminal device, wherein the instruction reception time slots and the instruction transmission time slots are alternatively generated; and

an instruction is transmitted from the terminal device to the power supply device during each of the instruction transmission time slots of the terminal device, and an instruction is received by the terminal device from the power supply device during each of the instruction reception time slots of the terminal device.

17. The terminal device of claim 16, wherein the instruction transmission time slot of the terminal device comprises a plurality of clock periods, wherein each of the plurality of clock periods is used for transmitting a 1-bit data.

18. The terminal device of claim 17, wherein the instruction transmission time slot of the terminal device comprises eight clock periods.

19. The terminal device of claim 16, wherein the instruction reception time slot of the terminal device comprises a plurality of clock periods, wherein each of the plurality of clock periods is used for receiving a 1-bit data.

20. The terminal device of claim 19, wherein the instruction reception time slot of the terminal device comprises ten clock periods.