TRANSMISSION DEVICE, RECEPTION DEVICE, AND COMMUNICATION SYSTEM
A transmission device of the disclosure includes: a generator unit that generates, on the basis of a control signal, a transmission symbol signal that indicates a sequence of transmission symbols; an output control unit that generates an output control signal on the basis of the transmission symbol signal; and a driver unit that generates, on the basis of the output control signal, a first output signal, a second output signal, and a third output signal. The generator unit generates the transmission symbol signal on the basis of the control signal, to allow the first output signal, the second output signal, and the third output signal to exchange signal patterns with one another.
The present application is a Continuation Application of U.S. patent application Ser. No. 15/523,768 filed May 2, 2017, which is a 371 National Stage Entry of International Application No.: PCT/JP2015/080516, filed on Oct. 29, 2015, which in turn claims priority from Japanese Application No. 2014-249340, filed on Dec. 9, 2014, the entire contents of which are incorporated herein by reference.
TECHNICAL FIELDThe disclosure relates to a transmission device that performs signal transmission, a reception device that performs signal reception, and a communication system that performs signal transmission and reception.
BACKGROUND ARTWith higher functionalization and multifunctionalization of electronic apparatuses in recent years, the electronic apparatuses are equipped with various devices such as semiconductor chips, sensors, and display devices. Among these devices, data exchange is performed in a large amount. The amount of data has been increasing in accordance with the higher functionalization and the multifunctionalization of the electronic apparatuses. Accordingly, the data exchange is often carried out with utilization of a high-speed interface that is able to transmit and receive data at a speed of, for example, several Gbps.
Regarding methods of increasing transmission capacity even more, various techniques have been disclosed. For example, PTLs 1 and 2 disclose communication systems in which data exchange is carried out with utilization of three signals each having three voltage levels.
CITATION LIST Patent LiteraturePTL 1: Japanese Unexamined Patent Application Publication (Translation of PCT Application) No. 2011-517159
PTL 2: Japanese Unexamined Patent Application Publication (Translation of PCT Application) No. 2010-520715
SUMMARY OF THE INVENTIONAs described, in the communication system, larger transmission capacity is desired, with expectation of a further increase in the transmission capacity.
It is therefore desirable to provide a transmission device, a reception device, and a communication system that make it possible to increase transmission capacity.
A first transmission device according to an embodiment of the disclosure includes a generator unit, an output control unit, and a driver unit. The generator unit generates, on the basis of a control signal, a transmission symbol signal that indicates a sequence of transmission symbols. The output control unit generates an output control signal on the basis of the transmission symbol signal. The driver unit generates, on the basis of the output control signal, a first output signal, a second output signal, and a third output signal. The generator unit generates the transmission symbol signal on the basis of the control signal, to allow the first output signal, the second output signal, and the third output signal to exchange signal patterns with one another.
A second transmission device according to an embodiment of the disclosure includes a symbol generator unit and an output unit. The symbol generator unit generates a symbol signal on the basis of a transition signal that indicates a transition in a sequence of transmission symbols. The symbol generator unit is configured to be able to set the transmission symbol at a head of the sequence. The output unit generates, on the basis of the symbol signal, a first output signal, a second output signal, and a third output signal.
A reception device according to an embodiment of the disclosure includes a receiver unit and a processor unit. The receiver unit generates, on the basis of a first input signal, a second input signal, and a third input signal, a first symbol signal that indicates a sequence of symbols. The processor unit generates, as a second symbol, on the basis of a control signal and on a basis of the first symbol signal, the first symbol signal that would be generated on a condition that the first input signal, the second input signal, and the third input signal exchange signal patterns with one another.
A communication system according to an embodiment of the disclosure includes a transmission device and a reception device. The transmission device generates, on the basis of a control signal, a plurality of sets of three output signals. The reception device receives the plurality of sets of the output signals. The transmission device is configured to be able to allow, on the basis of the control signal, the three output signals to exchange signal patterns with one another, in each of the plurality of sets of the output signals.
In the first transmission device according to the embodiment of the disclosure, on the basis of the control signal, generated is the transmission symbol signal. On the basis of the transmission symbol signal, generated are the first output signal, the second output signal, and the third output signal. The transmission symbol signal is generated to allow the first output signal, the second output signal, and the third output signal to exchange the signal patterns with one another.
In the second transmission device according to the embodiment of the disclosure, in the symbol generator unit, the symbol signal is generated on the basis of the transition signal that indicates the transition in the sequence of the transmission symbols. In the output unit, on the basis of the symbol signal, generated are the first output signal, the second output signal, and the third output signal. The symbol generator unit is configured to be able to set the transmission symbol at the head of the sequence of the transmission symbols.
In the reception device according to the embodiment of the disclosure, the first symbol signal is generated on the basis of the first input signal, the second input signal, and the third input signal. On the basis of the first symbol signal and on the basis of the control signal, generated is the second symbol signal. At this occasion, as the second symbol signal, generated is the first symbol signal that would be generated on the condition that the first input signal, the second input signal, and the third input signal exchange the signal patterns with one another.
In the communication system according to the embodiment of the disclosure, the plurality of sets of the transmission signals are generated, and transmitted from the transmission device to the reception device. At this occasion, the transmission device is configured to be able to allow, on the basis of the control signal, the three output signals to exchange the signal patterns with one another, in each set.
According to the first transmission device of the embodiment of the disclosure, the first transmission symbol is generated to allow the first output signal, the second output signal, and the third output signal to exchange the signal patterns with one another. Hence, it is possible to increase the transmission capacity.
According to the second transmission device of the embodiment of the disclosure, the configuration is so made as to be able to set the transmission symbol at the head of the sequence. Hence, it is possible to increase the transmission capacity.
According to the reception device of the embodiment of the disclosure, as the second symbol signal, generated is the first symbol signal that would be generated on the condition that the first input signal, the second input signal, and the third input signal exchange the signal patterns with one another. Hence, it is possible to increase the transmission capacity.
According to the communication system of the embodiment of the disclosure, the configuration is so made as to be able to allow, on the basis of the control signal, the three output signal to exchange the signal patterns with one another, in each set. Hence, it is possible to increase the transmission capacity.
It is to be noted that effects of the disclosure are not necessarily limited to the effects described above, and may include any of effects that are described herein.
In the following, some embodiments of the disclosure are described in detail with reference to the drawings. It is to be noted that description is made in the following order.
1. First Embodiment 2. Second Embodiment 3. Application Example 1. FIRST EMBODIMENT Configuration ExampleThe communication system 1 includes a transmission device 10 and a reception device 50. The transmission device 10 may include three output terminals P0 to P2. The reception device 50 may include three input terminals PA to PC. Moreover, the output terminal P0 of the transmission device 10 and the input terminal PA of the reception device 50 may be coupled to each other through a transmission path 100. The output terminal P1 of the transmission device 10 and the input terminal PB of the reception device 50 may be coupled to each other through a transmission path 101. The output terminal P2 of the transmission device 10 and the input terminal PC of the reception device 50 may be coupled to each other through a transmission path 102. The transmission device 10 may output a signal SIG0 from the output terminal P0, output a signal SIG1 from the output terminal P1, and output a signal SIG2 from the output terminal P2. Moreover, the reception device 50 may receive the signal SIG0 through the input terminal PA, receive the signal SIG1 through the input terminal PB, and receive the signal SIG2 through the input terminal PB. Characteristic impedance of the transmission paths 100 to 102 that transmit the signals may be 50 [Ω] in this example. The signals SIG0, SIG1, and SIG2 may each make transitions among the three voltage levels (a high level voltage VH, a medium level voltage VM, and a low level voltage VL). The transmission device 10 may be configured to be able to transmit the signals to the various reception devices 50 that differ in the order of the input terminals PA to PC, as described later.
The clock generator unit 17 may generate a clock TxCK. A frequency of the clock TxCK may be, for example, about 2 [GHz]. The clock generator unit 17 may be constituted by, for example, a PLL (Phase Locked Loop), and generate the clock TxCK on the basis of a reference clock (not illustrated) supplied from, for example, outside of the transmission device 10. Moreover, the clock generator unit 17 may supply the clock TxCK to the divider circuit 18, the serializers 11 to 13, and the output control unit 14.
The divider circuit 18 may perform division operation on the basis of the clock TxCK, to generate a clock CK. The divider circuit 18 may perform, in this example, the division operation by seven. In other words, a frequency of the clock CK may be, in this example, about 285 [MHz] (=2 [GHz]/7). Moreover, the divider circuit 18 may supply the clock CK to the transition signal generator unit 20 and the transmission symbol generator unit 30.
The transition signal generator unit 20 may generate transition signals TxF0 to TxF6, TxR0 to TxR6, and TxP0 to TxP6, on the basis of an inputted signal and the clock CK. Here, a single set of the transition signals TxF0, TxR0, and TxP0 may indicate a transition of a symbol in a sequence of symbols to be transmitted by the transmission device 10. Similarly, a single set of the transition signals TxF1, TxR1, and TxP1 may indicate the transition of the symbol. A single set of the transition signals TxF2, TxR2, and TxP2 may indicate the transition of the symbol. A single set of the transition signals TxF3, TxR3, and TxP3 may indicate the transition of the symbol. A single set of the transition signals TxF4, TxR4, and TxP4 may indicate the transition of the symbol. A single set of the transition signals TxF5, TxR5, and TxP5 may indicate the transition of the symbol. A single set of the transition signals TxF6, TxR6, and TxP6 may indicate the transition of the symbol. In other words, the transition signal generator unit 20 may generate seven sets of the transition signals. In the following, the term “transition signals TxF, TxR, and TxP” is utilized, as appropriate, to denote any one of the seven sets of the transition signals.
The transition signal TxF (Flip) may allow the symbol to make the transition between “+x” and “−x”, allow the symbol to make the transition between “+y” and “−y”, and allow the symbol to make the transition between “+z” and “−z”. In one specific example, in a case in which the transition signal TxF is “1”, the transition may be made so as to change polarity of the symbol (e.g., from “+x” to “−x”). In a case in which the transition signal TxF is “0”, no such transition may be made.
The transition signals TxR (Rotation) and TxP (Polarity) may allow the symbol to make the transition between “+x” and other than “−x”, between “+y” and other than “−y”, or “+z” and other than “−z”, in a case in which the transition signal TxF is “0”. In one specific example, in a case in which the transition signals TxR and TxP are respectively “1” and “0”, the transition may be made in a clockwise direction (e.g., from “+x” to “+y”) in
The transition signal generator unit 20 may generate the seven sets of the transition signals TxF, TxR, and TxP as described. Moreover, the transition signal generator unit 20 may supply the seven sets of the transition signals TxF, TxR, and TxP (the transition signals TxF0 to TxF6, TxR0 to TxR6, and TxP0 to TxP6) to the transmission symbol generator unit 30.
The transmission symbol generator unit 30 may generate symbol signals Tx10 to Tx16, Tx20 to Tx26, and Tx30 to Tx36, on the basis of the transition signals TxF0 to TxF6, TxR0 to TxR6, and TxP0 to TxP6 and on the basis of the clock CK. Here, a single set of the symbol signals Tx10, Tx20, and Tx30 may indicate any one of the six symbols “+x”, “+y”, “−y”, “+z”, and “−z”. Similarly, a single set of the symbol signals Tx11, Tx21, Tx31 may indicate any one of the six symbols. A single set of the symbol signals Tx12, Tx22, and Tx32 may indicate any one of the six symbols. A single set of the symbol signals Tx13, Tx23, and Tx33 may indicate any one of the six symbols. A single set of the symbol signals Tx14, Tx24, and Tx34 may indicate any one of the six symbols. A single set of the symbol signals Tx15, Tx25, and Tx35 may indicate any one of the six symbols. A single set of the symbol signals Tx16, Tx26, and Tx36 may indicate any one of the six symbols. In other words, the transmission symbol generator unit 30 may generate seven sets of the symbol signals, on the basis of the seven sets of the transition signals.
The signal generator unit 31 may generate the single set of the symbol signals Tx10, Tx20, and Tx30, on the basis of the single set of the transition signals TxF0, TxR0, and TxP0 and on the basis of a single set of symbol signals D16, D26, and D36. In one specific example, the signal generator unit 31 may obtain a symbol NS0 after the transition, as illustrated in
Similarly, the signal generator unit 32 may generate the single set of the symbol signals Tx11, Tx21, and Tx31 (a symbol NS1), on the basis of the single set of the transition signals TxF1, TxR1, and TxP1 and on the basis of the single set of the symbol signals Tx10, Tx20, and Tx30 (the symbol NS0). The signal generator unit 33 may generate the single set of the symbol signals Tx12, Tx22, and Tx32 (a symbol NS2), on the basis of the single set of the transition signals TxF2, TxR2, and TxP2 and on the basis of the single set of the symbol signals Tx11, Tx21, and Tx31 (the symbol NS1). The symbol generator unit 34 may generate the single set of the symbol signals Tx13, Tx23, and Tx33 (a symbol NS3), on the basis of the single set of the transition signals TxF3, TxR3, and TxP3 and on the basis of the single set of the symbol signals Tx12, Tx22, and Tx32 (the symbol NS2). The signal generator unit 35 may generate the single set of the symbol signals Tx14, Tx24, and Tx34 (a symbol NS4), on the basis of the single set of the transition signals TxF4, TxR4, and TxP4 and on the basis of the single set of the symbol signals Tx13, Tx23, and Tx33 (the symbol NS3). The signal generator unit 36 may generate the single set of the symbol signals Tx15, Tx25, and Tx35 (a symbol NS5), on the basis of the single set of the transition signals TxF5, TxR5, and TxP5 and on the basis of the single set of the symbol signals Tx14, Tx24, and Tx34 (the symbol NS4). The signal generator unit 37 may generate the single set of the symbol signals Tx16, Tx26, and Tx36 (a symbol NS6), on the basis of the single set of the transition signals TxF6, TxR6, and TxP6 and on the basis of the single set of the symbol signals Tx15, Tx25, and Tx35 (the symbol NS5). Thus, the signal generator units 31 to 37 may be sequentially coupled to one another.
The flip flop 38 may perform, on the basis of the clock CK, samplings of the single set of the symbol signals Tx16, Tx26, and Tx36, and output results of the samplings as the single set of the symbol signals D16, D26, and D36, respectively. In other words, the flip flop 38 may allow the symbol NS6 indicated by the single set of the symbol signals Tx16, Tx26, and Tx36 to be delayed by a term of one clock of the clock CK, to output the resultant symbol as the single set of the symbol signals D16, D26, and D36 (a symbol NS7).
With this configuration, in the transmission symbol generator unit 30, in a certain term of cycles of the clock CK, the signal generator units 31 to 37 may sequentially generate the symbols NS0 to NS6. Moreover, the flip flop 38 may supply the symbol NS6 generated by the signal generator unit 37, in a next term of the cycles, as the symbol NS7, to the signal generator unit 31.
The mode setting unit 19 (
The mode processor unit 40 may generate symbol signals Tx110 to Tx116, Tx120 to Tx126, and Tx130 to Tx136, on the basis of the mode signal Smode and on the basis of the symbol signals Tx10 to Tx16, Tx20 to Tx26, and Tx30 to Tx36. In one specific example, the mode processor unit 40 may generate the symbol signals Tx110 to Tx116, Tx120 to Tx126, and Tx130 to Tx136, to allow the signals SIG0, SIG1, and SIG2 to exchange signal patterns with one another in accordance with the mode signal Smode.
In other words, since the transmission device 10 and the reception device 50 may be supplied by various vendors, there may be a case in which the order of the output terminals P0 to P2 and the order of the input terminals PA to PC do not correspond to each other in this order. Moreover, for example, in a case in which the transmission device 10 is mounted on a front surface of a printed circuit board while the reception device 50 is mounted on a rear surface of the printed circuit board, there may be a case in which the order of the output terminals P0 to P2 and the order of the input terminals PA to PC do not correspond to each other in this order. Accordingly, in the communication system 1, the mode processor unit 40 may generate the symbol signals Tx110 to Tx116, Tx120 to Tx126, and Tx130 to Tx136, on the basis of the symbol signals Tx10 to Tx16, Tx20 to Tx26, and Tx30 to Tx36, to allow the signals SIG0, SIG1, and SIG2 to exchange the signal patterns with one another. In this way, in the communication system 1, it is possible to perform signal transmission, regardless of the order of the input terminals PA to PC of the reception device 50, without crossing of wirings between the transmission device 10 and the reception device 50.
The mode setting unit 19 may be so constituted that the mode setting unit 19 includes, for example, a resistor. The mode setting unit 19 may set the operation modes M1 to M6 of the mode processor unit 40, on the basis of an instruction from an undepicted controller.
The operation mode M1 may be a mode used in a case in which the input terminals of the reception device 50 are arranged in the order: the input terminals PA, PB, and PC (
The operation mode M2 may be a mode used in a case in which the input terminals of the reception device 50 are arranged in the order: the input terminals PC, PA, and PB (
The operation mode M3 may be a mode used in a case in which the input terminals of the reception device 50 are arranged in the order: the input terminals PB, PC, and PA (
The operation mode M4 may be a mode used in a case in which the input terminals of the reception device 50 are arranged in the order: the input terminals PB, PA, and PC (
The operation mode M5 may be a mode used in a case in which the input terminals of the reception device 50 are arranged in the order: the input terminals PC, PB, and PA (
The operation mode M6 may be a mode used in a case in which the input terminals of the reception device 50 are arranged in the order: the input terminals PA, PC, and PB (
The mode setting unit 19 may transmit, with the use of the mode signal Smode, to the mode processor unit 40, an operation mode out of the operation modes M1 to M6 that corresponds to the coupling between the output terminals P0, P1, and P2 of the transmission device 10 and the input terminals PA, PB, and PC of the reception device 50.
As described, in the operation modes M1 to M3, the processor circuit 41 may rearrange the symbol signals Tx10, Tx20, and Tx30, to generate the symbol signals Tx110, Tx120, and Tx130. Moreover, in the operation modes M4 and M6, the processor circuit 41 may rearrange the inverted signal of the symbol signal Tx10, the inverted signal of the symbol signal Tx20, and the inverted signal of the symbol signal Tx30, to generate the symbol signals Tx110, Tx120, and Tx130.
It is to be noted in this example, description is made with the operation of the processor circuit 41 given as an example, but the same may apply to the processor circuits 42 to 47.
The serializer 11 (
The output control unit 14 may generate six signals PU0, PD0, PU1, PD1, PU2, and PD2, on the basis of the symbol signals Tx1, Tx2, and Tx3 and on the basis of the clock TxCK. Moreover, the output control unit 14 may supply the signals PU0 and PD0 to the pre-driver unit 150, supply the signals PU1 and PD1 to the pre-driver unit 151, and supply the signals PU2 and PD2 to the pre-driver unit 152.
The pre-driver unit 150 may drive the driver unit 160 on the basis of the signals PU0 and PD0. The pre-driver unit 151 may drive the driver unit 161 on the basis of the signals PU1 and PD1. The pre-driver unit 152 may drive the driver unit 162 on the basis of the signals PU2 and PD2.
The pre-driver unit 150 may include pre-driver circuits DU and DD. The pre-driver circuit DU may drive a transistor MU (described later) of the driver unit 160 on the basis of the signal PU0. The pre-driver circuit DD may drive a transistor MD (described later) of the driver unit 160 on the basis of the signal PD0. The same may apply to the pre-driver units 151 and 152.
The driver unit 160 may generate the signal SIG0. The driver unit 161 may generate the signal SIG1. The driver unit 162 may generate the signal SIG2.
The driver unit 160 may include the transistors MU and MD, and resistors RU and RD. The transistors MU and MD may be N-channel MOS (Metal Oxide Semiconductor) FETs (Field Effect Transistors). The transistor MU may include a drain supplied with a power supply voltage VDD, a gate supplied with an output signal of the pre-driver circuit DU of the pre-driver unit 150, and a source coupled to one end of the resistor RU. The transistor MD may include a drain coupled to one end of the resistor RD, a gate supplied with an output signal of the pre-driver circuit DD of the pre-driver unit 150, and a source that is grounded. The resistors RU and RD may function as terminators, and be 50 [Ω] each in this example. The resistor RU may have the one end coupled to the source of the transistor MU, and another end coupled to another end of the resistor RD and coupled to an output terminal P0. The resistor RD may have the one end coupled to the drain of the transistor MD, and the other end coupled to the other end of the resistor RU and coupled to the output terminal P0. The same may apply to the driver units 161 and 162.
With this configuration, the output control unit 14, the pre-driver units 150 to 152, and the driver units 160 to 162 may set, on the basis of the symbol signals Tx1 to Tx3, voltages of the output terminals P0 to P2 as the respectively different three voltages (the high level voltage VH, the medium level voltage VM, and the low level voltage VL).
The resistors 51A, 51B, and 51C may function as terminators in the communication system 1. The resistor 51A may include one end coupled to the input terminal PA, and another end coupled to another end of the resistor 51B and another end of the resistor 51C. The resistor 51B may include one end coupled to the input terminal PB, and the other end coupled to the other ends of the resistors 51A and 51C. The resistor 51C may include one end coupled to the input terminal PC, and the other end coupled to the other ends of the resistors 51A and 51B.
The amplifiers 52A, 52B, and 52C may each output a signal corresponding to a difference between a signal at a positive input terminal and a signal at a negative input terminal. The amplifier 52A may include the positive input terminal that is coupled to the negative input terminal of the amplifier 52C and coupled to the one end of the resistor 51A, and the negative input terminal that is coupled to the positive input terminal of the amplifier 52B and coupled to the one end of the resistor 51B. The amplifier 52B may include the positive input terminal that is coupled to the negative input terminal of the amplifier 52A and coupled to the one end of the resistor 51B, and the negative input terminal that is coupled to the positive input terminal of the amplifier 52C and coupled to the one end of the resistor 51C. The amplifier 52C may include the positive input terminal that is coupled to the negative input terminal of the amplifier 52B and coupled to the one end of the resistor 51C, and the negative input terminal that is coupled to the positive input terminal of the amplifier 52A and coupled to the resistor 51A.
With this configuration, the amplifier 52A may output the signal corresponding to the difference between the signal received by the input terminal PA and the signal received by the input terminal PB. The amplifier 52B may output the signal corresponding to the difference between the signal received by the input terminal PB and the signal received by the input terminal PC. The amplifier 52C may output the signal corresponding to the difference between the signal received by the input terminal PC and the signal received by the input terminal PA.
The clock generator unit 53 may generate a clock RxCK on the basis of the output signals of the amplifiers 52A, 52B, and 52C.
The flip flop 54 may allow the output signals of the amplifiers 52A, 52B, and 52C to be delayed by a term of one clock of the clock RxCK, and output the respective resultant signals. The output signals of the flip flop 54 may indicate a symbol RS. Here, the symbol RS may indicate any one of the six symbols “+x”, “−x”, “+y”, “−y”, “+z”, and “−z”, as with the symbols NS0 to NS6.
The flip flop 55 may allow the three output signals of the flip flop 54 to be delayed by the term of one clock of the clock RxCK, and output the respective resultant signals. In other words, the flip flop 55 may allow the symbol RS to be delayed by the term of one clock of the clock RxCK, to generate a symbol RS2. The symbol RS2 may be a precedingly received symbol, and indicate any one of the six symbols “+x”, “−x”, “+y”, “−y”, “+z”, and “−z”, as with the symbol RS.
The signal generator unit 56 may generate transition signals RxF, RxR, and RxP, on the basis of the output signals of the flip flops 54 and 55 and on the basis of the clock RxCK. The transition signals RxF, RxR, and RxP may respectively correspond to the transition signals TxF, TxR, and TxP in the transmission device 10, and indicate the transitions of the symbol. The signal generator unit 56 may identify the transition of the symbol (
Here, the transition signal generator unit 20, the transmission symbol generator unit 30, the mode processor unit 40, and the serializers 11 to 13 correspond to one specific example of a “generator unit” in the disclosure. The mode processor unit 40 corresponds to one specific example of a “processor unit” in the disclosure. The transmission symbol generator unit 30 corresponds to one specific example of a “symbol generator unit” in the disclosure. The symbol signals Tx1, Tx2, and Tx3 correspond to one specific example of a “transmission symbol signal” in the disclosure. The signals PU0, PD0, PU1, PD1, PU2, and PD2 correspond to one specific example of an “output control signal” in the disclosure.
[Operation and Workings]Description is given next of operation and workings of the communication system 1 according to this embodiment.
[Outline of Overall Operation]First, description is given on an outline of overall operation of the communication system 1 with reference to
In the reception device 50 (
The transmission symbol generator unit 30 (
In the transmission symbol generator unit 30, first, the signal generator unit 31 may generate the single set of the symbol signals Tx10, Tx20, and Tx30 (the symbol NS0), on the basis of the single set of the transition signals TxF0, TxR0, and TxP0 and on the basis of the single set of the symbol signals D16, D26, and D36 (the symbol NS6 in the preceding term of the cycles of the clock CK). The signal generator unit 32 may generate the single set of the symbol signals Tx11, Tx21, and Tx31 (the symbol NS1), on the basis of the single set of the transition signals TxF1, TxR1, and TxP1 and on the basis of the single set of the symbol signals Tx10, Tx20, and Tx30 (the symbol NS0). The signal generator unit 33 may generate the single set of the symbol signals Tx12, Tx22, and Tx32 (the symbol NS2), on the basis of the single set of the transition signals TxF2, TxR2, and TxP2 and on the basis of the single set of the symbol signals Tx11, Tx21, and Tx31 (the symbol NS1). The signal generator unit 34 may generate the single set of the symbol signals Tx13, Tx23, and Tx33 (the symbol NS3), on the basis of the single set of the transition signals TxF3, TxR3, and TxP3 and on the basis of the single set of the symbol signals Tx12, Tx22, and Tx32 (the symbol NS2). The signal generator unit 35 may generate the single set of the symbol signals Tx14, Tx24, and Tx34 (the symbol NS4), on the basis of the single set of the transition signals TxF4, TxR4, and TxP4 and on the basis of the single set of the symbol signals Tx13, Tx23, and Tx33 (the symbol NS3). The signal generator unit 36 may generate the single set of the symbol signals Tx15, Tx25, and Tx35 (the symbol NS5), on the basis of the single set of the transition signals TxF5, TxR5, and TxP5 and on the basis of the single set of the symbol signals Tx14, Tx24, and Tx34 (the symbol NS4). The signal generator unit 37 may generate the single set of the symbol signals Tx16, Tx26, and Tx36 (the symbol NS6), on the basis of the single set of the transition signals TxF6, TxR6, and TxP6 and on the basis of the single set of the symbol signals Tx15, Tx25, and Tx35 (the symbol NS5).
Moreover, the flip flop 38 may allow the single set of the symbol signals Tx16, Tx26, and Tx36 (the symbol NS6) to be delayed by the term of one clock of the clock CK, to output the resultant signals as the single set of the symbol signals D16, D26, and D36.
As described, in the transmission symbol generator unit 30, in a certain term of the cycles of the clock CK, the signal generator units 31 to 37 may sequentially generate the symbols NS0 to NS6. The flip flop 38 may supply the symbol NS6 generated by the signal generator unit 37 to the signal generator unit 31 in the next term of the cycles. In other words, the seven signal generator units 31 to 37 and the single flip flop 38 may constitute a loop, allowing these circuits to operate in each term of the cycles of the clock CK having a low frequency. Hence, in the transmission symbol generator unit 30, it is possible to reduce possibility of occurrence of erroneous operation, even in a case with the frequency of the clock CK (the clock TxCK) being high.
[Detailed Operation of Mode Processor Unit 40]The mode processor unit 40 may generate the symbol signals Tx110 to Tx116, Tx120 to Tx126, and Tx130 to Tx136, on the basis of the mode signal Smode and on the basis of the symbol signals Tx10 to Tx16, Tx20 to Tx26, and Tx30 to Tx36. In one specific example, the mode processor unit 40 may generate the symbol signals Tx110 to Tx116, Tx120 to Tx126, and Tx130 to Tx136, to allow the signals SIG0, SIG1, and SIG2 to exchange the signal patterns with one another in accordance with the mode signal Smode.
As illustrated in
SIG0={1+(Tx1−Tx3)}/2
SIG1={1+(Tx2−Tx1)}/2
SIG2={1+(Tx3−Tx2)}/2
As described above, in the period PP (
SIG0={1+(Tx110−Tx130)}/2
SIG1={1+(Tx120−Tx110)}/2
SIG2={1+(Tx130−Tx120)}/2
The processor circuit 41 of the mode processor unit 40 may generate the symbol signals Tx110, Tx120, and Tx130 (the symbol NS10), as illustrated in
In the operation mode M1, as illustrated in
SIG0={1+(Tx10−Tx30)}/2
SIG1={1+(Tx20−Tx10)}/2
SIG2={1+(Tx30−Tx20)}/2
In the operation mode M1, as illustrated in
SIGA=SIG0={1+(Tx10−Tx30)}/2
SIGB=SIG1={1+(Tx20−Tx10)}/2
SIGC=SIG2={1+(Tx30−Tx20)}/2
In the operation mode M2, as illustrated in
SIG0={1+(Tx30−Tx20)}/2
SIG1={1+(Tx10−Tx30)}/2
SIG2={1+(Tx20−Tx10)}/2
In the operation mode M2, as illustrated in
SIGA=SIG1={1+(Tx10−Tx30)}/2
SIGB=SIG2={1+(Tx20−Tx10)}/2
SIGC=SIG0={1+(Tx30−Tx20)}/2
As described, in the operation mode M2, the input terminals PA, PB, and PC of the reception device 50 (the reception device 50A) may be able to receive the same signals as those of the case of the operation mode M1.
In the operation mode M3, as illustrated in
SIG0={1+(Tx20−Tx10)}/2
SIG1={1+(Tx30−Tx20)}/2
SIG2={1+(Tx10−Tx30)}/2
In the operation mode M3, as illustrated in
SIGA=SIG2={1+(Tx10−Tx30)}/2
SIGB=SIG0={1+(Tx20−Tx10)}/2
SIGC=SIG1={1+(Tx30−Tx20)}/2
As described, in the operation mode M3, the input terminals PA, PB, and PC of the reception device 50 (the reception device 50B) may be able to receive the same signals as those of the cases such as the operation mode M1.
In the operation mode M4, as illustrated in
SIG0={1+(Tx20−Tx10)}/2
SIG1={1+(Tx10−Tx30)}/2
SIG2={1+(Tx20−Tx30)}/2
In the operation mode M4, as illustrated in
SIGA=SIG1={1+(Tx10−Tx30)}/2
SIGB=SIG0{=1+(Tx20−Tx10)}/2
SIGC=SIG2={1+(Tx30−Tx20)}/2
As described, in the operation mode M4, the input terminals PA, PB, and PC of the reception device 50 (the reception device 50C) may be able to receive the same signals as those of the cases such as the operation mode M1.
In the operation mode M5, as illustrated in
SIG0={1+(Tx30−Tx20)}/2
SIG1={1+(Tx20−Tx10)}/2
SIG2={1+(Tx10−Tx30)}/2
In the operation mode M5, as illustrated in
SIGA=SIG2={1+(Tx10−Tx30)}/2
SIGB=SIG1={1+(Tx20−Tx10)}/2
SIGC=SIG0={1+(Tx30−Tx20)}/2
As described, in the operation mode M5, the input terminals PA, PB, and PC of the reception device 50 (the reception device 50D) may be able to receive the same signals as those of the cases such as the operation mode M1.
In the operation mode M6, as illustrated in
SIG0={1+(Tx10−Tx30)}/2
SIG1={1+(Tx30−Tx20)}/2
SIG2={1+(Tx20−Tx10)}/2
In the operation mode M6, as illustrated in
SIGA=SIG0={1+(Tx10−Tx30)}/2
SIGB=SIG2={1+(Tx20−Tx10)}/2
SIGC=SIG1={1+(Tx30−Tx20)}/2
As described, in the operation mode M6, the input terminals PA, PB, and PC of the reception device 50 (the reception device 50E) may be able to receive the same signals as those of the cases such as the operation mode M1.
As described, in the transmission device 10, the mode processor unit 40 is provided, allowing the signals SIG0, SIG1, and SIG2 to exchange the signal patterns with one another. Hence, it is possible to increase the transmission capacity. In other words, but for the mode processor unit 40, some of the wirings between the transmission device 10 and the reception devices 50A to 50E (
As described, in this embodiment, the mode processor unit is provided. This allows for the signal transmission without the crossing of the wirings between the transmission device and the reception device. Hence, it is possible to increase the transmission capacity.
Modification Example 1-1In the forgoing embodiment, the mode processor unit 40 may be provided in a fore stage of the serializers 11 to 13, but this is non-limiting. Instead, for example, as in a transmission device 10A illustrated in
In the forgoing embodiment, the serialization of the symbol signals may be carried out after the generation of the transmission symbols, but this is non-limiting. For example, as in a transmission device 10B illustrated in
The serializer 11B may serialize the transition signals TxF0 to TxF6 in this order, on the basis of the transition signals TxF0 to TxF6 and on the basis of the clock TxCK, to generate a transition signal TxF8. The serializer 12B may serialize the transition signals TxR0 to TxR6 in this order, on the basis of the transition signals TxR0 to TxR6 and on the basis of the clock TxCK, to generate a transition signal TxR8. The serializer 13B may serialize the transition signals TxP0 to TxP6 in this order, on the basis of the transition signals TxP0 to TxP6 and on the basis of the clock TxCK, to generate a transition signal TxP8.
The transmission symbol generator unit 30B may generate the symbol signals Tx01, Tx02, and Tx03, on the basis of the transition signals TxF8, TxR8, and TxP8 and on the basis of the clock CK. The transmission symbol generator unit 30B may include a signal generator unit 31B and a flip flop (F/F) 38B. The signal generator unit 31B may generate the symbol signals Tx01, Tx02, and Tx03, on the basis of the transition signals TxF8, TxR8, and TxP8 and on the basis of the symbol signals D1, D2, and D3, as with the signal generator unit 31, for example. In one specific example, the signal generator unit 31B may obtain the symbol after the transition as illustrated in
The mode processor unit 40A may generate the symbol signals Tx1, Tx2, and Tx3, as illustrated in
As described, the transmission device 10B may be an equivalent of the transmission device 10 (
In the forgoing embodiment, the mode processor unit 40 may be provided in the transmission device 10, but this is non-limiting. Instead, for example, as in a reception device 50G illustrated in
In the operation mode M1, as illustrated in
Rx1=SIG0−SIG1
Rx2=SIG1−SIG2
Rx3=SIG2−SIG0
In the operation mode M1, as illustrated in
Rx11=SIG0−SIG1
Rx12=SIG1−SIG2
Rx13=SIG2−SIG0
In the operation mode M2, as illustrated in
Rx1=SIG1−SIG2
Rx2=SIG2−SIG0
Rx3=SIG0−SIG1
In the operation mode M2, as illustrated in
Rx11=SIG0−SIG1
Rx12=SIG1−SIG2
Rx13=SIG2−SIG0
As described, in the operation mode M2, the mode processor unit 58 may be able to output the same signals Rx11 to Rx13 as those of the case of the operation mode M1.
The same may apply to the other operation modes M3 to M6. With this configuration as well, it is possible to perform the signal transmission, without the crossing of the wirings between the transmission device and the reception device. Hence, it is possible to increase the transmission capacity.
Modification Example 1-4In the forgoing embodiment, the mode setting unit 19 may generate the mode signal Smode on the basis of the instruction from the undepicted controller. The controller may be provided in the transmission device 10, or alternatively the controller may be provided in the reception device as in a communication system 1F illustrated in
Likewise, the mode processor unit 57 of the reception device 50G according to the modification example 1-2 may generate the mode signal Smode on the basis of the undepicted controller. The controller may be provided in the reception device 50G, or alternatively, the controller may be provided in the transmission device as in a communication system 1G illustrated in
Moreover, two or more of the modification examples as described may be combined.
2. SECOND EMBODIMENTDescription is given next of a communication system 2 according to a second embodiment. This embodiment differs from the forgoing first embodiment in a method to allow the signals SIG0, SIG1, and SIG2 to exchange the signal patterns with one another. It is to be noted that component parts that are substantially same as those of the communication system 1 according to the forgoing first embodiment are denoted by the same reference characters, and description thereof is omitted as appropriate.
As illustrated in
The mode setting unit 69 may supply a mode signal Smode1 to the mode processor unit 61, while supplying a mode signal Smode2 to the transmission symbol generator unit 70, to set the operation modes M1 to M6 of the transmission device 60, as with the mode setting unit 19 according to the forgoing first embodiment.
The mode processor unit 61 may generate transition signals TxR10 to TxR16, on the basis of the mode signal Smode1 and on the basis of the transition signals TxR0 to TxR6.
The transmission symbol generator unit 70 may generate the symbol signals Tx10 to Tx16, Tx20 to Tx26, and Tx30 to Tx36, on the basis of the transition signals TxF0 to TxF6, TxR10 to TxR16, and TxP0 to TxP6 and on the basis of the clock CK.
It is to be noted that in this example, description is made with the operation of the selector SEL0 given as an example. However, the same may apply to the selectors SEL1 to SEL6.
Here, the transition signal generator unit 20, the mode processor unit 61, the transmission symbol generator unit 70, and the serializers 11 to 13 correspond to one specific example of a “generator unit” in the disclosure. The mode processor unit 61 corresponds to one specific example of a “processor unit” in the disclosure. The transmission symbol generator unit 70 corresponds to one specific example of a “symbol generator unit” in the disclosure.
Description is given next in detail of the operation of the transmission device 60. In what follows, for a purpose of easier description, description is made with use of a transmission device 80 that is an equivalent of the transmission device 60 (
The serializer 81 may serialize the transition signals TxF0 to TxF6 in this order, on the basis of the transition signals TxF0 to TxF6 and on the basis of the clock TxCK, to generate the transition signal TxF8. The serializer 82 may serialize the transition signals TxR0 to TxR6 in this order, on the basis of the transition signals TxR0 to TxR6 and on the basis of the clock TxCK, to generate the transition signal TxR8. The serializer 83 may serialize the transition signals TxP0 to TxP6 in this order, on the basis of the transition signals TxP0 to TxP6 and on the basis of the clock TxCK, to generate the transition signal TxP8.
The mode processor unit 84 may generate a transition signal TxR9, on the basis of the mode signal Smode1 and on the basis of the transition signal TxR8.
The transmission symbol generator unit 90 may generate the symbol signals Tx1, Tx2, and Tx3, on the basis of the transition signals TxF8, TxR9, and TxP8 and on the basis of the clock CK. The transmission symbol generator unit 90 may include a signal generator unit 91 and a flip flop (F/F) 92. The signal generator unit 91 may generate the symbol signals Tx1, Tx2, and Tx3, on the basis of the transition signals TxF8, TxR9, and TxP8 and on the basis of the symbol signals D1, D2, and D3, as with the signal generator unit 31, for example. In one specific example, the signal generator unit 91 may obtain the symbol NS21 after the transition as illustrated in
As described, the transmission device 80 may be the equivalent of the transmission device 60 (
In a case in which, for example, the transmission symbol (the symbol NS21) is “+x”, the transmission device 80 may allow the signal SIG0 to be the high level voltage VH, allow the signal SIG1 to be the low level voltage VL, and allow the signal SIG2 to be the medium level voltage VM. Thus, the voltage at the output terminal P0 is the high level voltage VH, while the voltage at the output terminal P1 is the low level voltage VL. Accordingly, a state of the transmission device 80 (the state on the transmission side) may be “P0toP1”. Similarly, in a case in which the transmission symbol is “−x”, the state on the transmission side may be “P1toP0”. In a case in which the transmission symbol is “+y”, the state on the transmission side may be “P1toP2”. In a case in which the transmission symbol is “−y”, the state on the transmission side may be “P2toP1”. In a case in which the transmission symbol is “+z”, the state on the transmission side may be “P2toP0”. In a case in which the transmission symbol is “−z”, the state on the transmission side may be “P0toP2”.
The reception device 50 may receive a symbol (a reception symbol) that corresponds to the operation modes M1 to M6 and to the state on the transmission side (the transmission symbol), as described below.
[Operation Mode M1]First, the flip flop 92 of the transmission symbol generator unit 90 may set the initial value (the initial symbol) of the transmission symbol (the symbol NS21) as the symbol “+x”. Thereafter, the mode setting unit 84 and the transmission symbol generator unit 90 may be sequentially supplied with 30 sets of the transition signals TxF8, TxR8, and TxP8. The mode setting unit 84 and the transmission symbol generator unit 90 may sequentially generate the transmission symbol (the symbol NS21), on the basis of the transition signals TxF8, TxR8, and TxP8 and on the basis of the preceding transmission symbol (the symbol NS22). In one specific example, when the first set of the transition signals is supplied, the symbol NS22 may be “+x”, and the transition signals TxF8, TxR8, and TxP8 may be “0”, “0”, and “0”. Accordingly, as summarized in
In the operation mode M1, as illustrated in
First, the flip flop 92 of the transmission symbol generator unit 90 may set the initial value (the initial symbol) of the transmission symbol (the symbol NS21) as the symbol “+y”. Thereafter, the mode setting unit 84 and the transmission symbol generator unit 90 may be sequentially supplied with, in this example, 30 sets of the transition signals TxF8, TxR8, and TxP8. The transition signals TxF8, TxR8, and TxP8 may be the same as those of the case of the operation mode M1 (
In the operation mode M2, as illustrated in
First, the flip flop 92 of the transmission symbol generator unit 90 may set the initial value (the initial symbol) of the transmission symbol (the symbol NS21) as the symbol “+z”. The mode setting unit 84 and the transmission symbol generator unit 90 may sequentially generate the transmission symbol (the symbol NS21), on the basis of the transition signals TxF8, TxR8, and TxP8 and on the basis of the preceding transmission symbol (the symbol NS22). In one specific example, when the first set of the transition signals is supplied, the symbol NS22 may be “+z”, and the transition signals TxF8, TxR8, and TxP8 may be “0”, “0”, and “0”. Accordingly, as summarized in
In the operation mode M3, as illustrated in
First, the flip flop 92 of the transmission symbol generator unit 90 may set the initial value (the initial symbol) of the transmission symbol (the symbol NS21) as the symbol “−x”. The mode setting unit 84 and the transmission symbol generator unit 90 may sequentially generate the transmission symbol (the symbol NS21), on the basis of the transition signals TxF8, TxR8, and TxP8 and on the basis of the preceding transmission symbol (the symbol NS22). In one specific example, when the first set of the transition signals is supplied, the symbol NS22 may be “−x”, and the transition signals TxF8, TxR8, and TxP8 may be “0”, “0”, and “0”. Accordingly, as summarized in
In the operation mode M4, as illustrated in
First, the flip flop 92 of the transmission symbol generator unit 90 may set the initial value (the initial symbol) of the transmission symbol (the symbol NS21) as the symbol “−y”. The mode setting unit 84 and the transmission symbol generator unit 90 may sequentially generate the transmission symbol (the symbol NS21), on the basis of the transition signals TxF8, TxR8, and TxP8 and on the basis of the preceding transmission symbol (the symbol NS22). In one specific example, when the first set of the transition signals is supplied, the symbol NS22 may be “−y”, and the transition signals TxF8, TxR8, and TxP8 may be “0”, “0”, and “0”. Accordingly, as summarized in
In the operation mode M5, as illustrated in
First, the flip flop 92 of the transmission symbol generator unit 90 may set the initial value (the initial symbol) of the transmission symbol (the symbol NS21) as the symbol “−z”. The mode setting unit 84 and the transmission symbol generator unit 90 may sequentially generate the transmission symbol (the symbol NS21), on the basis of the transition signals TxF8, TxR8, and TxP8 and on the basis of the preceding transmission symbol (the symbol NS22). In one specific example, when the first set of the transition signals is supplied, the symbol NS22 may be “−z”, and the transition signals TxF8, TxR8, and TxP8 may be “0”, “0”, and “0”. Accordingly, as summarized in
In the operation mode M6, as illustrated in
With the forgoing configuration as well, it is possible to perform the signal transmission without the crossing of the wirings between the transmission device and the reception device. Hence, it is possible to increase the transmission capacity.
Modification Example 2-1In the forgoing embodiment, as illustrated in
In the forgoing embodiment, the mode processing may be carried out in the transmission device 60 (the transmission device 80). However, this is non-limiting. In an alternative, the mode processing may be carried out in the reception device.
3. APPLICATION EXAMPLEDescription is given next of an application example of the communication systems described in the forgoing embodiments and modification examples.
The CPU 311 may process various pieces of information handled by the smartphone 300 in accordance with a program. The memory control unit 312 may control a memory 501 which the CPU 311 uses in performing information processing. The power supply control unit 313 may control a power supply of the smartphone 300.
The external interface 314 may be an interface provided for communication with an external device. In this example, the external interface 314 may be coupled to a wireless communication unit 502 and an image sensor 410. The wireless communication unit 502 may perform wireless communication with a base station of mobile phones. The wireless communication unit 502 may be so constituted that the wireless communication unit 502 includes a baseband unit and an RF (Radio Frequency) front end unit, without limitation. The image sensor 410 may acquire an image. The image sensor 410 may be so constituted that the image sensor 410 includes a CMOS sensor, without limitation.
The GPU 315 may perform image processing. The media processor unit 316 may process information such as sound, characters, and figures. The display control unit 317 may control a display 504 through the MIPI interface 318. The MIPI interface 318 may transmit an image signal to the display 504. As the image signal, for example, a signal of a YUV system, an RGB system, or other systems may be used. In one example, the communication system according to the forgoing example embodiments may be applied to a communication system between the MIPI interface 318 and the display 504.
The sensor unit 411 may acquire the image, and be constituted by, for example, the CMOS sensor. The ISP 412 may perform predetermined processing on the image acquired by the sensor unit 411. The JPEG encoder 413 may encode the image processed by the ISP 412, to generate an image of a JPEG form. The CPU 414 may control each block of the image sensor 410 in accordance with a program. The RAM 415 may be a memory which the CPU 414 uses in performing image processing. The ROM 416 may store the program to be executed in the CPU 414. The power supply control unit 417 may control a power supply of the image sensor 410. The I2C interface 418 may receive a control signal from the application processor 310. Moreover, although not illustrated, the image sensor 410 may receive, from the application processor 310, a clock signal in addition to the control signal. In one specific example, the image sensor 410 may be configured to be able to operate on the basis of the clock signals having various frequencies. The MIPI interface 419 may transmit the image signal to the application processor 310. As the image signal, for example, the signal of the YUV system, the RGB system, or other systems may be used. In one example, the communication system according to the forgoing example embodiments may be applied to a communication system between the MIPI interface 419 and the application processor 310.
Although description has been made by giving the embodiments and the modification examples, and the application example to the electronic apparatus as mentioned above, the contents of the technology are not limited to the above-mentioned example embodiments and may be modified in a variety of ways.
For example, in the forgoing example embodiments, the transition signal generator unit 20 may generate the seven sets of the transition signals TxF, TxR, and TxP. However, this is non-limiting. In one alternative example, the transition signal generator unit 20 may generate a plurality of, but six or less, sets of the transition signals. In another alternative, the transition signal generator unit 20 may generate eight or more sets of the transition signals. In one exemplary case in which the transition signal generator unit 20 has generated eight sets of the transition signals, the following may be desirable. The divider circuit 18 may perform division operation by eight, to generate the clock CK. The transmission symbol generator unit 30 may generate eight sets of the symbol signals on the basis of the eight sets of the transition signals.
Moreover, for example, in the forgoing example embodiments, the transistors MU and MD may be both turned off in the case in which, for example, the voltage of the output terminal is set as the medium level voltage VM. However, this is non-limiting. In one alternative, the transistors MU and MD may be both turned on. This provides Thevenin termination, making it possible to set the voltage of the output terminal as the medium level voltage VM.
Furthermore, for example, in the forgoing example embodiments, the transmission device may transmit the three signals to the reception device. However, this is non-limiting. Instead, for example, as illustrated in
It is to be noted that effects described herein are merely exemplified. Effects of the technology are not limited to the effects described herein. Effects of the technology may further include other effects than the effects described herein.
Moreover, the technology may have the following configurations.
(1) A transmission device, including:
a generator unit that generates, on a basis of a control signal, a transmission symbol signal that indicates a sequence of transmission symbols;
an output control unit that generates an output control signal on a basis of the transmission symbol signal; and
a driver unit that generates, on a basis of the output control signal, a first output signal, a second output signal, and a third output signal,
the generator unit generating the transmission symbol signal on the basis of the control signal, to allow the first output signal, the second output signal, and the third output signal to exchange signal patterns with one another.
(2) The transmission device according to (1), in which
the generator unit includes:
a processor unit that generates, on a basis of a predetermined number of first symbol signals and on the basis of the control signal, second symbol signals that are equal in number to the predetermined number; and
a serializer unit that serializes the predetermined number of the second symbol signals, to generate the transmission symbol signal.
(3) The transmission device according to (2), in which
the predetermined number of the second symbol signals are respectively associated with the predetermined number of the first symbol signals,
each of the predetermined number of the first symbol signals includes three signals,
each of the predetermined number of the second symbol signals includes three signals, and
the processor unit performs, on the basis of the control signal, rearrangement of the three signals included in one first symbol signal out of the predetermined number of the first symbol signals, or rearrangement of inverted signals of the three signals included in the relevant one first symbol signal, to generate one of the second symbol signals that is associated with the relevant one first symbol signal.
(4) The transmission device according to (3), in which
the transmission symbol signal includes three signals, and
the serializer unit serializes the predetermined number of the second symbol signals, with respect to each of the three signals included in the predetermined number of the second symbol signals, to generate each of the three signals included in the transmission symbol signal.
(5) The transmission device according to any one of (2) to (4), in which
the generator unit further includes a symbol generator unit that generates the predetermined number of the first symbol signals, on a basis of transition signals that are equal in number to the predetermined number, the transition signals each indicating a transition in the sequence of the transition symbols.
(6) The transmission device according to (1), in which
the generator unit includes a processor unit that generates the transmission symbol signal on a basis of a first symbol signal and on the basis of the control signal.
(7) The transmission device according to (6), in which
the first symbol signal includes three signals,
the transmission symbol signal includes three signals, and
the generator unit performs, on the basis of the control signal, rearrangement of the three signals included in the first symbol signal, or rearrangement of inverted signals of the three signals included in the first symbol signal, to generate the transmission symbol signal.
(8) The transmission device according to (6) or (7), in which
the generator unit further includes a serializer unit that serializes the predetermined number of second symbol signals, to generate the first symbol signal.
(9) The transmission device according to (6) or (7), in which
the generator unit further includes:
a serializer unit that serializes a predetermined number of first transition signals each of which indicates a transition in the sequence of the transmission symbols, to generate a second transition symbol; and
a symbol generator unit that generates the first symbol signal on a basis of the second transition signal.
(10) The transmission device according to (1), in which
the generator unit includes:
a symbol generator unit that generates, on a basis of a predetermined number of first transition signals each of which indicates a transition in the sequence of the transmission symbols, first symbol signals that are equal in number to the predetermined number, the symbol generator unit being configured to be able to set the transmission symbol at a head of the sequence; and
a serializer unit that serializes the predetermined number of the first symbol signals, to generate the transmission symbol signal.
(11) The transmission device according to (10), in which
the generator unit further includes a processor unit that generates the predetermined number of the first transition signals, on a basis of second transition signals that are equal in number to the predetermined number and on the basis of the control signal.
(12) The transmission device according to (11), in which
the predetermined number of the first transition signals are respectively associated with the predetermined number of the second transition signals,
each of the predetermined number of the second transition signals include three signals,
each of the predetermined number of the first transition signals include three signals, and
the processor unit controls, on the basis of the control signal, whether or not to invert one of the three signals included in one second transition signal out of the predetermined number of the second transition signals, to generate one of the first transition signals that is associated with the relevant one second transition signal.
(13) The transmission device according to (1), in which
the generator unit includes a symbol generator unit that generates the transmission symbol signal, on a basis of a first transition signal that indicates a transition in the sequence of the transmission symbols, the symbol generator unit being configured to be able to set, on the basis of the control signal, the transmission symbol at a head of the sequence.
(14) The transmission device according to (14), in which
the generator unit further includes:
a serializer unit that serializes a predetermined number of second transition signals to generate a third transition signal; and
a processor unit that generates the predetermined number of the first transition signals, on a basis of the third transition signal and on the basis of the control signal.
(15) A transmission device, including:
a symbol generator unit that generates a symbol signal on a basis of a transition signal that indicates a transition in a sequence of transmission symbols, the symbol generator unit being configured to be able to set the transmission symbol at a head of the sequence; and
an output unit that generates, on a basis of the symbol signal, a first output signal, a second output signal, and a third output signal.
(16) A reception device, including:
a receiver unit that generates, on a basis of a first input signal, a second input signal, and a third input signal, a first symbol signal that indicates a sequence of symbols; and
a processor unit that generates, as a second symbol signal, on a basis of a control signal and on a basis of the first symbol signal, the first symbol signal that would be generated on a condition that the first input signal, the second input signal, and the third input signal exchange signal patterns with one another.
(17) The reception device according to (16), in which
the first symbol signal includes a first signal, a second signal, and a third signal,
the second symbol signal includes a fourth signal, a fifth signal, and a sixth signal,
the receiver unit generates the first signal on a basis of the first input signal and the second input signal, generates the second signal on a basis of the second input signal and the third input signal, and generates the third signal on a basis of the first input signal and the third input signal, and
the processor unit performs, on the basis of the control signal, rearrangement of the first signal, the second signal, and the third signal, or rearrangement of an inverted signal of the first signal, an inverted signal of the second input signal, and an inverted signal of the third input signal, to generate the fourth signal, the fifth signal, and the sixth signal.
(18) A communication system, including:
a transmission device that generates, on a basis of a control signal, a plurality of sets of three output signals; and
a reception device that receives the plurality of sets of the output signals,
the transmission device being configured to be able to allow, on the basis of the control signal, the three output signals to exchange signal patterns with one another, in each of the plurality of sets of the output signals.
(19) The communication system according to (18), in which
the reception device generates the control signal.
(20) The communication system according to (18) or (19), in which
the transmission device is an image sensor, and
the reception device is a processor that processes an image acquired by the image sensor.
This application claims the benefit of Japanese Priority Patent Application JP2014-249340 filed on Dec. 9, 2014, the entire contents of which are incorporated herein by reference.
It should be understood by those skilled in the art that various modifications, combinations, sub-combinations and alterations may occur depending on design requirements and other factors insofar as they are within the scope of the appended claims or the equivalents thereof.
Claims
1. A reception device, comprising:
- a first input terminal configured to receive a first input signal, a second input terminal configured to receive a second input signal, and a third input terminal configured to receive a third input signal;
- a receiver unit configured to receive an output control signal from a transmission device, the output control signal being generated on a basis of a transmission symbol signal, the transmission symbol signal being generated on a basis of a mode control signal and indicating a sequence of transmission symbols, wherein
- the transmission symbol signal allows the first output signal, the second output signal, and the third output signal to exchange signal patterns with one another,
- the mode control signal indicates an operation mode on a basis of an arrangement order of the first, second, and third input terminals of the reception device, and
- the receiver unit generates a first symbol signal on the basis of the first input signal, the second input signal and the third input signal; and
- a processor configured to generate a second symbol signal on a basis of the output control signal and the first symbol signal.
2. The reception device according to claim 1, wherein
- on a basis of a predetermined number of first symbol signals and on the basis of the mode control signal, second symbol signals that are equal in number to the predetermined number are generated, and
- the predetermined number of the second symbol signals are serialized to generate the transmission symbol signal.
3. The reception device according to claim 2, wherein
- the predetermined number of the second symbol signals are respectively associated with the predetermined number of the first symbol signals,
- each of the predetermined number of the first symbol signals includes three signals,
- each of the predetermined number of the second symbol signals includes three signals, and
- on the basis of the mode control signal, rearrangement of the three signals included in one first symbol signal out of the predetermined number of the first symbol signals, or rearrangement of inverted signals of the three signals included in the relevant one first symbol signal, is performed to generate one of the second symbol signals that is associated with the relevant one first symbol signal.
4. The reception device according to claim 3, wherein
- the transmission symbol signal includes three signals, and
- the predetermined number of the second symbol signals are serialized with respect to each of the three signals included in the predetermined number of the second symbol signals, to generate each of the three signals included in the transmission symbol signal.
5. The reception device according to claim 2, wherein
- the predetermined number of the first symbol signals are generated on a basis of transition signals that are equal in number to the predetermined number, the transition signals each indicating a transition in the sequence of the transition symbols.
6. The reception device according to claim 1, wherein
- the transmission symbol signal is generated on a basis of the first symbol signal and on the basis of the mode control signal.
7. The reception device according to claim 6, wherein
- the first symbol signal includes three signals,
- the transmission symbol signal includes three signals, and
- on the basis of the mode control signal, rearrangement of the three signals included in the first symbol signal is performed, or rearrangement of inverted signals of the three signals included in the first symbol signal is performed, to generate the transmission symbol.
8. The reception device according to claim 6, wherein
- the predetermined number of second symbol signals are serialized to generate the first symbol signal.
9. The reception device according to claim 6, wherein
- a predetermined number of first transition signals, each of which indicates a transition in the sequence of the transmission symbols, are serialized to generate a second transition symbol, and
- the first symbol signal is generated on a basis of the second transition signal.
10. The reception device according to claim 1, wherein
- on a basis of a predetermined number of first transition signals each of which indicates a transition in the sequence of the transmission symbols, first symbol signals that are equal in number to the predetermined number are generated, wherein the transmission symbol is set at a head of the sequence; and
- the predetermined number of the first symbol signals are serialized to generate the transmission symbol signal.
11. The reception device according to claim 10, wherein
- the predetermined number of the first transition signals are generated, on a basis of second transition signals that are equal in number to the predetermined number and on the basis of the mode control signal.
12. The reception device according to claim 11, wherein
- the predetermined number of the first transition signals are respectively associated with the predetermined number of the second transition signals,
- each of the predetermined number of the second transition signals include three signals,
- each of the predetermined number of the first transition signals include three signals, and
- on the basis of the mode control signal, control is performed as to whether or not to invert one of the three signals included in one second transition signal out of the predetermined number of the second transition signals, to generate one of the first transition signals that is associated with the relevant one second transition signal.
13. The reception device according to claim 1, wherein
- the transmission symbol signal is generated on a basis of a first transition signal that indicates a transition in the sequence of the transmission symbols, with the transmission symbol configurable to be set, on the basis of the mode control signal, at a head of the sequence.
14. The reception device according to claim 13, wherein
- a predetermined number of second transition signals are serialized to generate a third transition signal; and
- the predetermined number of the first transition signals are generated on a basis of the third transition signal and on the basis of the mode control signal,
15. The reception device according to claim 1, wherein
- the first symbol signal includes a first signal, a second signal, and a third signal,
- the second symbol signal includes a fourth signal, a fifth signal, and a sixth signal,
- the receiver unit generates the first signal on a basis of the first input signal and the second input signal, generates the second signal on a basis of the second input signal and the third input signal, and generates the third signal on a basis of the first input signal and the third input signal, and
- the processor performs, on the basis of the output control signal, rearrangement of the first signal, the second signal, and the third signal, or rearrangement of an inverted signal of the first signal, an inverted signal of the second input signal, and an inverted signal of the third input signal, to generate the fourth signal, the fifth signal, and the sixth signal.
Type: Application
Filed: Oct 21, 2021
Publication Date: Feb 24, 2022
Patent Grant number: 11765004
Inventors: Takashi Yokokawa (Kanagawa), Hironobu Konishi (Kanagawa)
Application Number: 17/507,154
