SYSTEMS, METHODS, AND DEVICES FOR IMAGE PROCESSING
A device includes at least one processor and memory including instructions that when executed by the at least one processor, cause the at least one processor to scan an input image including pixels that have either a first state or a second state opposite the first state, initiate a first cluster and a first polygon that belongs to the first cluster upon encountering a first pixel of the input image that has the first state, execute a first set of operations to form the first polygon, generate an indication of one or more characteristics of the input image based on at least the first cluster, and output the indication.
This application claims priority to U.S. Provisional Application No. 62/967,097, filed on Jan. 29, 2020, the entire contents of which are hereby incorporated by reference.
FIELDThe present disclosure is generally directed to systems, methods, and devices for image processing.
BACKGROUNDImage processing techniques include techniques for analyzing an input image to reveal characteristics of the input image and/or to produce an output image from the input image.
SUMMARYAt least one example embodiment is directed to a device including at least one processor, and memory including instructions that when executed by the at least one processor, cause the at least one processor to scan an input image including pixels that have either a first state or a second state opposite the first state, initiate a first cluster and a first polygon that belongs to the first cluster upon encountering a first pixel of the input image that has the first state, execute a first set of operations to form the first polygon, generate an indication of one or more characteristics of the input image based on at least the first cluster, and output the indication.
At least one example embodiment is directed to a method that includes scanning an input image including pixels that have either a first state or a second state opposite the first state, initiating a first cluster and a first polygon that belongs to the first cluster upon encountering a first pixel of the input image that has the first state, executing a first set of operations to form the first polygon, generating an indication of one or more characteristics of the input image based on at least the first cluster, and outputting the indication.
At least one example embodiment is directed to a system including a display, at least one processor, and memory including instructions that when executed by the at least one processor, cause the at least one processor to scan an input image including pixels that have either a first state or a second state opposite the first state, initiate a first cluster and a first polygon that belongs to the first cluster upon encountering a first pixel of the input image that has the first state, execute a first set of operations to form the first polygon, generate an indication of one or more characteristics of the input image based on at least the first cluster, output the indication to the display.
Additional features and advantages are described herein and will be apparent from the following description and the figures.
The patent or application file contains at least one drawing executed in color. Copies of this patent or patent application publication with color drawing(s) will be provided by the Office upon request and payment of the necessary fee.
The present disclosure is described in conjunction with the appended figures, which are not necessarily drawn to scale:
The ensuing description provides embodiments only, and is not intended to limit the scope, applicability, or configuration of the claims. Rather, the ensuing description will provide those skilled in the art with an enabling description for implementing the described embodiments. It being understood that various changes may be made in the function and arrangement of elements without departing from the spirit and scope of the appended claims.
It will be appreciated from the following description, and for reasons of computational efficiency, that the components of the system can be arranged at any appropriate location within a distributed network of components without impacting the operation of the system.
Furthermore, it should be appreciated that the various links connecting the elements can be wired, traces, or wireless links, or any appropriate combination thereof, or any other appropriate known or later developed element(s) that is capable of supplying and/or communicating data to and from the connected elements. Transmission media used as links, for example, can be any appropriate carrier for electrical signals, including coaxial cables, copper wire and fiber optics, electrical traces on a PCB, or the like.
As used herein, the phrases “at least one,” “one or more,” “or,” and “and/or” are open-ended expressions that are both conjunctive and disjunctive in operation. For example, each of the expressions “at least one of A, B and C,” “at least one of A, B, or C,” “one or more of A, B, and C,” “one or more of A, B, or C,” “A, B, and/or C,” and “A, B, or C” means A alone, B alone, C alone, A and B together, A and C together, B and C together, or A, B and C together.
The terms “determine,” “calculate,” and “compute,” and variations thereof, as used herein, are used interchangeably and include any appropriate type of methodology, process, operation, or technique.
Various aspects of the present disclosure will be described herein with reference to drawings that may be schematic illustrations of idealized configurations.
Unless otherwise defined, all terms (including technical and scientific terms) used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this disclosure belongs. It will be further understood that terms, such as those defined in commonly used dictionaries, should be interpreted as having a meaning that is consistent with their meaning in the context of the relevant art and this disclosure.
As used herein, the singular forms “a,” “an,” and “the” are intended to include the plural forms as well, unless the context clearly indicates otherwise. It will be further understood that the terms “include,” “including,” “includes,” “comprise,” “comprises,” and/or “comprising,” when used in this specification, specify the presence of stated features, integers, stages, operations, elements, and/or components, but do not preclude the presence or addition of one or more other features, integers, stages, operations, elements, components, and/or groups thereof. The term “and/or” includes any and all combinations of one or more of the associated listed items.
Where reference to general element or set of elements is appropriate instead of a specific element, the description may refer to the element or set of elements by its root term. For example, when reference to a specific element X1, X2, etc. is not necessary, the description may refer to the element(s) in general as “X.”
The communication network 108 may comprises a wired network and/or a wireless network that enables wired and/or wireless communication between devices 104 and 112. Examples of the communication network 108 that may be used to connect the devices 104 and 112 include an Internet Protocol (IP) network, an Ethernet network, an InfiniBand (TB) network, a Fibre Channel network, the Internet, a cellular communication network, a wireless communication network, combinations thereof (e.g., Fibre Channel over Ethernet), variants thereof, and/or the like. The communication network 108 may enable wireless communication between devices 104 and 112 using one or more protocols in the 802.11 suite of protocols, near-field communication (NFC) protocols, Bluetooth protocols, LTE protocols, 5G protocols, and/or the like. The devices 104 and 112 may include one or more communication interfaces to facilitate wired and/or wireless communication over the communication network 108.
Although the devices 104 and 112 are shown as separate devices communicating over the communication network 108, it should be appreciated that the devices 104 and 112 and the communication network 108 may be incorporated into a single device (e.g., a server, a personal computer, and/or the like) so that the source image, the input image that is derived from the source image, and the output image that is based on the input image are generated and/or processed by the same device.
The processing circuitry 116 may comprise suitable software, hardware, or a combination thereof for processing images from source device 104 and carrying out other types of computing tasks. The processing circuitry 116 may carry out the various image processing operations and algorithms described herein. The memory 120 may include executable instructions and the processing circuitry 116 may execute the instructions on the memory 120. Thus, the processing circuitry 116 may include a microprocessor, microcontroller, and/or the like to execute the instructions on the memory 120. The memory 120 may correspond to any suitable type of memory device or collection of memory devices configured to store instructions. Non-limiting examples of suitable memory devices that may be used include Flash memory, Random Access Memory (RAM), Read Only Memory (ROM), variants thereof, combinations thereof, or the like. In some embodiments, the memory 120 and processing circuitry 116 may be integrated into a common device (e.g., a microprocessor may include integrated memory). Additionally or alternatively, the processing circuitry 116 may comprise hardware, such as an application specific integrated circuit (ASIC). Other non-limiting examples of the processing circuitry 116 include an Integrated Circuit (IC) chip, a Central Processing Unit (CPU), a General Processing Unit (GPU), a Field Programmable Gate Array (FPGA), a digital signal processor (DSP), a collection of logic gates or transistors, resistors, capacitors, inductors, diodes, or the like. Some or all of the processing circuitry 116 may be provided on a Printed Circuit Board (PCB) or collection of PCBs. It should be appreciated that any appropriate type of electrical component or collection of electrical components may be suitable for inclusion in the processing circuitry 116. The processing circuitry 116 may send and/or receive signals to and/or from other elements of the system 100 to control various operations for the system 100.
Although not explicitly shown, it should be appreciated that devices 104 and 112 may include other processing devices, storage devices, and/or communication interfaces generally associated with computing tasks, such as sending and receiving data over a wired and/or wireless connection.
The input device 124 includes suitable hardware and/or software that enables input to the system 100 (e.g., user input). The input device 124 may include a keyboard, a mouse, a touch-sensitive pad, touch-sensitive buttons, a touch-sensitive portion of a display, mechanical buttons, switches, and/or other control elements for providing user input to the system 100 to enable user control over certain functions of the system 100.
The output device 128 may include suitable hardware and/or software that produces visual, audio, and/or tactile feedback for a user or other interested party based on one or more inputs from the processing circuitry 116. In at least one example embodiment, the output device 128 includes one or more displays display to display an output image and/or one or more characteristics of an input image after processing of the input image by the device 112. The input image may be based on a source image received from the source device 104 over the communication network 108. The display may include any suitable type of display, such as a liquid crystal display (LCD), a light emitting diode (LED) display, and/or the like. The output device 128 may be a stand-alone device or a device integrated as part of another device, such as a smart phone, a laptop, a tablet, and/or the like.
Although the input device 124 and the output device 128 are illustrated as being part of the image processing device 112, the input device 124 and/or the output device 128 may be embodied separate from the device 112 according to design preferences of the system 100.
Still with reference to
To understand one advantage of inventive concepts, consider treating the clusters in
Inventive concepts, on the other hand, are more decisive. For example, symbol ‘3’ is defined by only one polygon (the outer polygon), symbol ‘9’ is defined by two polygons: outer and inner polygons, and symbol ‘8’ is defined by three polygons: one outer polygon and two inner polygons. Within an algorithm according to inventive concepts, the three symbols are completely different. Furthermore, these polygon properties are generally true regardless of size and font of the symbols. Stated another way, the three symbols are topologically distinct: ‘3’ has no holes, ‘9’ has one hole, and ‘8’ has two holes. Processing images with symbols according to inventive concepts enhances the downstream ability to correctly identify the symbols because it is possible to match general properties of each symbol (e.g., number of polygons) with known properties of other symbols, which uses less memory, saves time, reduces error, and/or increases efficiency.
With reference again to
As discussed in more detail below, each key also includes one or more edges (indicated with arrows) that span one or more sides of one or more pixels in the respective key, and the one or more edges in each key are used to build polygons for the output image and/or polygon profile. The starting point, direction, and ending point of each edge depend on pixel states between adjacent pixels in the Moore neighborhood of the reference pixel RP.
For example, starting at pixel 0 of the pixel grid for each key 001 to 254 and moving in the CCW direction, an edge's tail is initiated at an edge of the pixel grid of a key when a pixel hit is followed by a pixel miss (where pixel hits are shown in
In
As noted above, example embodiments form an input image of any bit depth using known technology to transform the n-bit per pixel image to a 1-bit per pixel input image. For example, a source image is converted to grayscale (if the conversion is needed) and the 1-bit per pixel space is formed by thresholding each pixel value in the grayscale image against a reference pixel value (e.g., by making pixels less than <50% brightness black and pixels >=50% brightness white). Here, it should be appreciated that to the decision process a hit pixel as black and a pixel miss as white is a design choice, and that a pixel hit may be a white pixel and a pixel miss may be a black pixel if desired. In addition, the reference pixel value is a design parameter set based on empirical evidence and/or preference. In at least one example embodiment, the above and below described image processing algorithms (e.g., the methods in
In view of the above, each reference pixel RP has a key that uniquely identifies the state of the pixels surrounding the reference pixel RP. Example embodiments include generating the keys shown in
Each key in
As shown, edge information is computed for all of the keys. The keys are stored as a lookup table (LUT) or in another suitable format. The set of keys represent all adjacency possibilities surrounding a reference pixel RP. Equivalently, no adjacency configuration outside this set of keys is possible. Notably, all pixel information is preserved, meaning that the image processing methods does not round or truncate pixels of an input image. In addition, every edge (or vector from edge in to edge out) is net counterclockwise relative to the center oriented as illustrated by the arrows. All dots other than the dot of the reference pixel RP represent the outgoing link points for a particular edge or arrow. Key 255 represents a solid area of pixels with no edges, and key 000 represents a single pixel with no surrounding pixels. As may be appreciated, every key, except for keys 000 and 255, has at least one non-trivial edge. Each non-trivial edge has two points. When one projects any key sequence [1 . . . 254] to a directed graph (where each key is a node and each edge is a graph edge), then every node has equal out and in degrees. Therefore, by Euler's Theorem, a traversal along any edge will result in a closed polygon. This allows image processing methods to produce closed polygons.
As may be further appreciated, keys 85 and 170 represent maximal connectors (i.e., elements with the most edges, or the most arrows) of 4. That is, the number of edges per key ranges from 0 to 4. Each edge is ordered counterclockwise from the upper left corner, every edge, except in key 255, has at least three points, and every edge, except in keys 0 and 255, connects to every other edge. The description below makes reference to solid points, where a solid point is a point or pixel in a key that is not adjacent to an edge. For example, key 223 has five solid points (coordinate points or pixels 7,0,1,2,3) and key 216 has zero solid points.
In example embodiments, pixel link ambiguities are resolved by the edge point sequence. For example, referring to the coordinate points of the pixel grid in key 005, both edges share points (1, 0) and (0, 0) where the points are referred to in (column, row) format. Also, the two edges share link points: (1, −1), (1, −1). Despite the point equivalence, the sequence of the red and blue edges distinguishes the “sense” of the point and thereby disambiguates the shared reference. This is a unique feature of image processing methods according to example embodiments that affords improved deciding power over algorithms that treat pixels as isolated entities.
Edges can be constructed counterclockwise (as is the convention in
Each key in
Alternate natural key designations may be formed by permuting the pixel grid in
As discussed in more detail below, a 1-bit per pixel input image is processed by referencing the keys in
The method 500 begins at operation 504 and ends at operation 556. The method 500 (and/or one or more stages thereof) may be carried out or otherwise performed, for example, by at least one processor. The at least one processor may be the same as or similar to the processing circuitry 116 of the device 112 described above. A processor other than any processor described herein may also be used to execute the method 500. The at least one processor may perform the method 500 by executing instructions stored in a memory such as the memory 120. The instructions may correspond to one or more stages of the method 500 described below. The instructions may cause the processor to execute one or more algorithms, such as an image processing algorithm as described in more detail below.
In general, an image processing method according to inventive concepts begins by scanning for the start of an edge, creating a cluster (e.g., a cluster of one or more polygons) upon encountering a pixel hit, and adding edges to the polygon until a complete polygon is formed (i.e., until the polygon closes). A cluster may be comprised of one or more polygons that are interrelated, for example, as an outer polygon and one or more inner polygons. As discussed in more detail below each polygon may fully define a cluster or combine with one or more other polygons to fully define a cluster. During processing, the method may store information regarding the locations of unconsumed or unprocessed edges to an “edge-stack” in a memory (e.g., memory 120). If any edge in the edge-stack is not consumed by prior polygon, the method initiates a new polygon and adds edges until the polygon closes. This process may be repeated for all edges in the edge-stack. In addition, if the method encounters any solid points during the analysis, the method stores the solid points (e.g., in memory 120) and processes the solid points to see if any solid points are adjacent to a new or not yet identified edge. If so, the method creates a new polygon with the solid point adjacent to a new edge and adds edges until the polygon closes. If all edges in the edge stack are consumed, the method commits the polygon and scans for a new cluster. Upon encountering a new cluster, the above stages are repeated to form another polygon(s) that defines the new cluster. This process is iterated until the input image is fully processed. These operations are described in more detail below with reference to
Operation 508 includes scanning a 1-bit per pixel input image. For example, operation 508 performs a raster scan of the input image that begins at a first row of pixels in a top left of the input image, proceeds across the first row of pixels of the input image to a top right of the input image, moves to a second row at the left of the input image to scan the second row moving left right, and so on before ending at the bottom right of the input image. However, example embodiments are not limited thereto, and other scanning directions are possible. For example, operation 508 may perform a raster style scan of the input image in any of eight scan directions: in a horizontal direction with any combination of left to right, right to left, top to bottom or bottom to top (four scan directions); or in a vertical direction with any combination of left to right, right to left, top to bottom or bottom to top (another four scan directions).
Operation 512 determines whether all points in the input image have been processed. The points may refer to corners of pixels in the input image (see the pixel grid in
Operation 514 includes encountering a point in the input image with a pixel hit. For example, the 1-bit per pixel input image is scanned until encountering a point of a pixel that has a state that was set to be the state that indicates a pixel hit.
In operation 516, the method 500 determines whether the point with the pixel hit belongs to a known cluster, for example, an existing cluster in the input image already constructed or being constructed by iterating through the below described operations of
Operation 520 includes initiating a new cluster, a new polygon that will belong to the new cluster, a new edge stack, and a new solid stack. As discussed above and in more detail below, the edge stack is a collection of edges stored for the method 500 and the solid point stack (or solid stack) is a collection of solid points stored for the method 500.
Operation 524 includes obtaining edge information for the point identified in operations 512 and 516. For example, operation 524 includes examining the Moore neighborhood of a reference pixel RP (e.g., a pixel hit) including the point to compute and retrieve a key from
Operation 528 includes appending a new edge in the direction indicated by the edge of the key (indicated by the head of the arrow) and determining a next point in the polygon (all keys have edges except for key 255). Any unused or unconsumed edges of a key are stored to the edge stack. Operation 528 is discussed in more detail below with reference to
Operation 532 includes determining whether the polygon loop has closed for the polygon initiated in operation 520. If not, the method 500 proceeds back to operation 524. If so, the method proceeds to operation 536.
Operation 536 includes determining whether there are any unused edges in the edge stack. If so, the method 500 proceeds to operation 540. If not, the method 500 proceeds to operation 548.
Operation 540 includes committing the current polygon, which may include storing the current polygon for inclusion in the output image and/or the polygon profile once all polygons in the input image are constructed.
If operation 536 determines that there were unused edges in the edge stack, the unused edge or unused edges may indicate the existence of another polygon in proximity to the current polygon. Thus, operation 544 includes initiating a new polygon using an unused edge from the edge stack. Starting a new polygon with an unused edge from the edge stack may include retrieving a key for a pixel at the tail of the unused edge. The method 500 then returns to operation 524 to begin building the new polygon by iterating through operations 524, 528, 532, and 536. If there were no edges in the edge stack, the method 500 skips operation 536.
Operation 548 includes determining whether a solid point in the solid point stack formed in operation 524 yields a new edge. If so, the method 500 proceeds to operations 540 and 544 to commit the current polygon and begin a new polygon with the new edge by retrieving a key for a pixel at the tail of the new edge. If not, the method 500 proceeds to operation 552 to commit any polygons formed by iterating through operations 524 to 548 which forms a complete cluster defined by the polygon(s) formed by iterating through operations 524 to 548. The method 500 then returns to operation 508 to continue scanning the input image. If there are not solid points, the method 500 skips operation 548 and proceeds directly to operation 552.
The method 600 (and/or one or more stages thereof) may be carried out or otherwise performed, for example, by at least one processor. The at least one processor may be the same as or similar to the processing circuitry 116 of the device 112 described above. A processor other than any processor described herein may also be used to execute the method 600. The at least one processor may perform the method 600 by executing instructions stored in a memory such as the memory 120. The instructions may correspond to one or more stages of the method 600 described below. The instructions may cause the processor to execute one or more algorithms, such as an image processing algorithm as described in more detail below.
As noted above, operation 524 includes retrieving a key from
Here, it should be appreciated that the operations of
Operation 608 includes determining whether the retrieved key includes an edge that is a self-loop. If so, the method 600 proceeds to operation 612. If not, the method 600 proceeds to operation 616. The edge being a self-loop is only true for key 000 in
Operation 612 includes setting polygon points to edge information points for key 000, which closes the polygon loop (completes the polygon) in operation 648. In other words, operations 608 and 612 determine that there are no pixel hits in the Moore neighborhood of a reference pixel RP, which results in a polygon formed of a single pixel (i.e., the reference pixel RP). Stated another way, operation 612 determines the polygon to be closed with a shape corresponding to key 000. If, on the other hand, operation 608 detects one or more pixel hits in the Moore neighborhood of the reference pixel RP, the method 600 proceeds to operation 616.
Operation 616 includes selecting an edge (e.g., a portion of an edge) of the key retrieved in operation 524 that overlaps part of an edge of the partially constructed polygon. If the method arrives at operation 616 immediately after encountering a first pixel hit of a polygon and the key has more than one edge, then the method 600 may select the first edge of the key that is encountered upon examining the Moore neighborhood of the reference pixel staring at pixel 0 of the pixel grid and moving CCW to pixel 7.
Operation 620 includes determining whether there are remaining edges for the key that were not selected in operation 616. If so, the method 600 proceeds to operation 624 and adds any unused or unselected edges to the edge stack. If not, the method proceeds to operation 628.
In some cases, operations 616 and 620 are skipped, for example, when a key has only one edge. Then, it is not necessary to select an edge or determine whether there are additional edges to store to the edge stack.
Operation 628 includes adding a non-overlapping part of a new edge to the partially constructed polygon by skipping three overlap points and adding any remaining points to the polygon. Three overlap points are skipped at least in part because each edge of a key has at least three points.
Operation 632 includes marking the point(s) skipped and added as used or consumed.
Operation 636 includes determining whether the next point in the currently constructed polygon is the point that started the polygon initiated in operation 520. If not, the method 600 proceeds to operation 640. If so, the method 600 proceeds to operation 536 because the determination of whether polygon loop is closed in operation 532 of
Operation 640 includes setting a pixel that includes a last point in the edge of the current key as the reference pixel RP. Operation 640 results in moving the initial reference pixel RP to a next pixel in the Moore neighborhood of the initial reference pixel that has a pixel hit. Thereafter, the method 600 proceeds back to operation 524 in
Here, it should be appreciated that the operations of
As noted above,
Here, it should be appreciated that stage 1 of
As evidenced by stage 1 of
With the Moore neighborhood of pixel P1 now being processed and the edge of the polygon in stage 2 ending at pixel P2, the method proceeds by setting pixel P2 as the reference pixel in stage 2 and examining the Moore neighborhood around pixel P2 to yield key 136 because pixels P1 and P3 are pixel hits in the Moore neighborhood of the current reference pixel P2. As shown, key 136 includes two edges (arrows) as a top edge and a bottom edge.
Stage 2 includes selecting the bottom edge of key 136 because that edge overlaps the edge of the partial polygon in stage 2 and skipping three points of the bottom edge of key 136. The bottom edge of key 136 is selected because this edge overlaps the edge in the partially constructed polygon of stage 2 (operation 616). Skipping three points on the bottom edge of key 136 leaves a single point at pixel P3 that is added to the polygon in stage 3 to extend the edge in the polygon by one point (operation 628). The method then marks all of the points on the bottom edge of key 136 as being used or consumed by the polygon in stage 3 (operation 632). Because key 136 still includes a top edge that was not used or consumed in the transition between stage 2 and stage 3, the top edge of key 136 is saved to the edge stack (the determination in operation 620 is ‘yes’ and the edge is saved to the edge stack in operation 624). In addition, the transition between stages 2 and 3 sets pixel P3 as the reference pixel (operation 640). At this stage, the method determines that the next point in the polygon (the bottom point of pixel P3) is not the first point from the polygon in stage 2 (the bottom left point of pixel P1), and so the method continues to process the polygon (the determination in operation 636 is ‘no’ and the method sets pixel P3 as the reference pixel in operation 640 before returning to operation 524 to retrieve an appropriate key for pixel P3 being set as the reference pixel).
At stage 3, the method includes examining the Moore neighborhood of the reference pixel P3 for pixel hits. As shown in the input image, the only pixel hit in the Moore neighborhood of pixel P3 is pixel P2, which corresponds to key 008. Because key 008 only has one edge, operation 616 is not applicable (i.e., skipped) and the determination in operation 620 is ‘no.’ As in stage 2, the first three points of the edge in key 008 are skipped starting from the tail of the edge, leaving the top three points of key 008 to add to the polygon shown in stage 4 (operation 628). The three points that are skipped and the three points that are added to the polygon are marked as consumed (operation 632). In general, all skipped points in a key and all points added to the final polygon are marked as consumed.
Because the three points added to the polygon in stage 3 causes the polygon's edge to end at pixel P2 in stage 4, pixel P2 is set as the reference pixel in stage 4 (operation 640) and the method returns to operation 524 to retrieve a key of the reference pixel P2. Examining the Moore neighborhood of pixel P2 results in pixel hits at pixels P1 and P3, which corresponds to key 136. However, because the bottom edge of key 136 was marked as consumed in stage 2, only the top edge of key 136 is considered (operation 616 is skipped and the determination in operation 620 is ‘no’). As shown, the first three points of the top edge of key 136 are skipped, which leaves a single point that is added to the polygon in stage 5 (operation 628). This single point is marked as consumed (operation 632). The point at which the edge ends in the polygon of stage 5 is not the first point from stage 2, so the determination in operation 636 is ‘no.’ Now that the edge of the polygon ends at pixel P1, pixel P1 is again set as the reference pixel (operation 640) and the method returns to operation 524 to retrieve the appropriate key.
As shown in stage 5, examining the Moore neighborhood of pixel P1 in operation 524 returns key 128 because pixel P2 is the only pixel hit. Key 128 includes only one edge and so operation 616 is skipped and the determination in operation 620 is ‘no.’ As shown in stage 5, the first three points of key 128 are skipped, leaving one point to add to the polygon in stage 5 (operation 628). This single point is marked as consumed (operation 632). In addition, this single point is the same point at which the polygon started in stage 2. Thus, the determination in operation 636 is ‘yes’ and the polygon is set to closed for inclusion in an output image and/or the polygon profile before proceeding back to operation 536.
Now with reference to
In addition, as discussed above, operation 548 determines whether there are any solid points stored to the solid stack. In this case, after all edges have been exhausted from the edge stack, the method 500 iterates through the solid points in the solid stack searching for an edge that does not belong to an already constructed polygon (a new edge). If such a solid point exists, the method 500 proceeds to operations 540 and 544 to initiate a new polygon.
The above-described operations of
As shown in
In the example of
The graph in
For grayscale or color images, the image processing algorithm may use any suitable continuum of hit/miss criteria (e.g., 40%, 50%, 60%, 70% 80% or any other distribution.) Also, for all the hit/miss criteria, the algorithm can be run in parallel as each run would be independent. The resulting polygons for each bit depth may be superimposed to create a consensus polygon contour.
In addition, clockwise conventions and counterclockwise conventions are equivalent. Furthermore, any encoding permutation for the keys of
In view of the above, it should be appreciated that an image processing algorithm according to example embodiments runs over any 2D image surface and identifies all clusters and polygons. In scanning all pixels in a 2D image, the algorithm is bound to run in a maximum of O(n2). If, however, the user selects a boundary of a cluster, the algorithm may be adapted to trace only that polygon outline. In this mode, the algorithm may run in O(n) time.
Image processing algorithms according to example embodiments may further provide the ability process images other than 2D images. For example, in a hypercube variation, the algorithm for a 2-Cube case (Cartesian plane), scales to n-Cubes. For an n-Cube, the adjacent n-Cubes are 3n−1:
-
- 1) Each dimension allows choices (−1,0,1) unit travel, by multiplication rule=>3n
- 2) (0,0,0) is the center from which no travel occurs=>−1
In the case of a 3-Cube, there are 33−1=26 neighbors. Each neighbor can be a pixel hit or pixel miss. Therefore, the total number of edgeInfo blocks is 23
The same overview algorithm applies to n-Cubes with the following definitions:
-
- Edge=(n−1)flat
- Polygon=n-Flat
- Solid=n-Flat
In general, the algorithm may scan for the start of an edge, initiating a new cluster and a new polygon for the new cluster, and add edges until polygon closes. This may include adding unconsumed edges on an edge stack. If any edge on an edge stack was not consumed by prior polygon, create a new polygon with the unconsumed edge and add edges until the polygon closes. This may be repeated for all edges on the edge stack. If there were any solid points, process all of those to see if any are adjacent to a new edge. If so, create a new polygon with the new edge and add edges until the new polygon closes. If all edges consumed, commit all polygons as a cluster, scan for a new cluster, and repeat.
For example:
-
- 2D: Edge=line (1-Flat), Polygon=plane (2-Flat), Solid=plane (2-Flat)
- 3D: Edge=plane(2-Flat), Polygon=3D solid (3-Flat), Solid=3D solid (3-Flat)
- 4D: Edge=3D solid (3-Flat), Polygon=4-Flat, Solid=4-Flat
- And so on.
In a 3D image, for the 26 cubes surrounding the center of a 3-cube, choose a cell address encoding that spirals CCW upward (right-handed system) such as shown in the pixel grid of
Combining the top “notch” of both keys forms a new volume boundary shown as the rectangular notch on the top of the “Linked result”. Every 3D Key (other than the first and last keys) has equal in and out degree as defined by the edge surface. Using the same linking mechanism for processing 2D images (see
The method 700 (and/or one or more stages thereof) may be carried out or otherwise performed, for example, by at least one processor. The at least one processor may be the same as or similar to the processing circuitry 116 of the device 112 described above. A processor other than any processor described herein may also be used to execute the method 700. The at least one processor may perform the method 700 by executing instructions stored in a memory such as the memory 120. The instructions may correspond to one or more stages of the method 700 described below. The instructions may cause the processor to execute one or more algorithms, such as an image processing algorithm as described in more detail below.
Operation 704 includes generating a plurality of keys shown, where a number of the plurality of keys is based on a number of pixels in the Moore neighborhood of a pixel in an input image to be processed. For example, operation 704 generates the plurality of keys shown in
Operation 708 includes generating the input image from a source image by converting each pixel of the source image to have the first state or the second state based on pixel values of each pixel of the source image. As discussed above with reference to
Here, it should be appreciated that operations 704 and 708 may be optional operations. In at least one example embodiment, the image processing device 112 receives the input image that has already undergone operations 704 and 708 (e.g., these operations are performed by the source device 104 or by some other device not illustrated in the system 100).
Operation 712 includes scanning the input image including pixels that have either the first state or the second state opposite the first state. For example, operation 712 scans the input image in any one of the eight ways mentioned with reference to operation 508.
Operation 716 includes initiating a first cluster and a first polygon upon encountering a first pixel of the input image that has the first state. As discussed in more detail below, the first polygon may partially define or completely define the first cluster.
Operation 720 includes executing a first set of operations to form the first polygon. For example, operation 720 includes iterating through the operations described with reference to
Operation 724 includes generating an indication of one or more characteristics of the input image. The one or more characteristics of the input image may include information about the input image, such as some or all of the information that helps define a complete polygon profile of the input image (see,
Operation 728 includes outputting the indication generated in operation 724, which may include outputting the indication (e.g., the polygon profile of the input image and/or the output image) to a display or user interface of the output device 128, to a memory (e.g., memory 120 or other local or remote memory) that stores the indication in a format that is capable of display, and/or to another suitable destination. The indication may be audio and/or visual in nature.
The method 800 (and/or one or more stages thereof) may be carried out or otherwise performed, for example, by at least one processor. The at least one processor may be the same as or similar to the processing circuitry 116 of the device 112 described above. A processor other than any processor described herein may also be used to execute the method 800. The at least one processor may perform the method 800 by executing instructions stored in a memory such as the memory 120. The instructions may correspond to one or more stages of the method 800 described below. The instructions may cause the processor to execute one or more algorithms, such as an image processing algorithm as described in more detail below.
Operation 804 includes determining whether at least one key used to form the first polygon includes an unused edge or contains an unused solid point (see, e.g., operations 536 and 548 in
If the determination in operation 804 is ‘no,’ this may be an indication that the first polygon completely defines the first cluster of the input image. For example, as discussed above with reference to
Operation 808 includes continuing to scan, for example, in response to a ‘no’ determination in operation 804, the input image. For example, the scan continues in the same fashion as that selected in operation 712.
Operation 812 includes initiating a second cluster and a second polygon that belongs to the second cluster upon encountering a second pixel of the input image that is in the first state. That is, the determination in operation 512 of
Operation 816 includes iteratively executing the first set of operations to form the second polygon that partially defines or completely defines the second cluster of the input image. For example, operation 816 includes iterating through the operations of
As noted above, operations 808 to 816 relate to forming two separate polygons, where the first polygon defines a complete cluster and the second polygon partially defines or completely defines a second cluster. However, in some cases, the first polygon and the second polygon may combine to completely define the first cluster (see e.g., the outer polygon and inner polygon 1 of the face in
If the determination in operation 804 is ‘yes,’ this may be an indication that the first polygon partially defines the first cluster of the input image. In other words, the first polygon formed by the method 700 may define an outer boundary of a cluster but not the inner boundary of the cluster (see, e.g., the outer polygon in
Operation 828 includes initiating a second polygon that belongs to the first cluster based on the unused edge or the unused solid point. Operation 828 may correspond to operation 544 in
Operation 832 includes iteratively executing the first set of operations to form the second polygon. For example, operation 816 includes iterating through the operations of
The method 900 (and/or one or more stages thereof) may be carried out or otherwise performed, for example, by at least one processor. The at least one processor may be the same as or similar to the processing circuitry 116 of the device 112 described above. A processor other than any processor described herein may also be used to execute the method 900. The at least one processor may perform the method 900 by executing instructions stored in a memory such as the memory 120. The instructions may correspond to one or more stages of the method 900 described below. The instructions may cause the processor to execute one or more algorithms, such as an image processing algorithm as described in more detail below.
Operation 904 includes determining that a Moore neighborhood of the first pixel includes at least one other pixel having the first state. For example, operation 904 scans a Moore neighborhood of the first pixel in accordance with operations described above with reference to
Operation 908 includes retrieving a key from a plurality of keys that corresponds to a shape formed by the first pixel and the at least one other pixel (see also, operation 524 in
Operation 912 includes using the key and one or more other keys in the plurality of keys to form the first polygon. For example, operation 912 may include iterating through operations in
Although not explicitly shown, it should be appreciated that example embodiments may iterate through the methods 800 and 900 for the entire input image to produce the indication discussed with reference to operations 724 and 728. In addition, some or all of the operations in method 700, 800, and 900 may be performed automatically (i.e., with little or no user intervention).
In view of the above, it should be appreciated that inventive concepts relate to image processing techniques that provide fast and accurate output images and may produce an accurate complete polygon profile (see
Specific details were given in the description to provide a thorough understanding of the embodiments. However, it will be understood by one of ordinary skill in the art that the embodiments may be practiced without these specific details. In other instances, well-known circuits, processes, algorithms, structures, and techniques may be shown without unnecessary detail in order to avoid obscuring the embodiments.
While illustrative embodiments of the disclosure have been described in detail herein, it is to be understood that the inventive concepts may be otherwise variously embodied and employed, and that the appended claims are intended to be construed to include such variations, except as limited by the prior art.
For purposes of explanation, numerous details are set forth in order to provide a thorough understanding of the present embodiments. It should be appreciated however that the techniques herein may be practiced in a variety of ways be yond the specific details set forth herein.
Furthermore, while the exemplary embodiments illustrated herein may show the various components of the system collocated, it is to be appreciated that the various components of the system can be located at distant portions of a distributed network, such as a communications network and/or the Internet, or within a dedicated secure, unsecured and/or encrypted system. Thus, it should be appreciated that the components of the system can be combined into one or more devices, or collocated on a particular node/element(s) of a distributed network, such as a communications network. As will be appreciated from the description, and for reasons of computational efficiency, the components of the system can be arranged at any location within a distributed network without affecting the operation of the system.
Furthermore, it should be appreciated that the various links, including communications channel(s), connecting the elements (which may not be shown) can be wired or wireless links, or any combination thereof, or any other known or later developed element(s) that is/are capable of supplying and/or communicating data and/or signals to and from the connected elements. The term module as used herein can refer to any known or later developed hardware, software, firmware, or combination thereof that is capable of performing the functionality associated with that element. The terms determine, calculate and compute, and variations thereof, as used herein are used interchangeably and include any type of methodology, process, mathematical operation or technique.
While the above-described flowcharts/operational flows have been discussed in relation to a particular exemplary sequence of events, it should be appreciated that changes to this sequence can occur without materially effecting the operation of the embodiment(s). Additionally, the exact sequence of events need not occur as set forth in the exemplary embodiments, but rather the steps can be performed by one or the other device(s) in the system. Additionally, the exemplary techniques illustrated herein are not limited to the specifically illustrated embodiments but can also be utilized with the other exemplary embodiments and each described feature is individually and separately claimable.
As will be appreciated by one skilled in the art, aspects of the present disclosure may be embodied as a system, method, and/or computer program product. Thus, aspects of the present disclosure may be embodied entirely in hardware, entirely in software (including, but not limited to, firmware, program code, resident software, microcode), or in a combination of hardware and software. All such embodiments may generally be referred to herein as a circuit, a module, or a system. In addition, aspects of the present invention may be in the form of a computer program product embodied in one or more computer readable media having computer readable program code embodied thereon.
A computer readable medium as described herein may be a computer readable storage medium, examples of which include, but are not limited to, an electronic, magnetic, optical, electromagnetic, infrared, or semiconductor system, apparatus, or device, or any suitable combination thereof. As used herein, a computer readable storage medium may be any non-transitory, tangible medium that can contain or store a program for use by or in connection with an instruction execution system, apparatus, device, computer, computing system, computer system, or any programmable machine or device that inputs, processes, and outputs instructions, commands, or data. A non-exhaustive list of specific examples of a computer readable storage medium include an electrical connection having one or more wires, a portable computer diskette, a floppy disk, a hard disk, a random access memory (RAM), a read-only memory (ROM), a USB flash drive, an non-volatile RAM (NVRAM or NOVRAM), an erasable programmable read-only memory (EPROM or Flash memory), a flash memory card, an electrically erasable programmable read-only memory (EEPROM), an optical fiber, a portable compact disc read-only memory (CD-ROM), a DVD-ROM, an optical storage device, a magnetic storage device, or any suitable combination thereof. A computer readable storage medium can be any computer readable medium that is not a computer readable signal medium such as a propagated data signal with computer readable program code embodied therein.
Program code may be embodied as computer-readable instructions stored on or in a computer readable storage medium as, for example, source code, object code, interpretive code, executable code, or combinations thereof. Any standard or proprietary, programming or interpretive language can be used to produce the computer-executable instructions. Examples of such languages include C, C++, C #, Pascal, JAVA, JAVA Script, BASIC, Smalltalk, Visual Basic, and Visual C++.
Transmission of program code embodied on a computer readable medium can occur using any appropriate medium including, but not limited to, wireless, wired, optical fiber cable, radio frequency (RF), or any suitable combination thereof.
The program code may execute entirely on a user's/operator's/administrator's computer, partly on such a computer, as a stand-alone software package, partly on the user's/operator's/administrator's computer and partly on a remote computer, or entirely on a remote computer or server. Any such remote computer may be connected to the user's/operator's/administrator's computer through any type of network, including a local area network (LAN) or a wide area network (WAN), or the connection may be made to an external computer (for example, through the Internet using an Internet Service Provider).
Additionally, the systems, methods and protocols described herein can be implemented to improve one or more of a special purpose computer, a programmed microprocessor or microcontroller and peripheral integrated circuit element(s), an ASIC or other integrated circuit, a digital signal processor, a hard-wired electronic or logic circuit such as discrete element circuit, a programmable logic device such as PLD, PLA, FPGA, PAL, a smartphone, any comparable means, or the like. In general, any device capable of implementing a state machine that is in turn capable of implementing the methodology illustrated herein can benefit from the various communication methods, protocols and techniques according to the disclosure provided herein.
Examples of the processors as described herein include, but are not limited to, at least one of Qualcomm® Snapdragon® 800 and 801, Qualcomm® Snapdragon® 610 and 615 with 4G LTE Integration and 64-bit computing, Apple® A7, A8, ABX, A9, A9X, or A10 processors with 64-bit architecture, Apple® M7, M8, M9, or M10 motion coprocessors, Samsung® Exynos® series, the Intel® Core™ family of processors, the Intel® Xeon® family of processors, the Intel® Atom™ family of processors, the Intel Itanium® family of processors, Intel® Core® i5-4670K and i7-4770K 22 nm Haswell, Intel® Core® i5-3570K 22 nm Ivy Bridge, the AMD® FX™ family of processors, AMD® FX-4300, FX-6300, and FX-8350 32 nm Vishera, AMD® Kaveri processors, Texas Instruments® Jacinto C6000™ automotive infotainment processors, Texas Instruments® OMAP™ automotive-grade mobile processors, ARM® CortexTMM processors, ARM® Cortex-A and ARIV1926EJS™ processors, Broadcom® AirForce BCM4704/BCM4703 wireless networking processors, the AR7100 Wireless Network Processing Unit, other industry-equivalent processors, and may perform computational functions using any known or future-developed standard, instruction set, libraries, and/or architecture.
Furthermore, the disclosed methods may be readily implemented in software using object or object-oriented software development environments that provide portable source code that can be used on a variety of computer, workstation or mobile device platforms, e.g., smartphones or mobile phones or vehicles. Alternatively, the disclosed system may be implemented partially in hardware using standard logic circuits or a VLSI design. Whether software or hardware is used to implement the systems in accordance with this invention is dependent on the speed and/or efficiency requirements of the system, the particular function, and the particular software or hardware systems or microprocessor or microcomputer systems being utilized. The methods illustrated herein however can be readily implemented in hardware and/or software using any known or later developed systems or structures, devices and/or software by those of ordinary skill in the applicable art from the functional description provided herein and with a general basic knowledge of the computer and image processing arts.
Moreover, the disclosed methods may be readily implemented in software executed on programmed general-purpose computer, a special purpose computer, mobile device, smartphone, a microprocessor, or the like. In these instances, the systems and methods of this invention can be implemented as program embedded on personal computer such as JAVA® or CGI script, as a resource residing on a server or graphics workstation, as a routine embedded in a dedicated image processing system, as a plug-in, or the like. The system can also be implemented by physically incorporating the system and method into a software and/or hardware system, such as the hardware and software systems of an image processor.
While this technology has been described in conjunction with a number of embodiments, it is evident that many alternatives, modifications and variations would be or are apparent to those of ordinary skill in the applicable arts. Accordingly, it is intended to embrace all such alternatives, modifications, equivalents, and variations that are within the spirit and scope of this disclosure.
It should be appreciated that inventive concepts cover any embodiment in combination with any one or more other embodiment, any one or more of the features disclosed herein, any one or more of the features as substantially disclosed herein, any one or more of the features as substantially disclosed herein in combination with any one or more other features as substantially disclosed herein, any one of the aspects/features/embodiments in combination with any one or more other aspects/features/embodiments, use of any one or more of the embodiments or features as disclosed herein. It is to be appreciated that any feature described herein can be claimed in combination with any other feature(s) as described herein, regardless of whether the features come from the same described embodiment.
Example embodiments may be configured according to the following:
-
- (1) A device, comprising:
- at least one processor; and
- memory including instructions that when executed by the at least one processor, cause the at least one processor to:
- scan an input image including pixels that have either a first state or a second state opposite the first state;
- initiate a first cluster and a first polygon that belongs to the first cluster upon encountering a first pixel of the input image that has the first state;
- execute a first set of operations to form the first polygon;
- generate an indication of one or more characteristics of the input image based on at least the first cluster; and
- output the indication.
- (2) The device of (1), wherein the at least one processor iteratively executes the first set of operations to form the first polygon.
- (3) The device of one or more of (1) to (2), wherein the instructions include instructions that cause the at least one processor to:
- determine that at least one key used to form the first polygon does not include an unused edge or contain an unused solid point;
- continue scanning the input image; and
- initiate a second cluster and a second polygon that belongs to the second cluster upon encountering a second pixel of the input image that is in the first state.
- (4) The device of one or more of (1) to (3), wherein the instructions include instructions that cause the at least one processor to:
- iteratively execute the first set of operations to form the second polygon that completely defines or partially defines the second cluster of the input image; and
- generate the indication based on the first cluster and the second cluster.
- (5) The device of one or more of (1) to (4), wherein the instructions include instructions that cause the at least one processor to:
- determine that at least one key used to form the first polygon includes an unused edge or contains an unused solid point;
- initiate a second cluster and a second polygon that belongs to the first cluster based on the unused edge or the unused solid point; and
- iteratively execute the first set of operations to form the second polygon, wherein the first polygon and the second polygon combine to completely define the first cluster.
- (6) The device of one or more of (1) to (5), wherein the instructions include instructions that cause the at least one processor to:
- generate the input image from a source image by converting each pixel of the source image to have the first state or the second state based on pixel values of each pixel of the source image.
- (7) The device of one or more of (1) to (6), wherein the first state corresponds to one of black coloring or white coloring, and wherein the second state corresponds to the other of black coloring or white coloring.
- (8) The device of one or more of (1) to (7), wherein the first set of operations includes:
- determining that a Moore neighborhood of the first pixel includes at least one other pixel having the first state;
- retrieving a key from a plurality of keys based on a shape formed by the first pixel and the at least one other pixel; and
- using the key and one or more other keys in the plurality of keys to form the first polygon.
- (9) The device of one or more of (1) to (8), wherein the instructions include instructions that cause the at least one processor to generate the plurality of keys, a number of the plurality of keys being based on a number of pixels in the Moore neighborhood of the first pixel.
- (10) The device of one or more of (1) to (9), wherein the number of the plurality of keys is at least 256.
- (11) A method, comprising:
- scanning an input image including pixels that have either a first state or a second state opposite the first state;
- initiating a first cluster and a first polygon that belongs to the first cluster upon encountering a first pixel of the input image that has the first state;
- executing a first set of operations to form the first polygon;
- generating an indication of one or more characteristics of the input image based on at least the first cluster; and
- outputting the indication.
- (12) The method of (11), wherein executing the first set of operations iteratively executes the first set of operations to form the first polygon.
- (13) The method of one or more of (11) to (12), further comprising:
- determining that at least one key used to form the first polygon does not include an unused edge or contain an unused solid point;
- continuing to scan the input image;
- initiating a second cluster and a second polygon that belongs to the second cluster upon encountering a second pixel of the input image that is in the first state;
- iteratively executing the first set of operations to form the second polygon that completely defines or partially defines the second cluster; and
- generating the indication based on the first cluster and the second cluster.
- (14) The method of one or more of (11) to (13), further comprising:
- determining that at least one key used to form the first polygon includes an unused edge or contains an unused solid point;
- initiating a second polygon that belongs to the first cluster based on the unused edge or the unused solid point; and
- iteratively executing the first set of operations to form the second polygon.
- (15) The method of one or more of (11) to (14), wherein the first polygon and the second polygon combine to fully define the first cluster.
- (16) The method of one or more of (11) to (15), further comprising:
- generating the input image from a source image by converting each pixel of the source image to have the first state or the second state based on pixel values of each pixel of the source image.
- (17) The method of one or more of (11) to (16), wherein the first state corresponds to one of black coloring or white coloring, and wherein the second state corresponds to the other of black coloring or white coloring.
- (18) The method of one or more of (11) to (17), wherein the first set of operations includes:
- determining that a Moore neighborhood of the first pixel includes at least one other pixel having the first state;
- retrieving a key from a plurality of keys based on a shape formed by the first pixel and the at least one other pixel; and
- using the key and one or more other keys in the plurality of keys to form the first polygon that includes the first pixel and the at least one other pixel.
- (19) The method of one or more of (11) to (18), further comprising:
- generating the plurality of keys, a number of the plurality of keys being based on a number of pixels in the Moore neighborhood of the first pixel.
- (20) A system, comprising:
- a display;
- at least one processor; and
- memory including instructions that when executed by the at least one processor, cause the at least one processor to:
- scan an input image including pixels that have either a first state or a second state opposite the first state;
- initiate a first cluster and a first polygon that belongs to the first cluster upon encountering a first pixel of the input image that has the first state;
- execute a first set of operations to form the first polygon;
- generate an indication of one or more characteristics of the input image based on at least the first cluster; and
- output the indication to the display.
- (1) A device, comprising:
Claims
1. A device, comprising:
- at least one processor; and
- memory including instructions that when executed by the at least one processor, cause the at least one processor to: scan an input image including pixels that have either a first state or a second state opposite the first state; initiate a first cluster and a first polygon that belongs to the first cluster upon encountering a first pixel of the input image that has the first state; execute a first set of operations to form the first polygon; generate an indication of one or more characteristics of the input image based on at least the first cluster; and output the indication.
2-20. (canceled)
Type: Application
Filed: Jun 1, 2023
Publication Date: Sep 28, 2023
Inventor: Christopher J. BRUCE (Greenwood Village, CO)
Application Number: 18/204,722