Mounting substrate for semiconductors

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Description

FIG. 1 is a top perspective view of a mounting substrate for semi-conductors showing our new design;

FIG. 2 is a bottom perspective view thereof;

FIG. 3 is a right side elevational view thereof;

FIG. 4 is a left side elevational view thereof;

FIG. 5 is a rear elevational view thereof; and

FIG. 6 is a front elevational view thereof.

Referenced Cited
U.S. Patent Documents
4288441 September 8, 1981 Gogal
4338621 July 6, 1982 Braun
4437141 March 13, 1984 Prokop
4458291 July 3, 1984 Yanagisawa et al.
4513355 April 23, 1985 Shroeder et al.
4677526 June 30, 1987 Muehling et al.
4698663 October 6, 1987 Sugimoto et al.
Foreign Patent Documents
0232837 August 1987 EPX
0048945 March 1983 JPX
644662 November 1984 JPX
647072 December 1984 JPX
647074 December 1984 JPX
647078 December 1984 JPX
0150353 July 1986 JPX
0271863 December 1986 JPX
0035653 February 1987 JPX
Other references
  • Electronics, p. 7, Feb. 24, 1986 by Fijitsu Microelectronics, Inc. Disc Controller pictured on p. 190, Electronic Design, 10-16-86. NCR IC Package pictured on p. 7, Electronic Design, 10-16-86. CMOS Chip pictured on p. 131, Electronics, 8-7-86.
Patent History
Patent number: D316848
Type: Grant
Filed: Jan 4, 1988
Date of Patent: May 14, 1991
Inventors: Terutomi Hasegawa (Ogaki-City, Gifu Pref.), Nobumichi Goto (Kami-Shirokane, Seki City Gifu Pref.)
Primary Examiner: Susan J. Lucas
Assistant Examiner: Joel Sincavage
Law Firm: Lorruso & Loud
Application Number: 7/140,434
Classifications
Current U.S. Class: D13/82