Adapter for an IC card
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Description
FIG. 1 is a front, bottom and right side perspective view of an adapter for an IC card, showing my new design;
FIG. 2 is a top plan view thereof;
FIG. 3 is a right side elevational view thereof;
FIG. 4 is a front elevational view thereof;
FIG. 5 is a bottom plan view thereof;
FIG. 6 is a left side elevational view thereof; and,
FIG. 7 is a rear elevational view thereof.
Referenced Cited
U.S. Patent Documents
Foreign Patent Documents
Other references
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D375303 | November 5, 1996 | Gaumet |
D407392 | March 30, 1999 | Kleineidam |
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5184282 | February 2, 1993 | Kaneda et al. |
5846092 | December 8, 1998 | Feldman et al. |
5986891 | November 16, 1999 | Sugimoto |
923611 | April 1995 | JPX |
- Toshiba, pp. 1-32, "MOS Digital Integrated Circuit Silicon Gate CMOS 128Mbit (16M .times. 8 bit) CMOS NAND E.sup.2 PROM (16M Byte SmartMedia.TM.)", Nov. 6, 1998. Toshiba, pp. 1-32, "MOS Digital Integrated Circuit Silicon Gate CMOS 64Mbit (8M .times. 8 bit) CMOS Nand E.sup.2 PROM (8M Byte SmartMedia .TM.)", Nov. 6, 1998.
Patent History
Patent number: D427167
Type: Grant
Filed: Jul 12, 1999
Date of Patent: Jun 27, 2000
Assignee: Kabushiki Kaisha Toshiba (Kawasaki)
Inventor: Hiroshi Iwasaki (Yokohama)
Primary Examiner: M. H. Tung
Law Firm: Oblon, Spivak, McClelland, Maier & Neustadt, P.C.
Application Number: 0/107,611
Type: Grant
Filed: Jul 12, 1999
Date of Patent: Jun 27, 2000
Assignee: Kabushiki Kaisha Toshiba (Kawasaki)
Inventor: Hiroshi Iwasaki (Yokohama)
Primary Examiner: M. H. Tung
Law Firm: Oblon, Spivak, McClelland, Maier & Neustadt, P.C.
Application Number: 0/107,611
Classifications
Current U.S. Class:
D14/117
International Classification: 1402;
International Classification: 1402;