Miniature tablet
The depicted miniature tablet is comprised of an ornamental design on a substrate. Semiconductor processes may be used to create the ornamental design on, for example, a semiconductor substrate. The ornamental design comprises columns of text overlaid with a graphic. As geometries of the text in the columns are so minute, the figures cannot accurately portray the content of this text.
This application is being filed concurrently with related U.S. patent applications: Ser. No. 60/154,401, provisional patent entitled “A VLSI-based System for Durable High-density Information Storage”; Ser. No. 29/110,989, design patent entitled “Miniature Tablet”; U.S. Pat. No. Des. 438,814, design patent entitled “Miniature Tablet”; Ser. No. 29/110,991, design patent entitled “Miniature Tablet”; and, Ser. No. 29/110,964, design patent entitled “Miniature Tablet”.
FIG. 1 is a front-top perspective view of a miniature tablet showing my new design;
FIG. 2 is a top plan view thereof;
FIG. 3 is a front elevational view, the rear elevational view being a mirror image thereof;
FIG. 4 is a right side elevational view, the left side elevational view being a mirror image thereof; and,
FIG. 5 is a bottom plan view thereof.
Claims
The ornamental design for miniature tablet, as shown and described.
Type: Grant
Filed: Sep 17, 1999
Date of Patent: Jun 12, 2001
Inventors: Pawan Sinha (Cambridge, MA), Pamela R. Lipson (Cambridge, MA), Keith R. Kluender (Madison, WI)
Primary Examiner: Ralf Seifert
Attorney, Agent or Law Firm: Townsend and Townsend and Crew LLP
Application Number: 29/111,068
International Classification: 1101;
