Signal processor for computer

- Kabushiki Kaisha Toshiba
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Description

FIG. 1 is a top, front and right side perspective view of a signal processor for computer showing my new design,

FIG. 2 is a front elevational view thereof,

FIG. 3 is a rear elevational view

FIG. 4 is a right side elevational view thereof,

FIG. 5 is a top plan view thereof,

FIG. 6 is a bottom plan view thereof; and,

FIG. 7 is a left side elevational view thereof.

Claims

The ornamental design for a signal processor for computer, as shown and described.

Referenced Cited
U.S. Patent Documents
4833467 May 23, 1989 Kobayashi et al.
D333131 February 9, 1993 Yamamoto
D376138 December 3, 1996 Moon
5896533 April 20, 1999 Ramos et al.
D411185 June 22, 1999 Isshiki
5964832 October 12, 1999 Kisor
D448768 October 2, 2001 Suzuki
D455747 April 16, 2002 Lin
Foreign Patent Documents
924022 May 1995 JP
1025484 November 1998 JP
1080468 July 2000 JP
Other references
  • Columbus Lan, CLH-01A, Jul. 11, 2001.
  • Lan A series, LAN A KF-702, Aug. 1, 2001.
  • PC Magazine Advertisement, OPTI UPS, vol. 14, No. 14, p. 411, Aug. 1995.
Patent History
Patent number: D480724
Type: Grant
Filed: Jul 26, 2002
Date of Patent: Oct 14, 2003
Assignee: Kabushiki Kaisha Toshiba (Tokyo)
Inventor: Joji Nishi (Tokorozawa)
Primary Examiner: Freda Nunn
Attorney, Agent or Law Firm: Banner & Witcoff, Ltd.
Application Number: 29/164,465
Classifications
Current U.S. Class: Transmitter Or Receiving Unit (D14/358)
International Classification: 1402;