Input/output device
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Description
The broken lines shown in
Claims
The ornamental design for an input/output device, as shown and described.
Referenced Cited
U.S. Patent Documents
D433998 | November 21, 2000 | Ishitsuka |
D443586 | June 12, 2001 | Sakasegawa |
D443587 | June 12, 2001 | Sakasegawa |
D544836 | June 19, 2007 | Sichner |
20170141563 | May 18, 2017 | Islam |
Patent History
Patent number: D825472
Type: Grant
Filed: Sep 29, 2016
Date of Patent: Aug 14, 2018
Assignee: FANUC CORPORATION (Yamanashi)
Inventors: Masashi Yamanaka (Yamanashi), Yuuma Ootsuka (Yamanashi)
Primary Examiner: Daniel Bui
Application Number: 29/579,272
Type: Grant
Filed: Sep 29, 2016
Date of Patent: Aug 14, 2018
Assignee: FANUC CORPORATION (Yamanashi)
Inventors: Masashi Yamanaka (Yamanashi), Yuuma Ootsuka (Yamanashi)
Primary Examiner: Daniel Bui
Application Number: 29/579,272
Classifications