Systems and methods for self-test of a radar altimeter
Systems and methods for testing a signal generated by a Direct Digital Synthesizer (DDS) in a radar altimeter. In an embodiment of the method, a voltage signal derived by comparing a fixed reference frequency to a ramped frequency signal generated by the DDS based on a clock-based reference signal is generated. The generated voltage signal is integrated over a predefined range of clock signals. The integration is sampled at a previously defined clock tick. The sample is compared to a desired value and an indication that the radar altimeter is malfunctioning is provided if the comparison exceeds a predefined threshold value. The radar altimeter system is deactivated if an indication that the radar altimeter is malfunctioning has been provided.
Latest Honeywell International Inc. Patents:
- SYSTEM FOR DAMPING UNWANTED MOTOR MOVEMENT
- METHOD AND SYSTEM FOR TAXI ASSIST PATH GENERATION BASED ON GUIDANCE LINES OF AN AIRPORT
- APPARATUS AND METHOD FOR ENHANCED BEAT NOTE DETECTION
- NON-FLAMMABLE REFRIGERANTS WITH LOW GWP AND SECONDARY REFRIGERANT SYSTEMS INCLUDING SUCH REFRIGERANTS
- SYSTEMS AND METHODS FOR DISPLAYING AIRCRAFT ROLL RATE ON A VERTICAL TAKE-OFF AND LANDING AIRCRAFT DISPLAY
This application is related to co-pending U.S. patent application Ser. No. 11/306,185. The contents of which are hereby incorporated by reference.
BACKGROUND OF THE INVENTIONFrequency Modulated/Continuous Wave (FM/CW) Radar Altimeters need ways in which to verify proper operation. In current radar altimeters, self-testing is performed in a system that uses a Bulk Acoustic Wave (BAW) device that is relatively expensive. These systems fail to accurately detect improper system operation.
Therefore, there exists a need to replace expensive BAW devices and to implement a self-test that more effectively identifies when the radar altimeter is performing outside of acceptable limits.
BRIEF SUMMARY OF THE INVENTIONThe present invention provides systems and methods for testing a signal generated by a Direct Digital Synthesizer (DDS) in a radar altimeter. In an embodiment of the method, a voltage signal derived by comparing a fixed reference frequency to a ramped frequency signal generated by the DDS based on a clock-based reference signal is generated. The generated voltage signal is integrated over a predefined number of clock signals. The integration is sampled at a previously defined clock tick. The sample is compared to a desired value and an indication that the radar altimeter is malfunctioning is provided if the comparison exceeds a predefined threshold value.
The radar altimeter system is deactivated if an indication that the radar altimeter is malfunctioning has been provided.
The preferred and alternative embodiments of the present invention are described in detail below with reference to the following drawings.
1;
The output of the phase/frequency detector 114 is integrated by the integrator 118. The output of the integrator 118 is compared at the comparator 120 to a reference voltage Vref. The output of the comparator 120 is sent to the sample and holding device 124 that retains the sampled comparator output until it is requested by the PLD 26. This permits the PLD 26 to operate asynchronously from the transmitter 24. The comparator 120 determines if the product of the integrator 118 as compared to the Vref is outside of a threshold value as was performed at the decision block 60 from FIG. 2. The DDS 100 and the integrator 118 are controlled by the PLD 26.
Referring now to
Referring back to
While the preferred embodiment of the invention has been illustrated and described, as noted above, many changes can be made without departing from the spirit and scope of the invention. Accordingly, the scope of the invention is not limited by the disclosure of the preferred embodiment. Instead, the invention should be determined entirely by reference to the claims that follow.
Claims
1. A radar altimeter system including a transmitter having a Direct Digital Synthesizer (DDS) and a Digital Phase Lock Loop, the system comprising:
- a first component configured to generate a voltage signal derived by comparing a fixed reference frequency to a ramped frequency signal generated by the DDS based on a clock-based reference signal;
- a second component configured to integrate the generated voltage signal over a predefined range of clock signals;
- a third component configured to sample the integration at a previously defined clock tick;
- a fourth component configured to compare the sample to a desired value; and
- a fifth component configured to provide an indication that the radar altimeter is malfunctioning if the comparison exceeds a predefined threshold value.
2. The system of claim 1, further comprising a device configured to deactivate the radar altimeter system if an indication that the radar altimeter is malfunctioning has been provided.
3. The system of claim 1, wherein the second component includes a device configured to perform a reset function.
4. A method for testing a signal generated by a Direct Digital Synthesizer (DDS) in a radar altimeter, the method comprising:
- generating a voltage signal derived by comparing a fixed reference frequency to a ramped frequency signal generated by the DDS based on a clock-based reference signal;
- integrating the generated voltage signal over a predefined range of clock signals;
- sampling the integration at a previously defined clock tick;
- comparing the sample to a desired value; and
- providing an indication that the radar altimeter is malfunctioning if the comparison exceeds a predefined threshold value.
5. The method of claim 4, further comprising deactivating the radar altimeter system if an indication that the radar altimeter is malfunctioning has been provided.
6. The method of claim 4, further comprising performing a reset function.
7. A method for testing a signal generated by a Direct Digital Synthesizer (DDS) in a radar altimeter, the method comprising:
- activating the radar altimeter in a normal mode of operation;
- integrating a generated voltage signal between a turnaround point and a clock tick;
- comparing a detected integration value to a reference voltage value; and
- deactivating the radar altimeter system if the comparison is outside a predefined threshold value.
8. The method of claim 7, wherein activating further comprises generating a voltage signal.
9. The method of claim 8, wherein generating further comprises generating the voltage signal derived by comparing a fixed reference frequency to a ramped frequency signal generated by the DDS based on a clock based reference signal.
10. The method of claim 7, wherein comparing further comprises sampling the integration at a previously defined clock tick.
11. The method of claim 7, further comprising performing a reset function.
12. A radar altimeter system including a transmitter having a Direct Digital Synthesizer, (DDS) and a Digital Phase Lock Loop, the system comprising:
- a first component configured to generate a voltage signal derived by comparing a fixed reference frequency signal to a ramped frequency signal generated by the DDS based on a clock-based reference signal;
- a second component configured to integrate the generated voltage signal over a predefined range of clock ticks;
- a third component configured to generate an output signal representing a comparison of the integration to a desired value;
- a fourth component configured to sample the comparison at a previously defined clock tick; and
- a fifth component configured to provide an indication that the radar altimeter is malfunctioning if the comparison exceeds a predefined threshold value.
13. The system of claim 12, further comprising a device configured to deactivate the radar altimeter system if an indication that the radar altimeter is malfunctioning has been provided.
14. The system of claim 12, wherein the second component includes a device configured to perform a reset function.
15. A method for testing a signal generated by a Direct Digital Synthesizer, (DDS) in a radar altimeter, the method comprising:
- generating a voltage signal derived by comparing a fixed reference frequency signal to a ramped frequency signal generated by the DDS based on a clock-based reference signal;
- integrating the generated voltage signal over a predefined range of clock signals;
- generating an output signal representing a comparison of the integration at a previously defined clock tick to a desired value; and
- providing an indication that the radar altimeter is malfunctioning if the comparison exceeds a predefined threshold value.
16. The method of claim 15, further comprising deactivating the altimeter if an indication that the radar altimeter is malfunctioning been provided.
17. The method of claim 15, further comprising performing a reset function.
4503433 | March 5, 1985 | Tomasi |
4806935 | February 21, 1989 | Fosket et al. |
5151661 | September 29, 1992 | Caldwell et al. |
5160933 | November 3, 1992 | Hager |
5673050 | September 30, 1997 | Moussally et al. |
5821897 | October 13, 1998 | Bradley |
7023378 | April 4, 2006 | Coleman et al. |
20050156781 | July 21, 2005 | Coleman et al. |
20070081611 | April 12, 2007 | Fudge et al. |
20070139259 | June 21, 2007 | Vacanti |
20070192391 | August 16, 2007 | McEwan |
2372649 | August 2002 | GB |
- European Patent Office, “European Search Report”, Jul. 14, 2008, Published in:EP.
Type: Grant
Filed: Nov 9, 2009
Date of Patent: May 3, 2011
Assignee: Honeywell International Inc. (Morristown, NJ)
Inventor: David C. Vacanti (Renton, WA)
Primary Examiner: Thomas G Black
Assistant Examiner: Shelley Chen
Attorney: Fogg & Powers LLC
Application Number: 12/615,014
International Classification: G01S 7/40 (20060101); G01S 13/32 (20060101);