Abstract: A data input/output line sensing circuit includes a latch sense circuit having the double functions of performing a latch operation and a sensing operation for data read from a memory cell. The latch sense circuit includes a first inverter having an input end connected to one of the data input/output lines, and an output end connected to the other of the data input/output lines; a first switching transistor provides the first inverter with a power supply voltage and a ground voltage only during a sensing operation in response to a sensing control signal; a second inverter having an input end connected to the output of the first inverter, and an output end connected to the input of the first inverter; and a second switching transistor provides the second inverter with the power supply voltage and the ground voltage only during the sensing operation in response to the sensing control signal.

Abstract: The present invention provides a sense circuit including a first bit line, a second bit line, a first plurality of memory cells coupled to the first bit line, a second plurality of memory cells coupled to the second bit line, and selection circuitry coupled to the first bit line and the second bit line. The selection circuitry provides a wide AND gate function in one mode and provides a zero power circuit for generating a function of a single input in another mode.

Abstract: A sense amplifier circuit includes a voltage developing stage which receives first and second data inputs, din1 and din2, and generates, in response to a first control signal .PHI..sub.1, a differential voltage indicative of a voltage difference between the first and second data inputs, din1 and din2; a full-swing locking stage which generates and latches, in response to a second control signal .PHI..sub.2, first and second latched data outputs, dout1 and dout2, from the differential voltage generated by the voltage developing stage; and a voltage equalization stage which equalizes, in response to a third control signal .PHI..sub.0, voltages on data lines respectively connected to the first and second data outputs, dout1 and dout2. Timing of the first, second and third control signals, .PHI..sub.1, .PHI..sub.2 and .PHI..sub.0, is such that the first control signal is activated after a finite period following the initial activation of the third control signal .PHI..sub.0, and the second control signal .PHI..

Abstract: A sampling circuit which obtains a level of sampled-and-held signal which is determined with respect to a well-determined reference level V0, even though the input signal is a useful signal referenced with respect to a low-stability reference level. This is the case in particular for sampling of signals derived from charge-transfer photosensitive devices for which the dark level can vary. The circuit includes a sample-and-hold device (EB1) and an input via a capacitor (C1), with a reset circuit which periodically charges the capacitor (C1) to a value which is roughly the difference between the (variable) input reference level and the (fixed) output reference level. According to the invention, it is provided that the reset circuit comprises a looped amplifier (AD1) in which the loop (B1, EB2, B2) is designed to introduce a voltage level shift equal to the shift introduced intrinsically by the sample-and-hold device (B1, EB1, B2).

Abstract: Offset-compensated sample and hold arrangement to sample an input signal comprising at least an operational amplifier (A), a first capacitor (C1), a second capacitor (C2), a first switch (S110), a second switch (S211), a third switch (S210), a fourth switch (S111), a fifth switch (S120), a sixth switch (S121), a seventh switch (S220) and an eighth switch (S221), which switches capacitors and operational amplifier are interconnected in such a way and may be switched in such a way that during an offset-compensation phase the output voltage will only experience a very small voltage change.

Abstract: A common dictionary definition of a "diode" is "any electronic device that restricts current flow chiefly to one direction." This definition covers not only the conventional two lead PN junction semiconductor device presently known in the prior art (referred to herein as a "conventional diode") but also the electronic device of this invention (referred to herein as a "low power diode"). A low power diode has a comparator for comparing the voltage present at the anode and cathode of the diode. When the comparator determines that the voltage present at the anode of the low power diode equals or exceeds the voltage present at the cathode of the low power diode by a predetermined forward voltage, a signal is generated. This signal turns on a transistor acting as a switch, which in turn electronically connects the anode and the cathode of the low power diode together. Unlike conventional diodes that have a forward voltage (dependent on the physical silicon junction property of the diode) of approximately 0.

Abstract: A CMOS pass gate receiver improves chip-to-chip communication speed for high speed chips. The high speed CMOS pass gate receiver is immune to overshoot or undershoot and can operate in a frequency greater than or equal to 400 Mhz.

Abstract: A phase-locked loop frequency synthesizer with adjustable frequency has blanking circuits to remove a predetermined number of pulses per second from a signal applied to an associated frequency divider. Each blanking circuit comprises a latch circuit operated by a signal of predetermined latch frequency to disable the associated frequency divider a number of times per second equal to the predetermined latch frequency. A counter circuit coupled to the latch circuit and adjustably set by an associated selector controls the latch circuit and enables the frequency divider said number of times per second after a predetermined number of pulses of a signal supplied to the frequency divider according to the setting of the associated selector. The number of pulses per second removed by the blanking circuit is thus controlled by the setting of the associated selector multiplied by the number of times per second the associated latch circuit is operated.

Abstract: The phase-locked loop includes means (3) for generating an internal signal (SIN) drawn from the output signal of the voltage-controlled oscillator (2), and a phase comparator (4) able to compare the phase of the internal signal (SIN) with that of an external signal received (SSY), and the output of which is looped back onto the voltage-controlled oscillator (2). It further comprises a device (6) accelerating the synchronization of the internal and external signals, including processing means able to receive, from the phase comparator (4), a predetermined indication representative of the non-coincidence of the internal and external signals, and, in response to this predetermined indication, to deliver control information in response to which the generation means (3) modify the phase of the internal signal in order to force the latter substantially into phase with the external signal (SSY).

Abstract: A phase locked loop circuit comprising a first counter for dividing a reference frequency at a division ratio predetermined or determined by an input unit, a second counter for dividing a frequency of an output signal from the phase locked loop circuit at a division ratio predetermined or determined by a different input unit, a phase detector for inputting output signals from the first and second counters and generating a voltage based on a phase difference between the inputted signals, a low pass filter for low pass filtering an output signal from the phase detector, and a voltage controlled oscillator for generating a frequency signal proportioned to an output voltage from the low pass filter. The phase locked loop circuit further comprises an unlock detector for generating a control signal for synchronization of one of the first and second counters with an earlier phase in response to an unlocked signal from the phase detector.

Abstract: An invention providing a hard limiter between the pulse width modulator and output drive transistors of a class-D amplifier is disclosed. The limiter functions by controlling the duty cycle of the pulse width modulator output, which directly corresponds to the magnitude of the voltage appearing across the load output transducer. The pulse width modulated (PWM) signal is compared to the outputs of a pair of one-shot circuits (single pulse generators). If either the positive pulse or the negative pulse of the PWM signal is shorter than the one-shot pulse, then the one-shot pulse is substituted for the PWM pulse. This sets the maximum and the minimum values for the duty cycle of the PWM signal, thereby limiting the positive and negative value of the corresponding output voltage.

Abstract: An apparatus for generating a monostable signal is disclosed. The apparatus comprises a flip-flop, an oscillation circuit, a counter and a comparison circuit. The flip-flop, in response to a trigger signal, activates a first edge transition of the monostable signal at an output terminal. The oscillation circuit generates a pulse train, responsive to the first edge transition. The counter counts number of pulses of the pulse train. The comparison circuit, comparing the output of the counter with a predetermined value, generates a clear signal to said flip-flop in order to activate a second edge transition of the monostable signal. The desired pulse width of the output signal is controlled by the predetermined value.

Abstract: A digitally adjustable time delay circuit which is able to precisely and selectively provide fine delay steps increments, which increments can be one nth of the delay time of one CMOS inverter, including means to adjust the total range of the delay and size of each delay step.

Abstract: An I/O circuit that provides bidirectional signal access to an integrated circuit (IC) core has voltage transformation capability to manage different voltage requirements. Although the I/O circuit and the core are fabricated from the same IC process, the I/O circuit can operate at non-process constrained voltages. The I/O circuit provides an output signal at the necessary voltage level to drive a component in the discrete environment while limiting the voltage supplied to the IC core to the maximum device voltage defined by the selected process.

Abstract: A differential amplifier provides a predetermined gain characteristic over a large range differential input voltage signals and operating temperatures. The differential amplifier receives a first differential input voltage signal at a pair of amplifier input terminals and outputs a differential output current signal at a pair of amplifier output terminals. First and second emitter-coupled transistors are connected to receive at their bases an amplifier core differential voltage signal, have their emitters coupled to receive first and second constant currents and coupled together by a load element. The first and second emitter follower transistors have their bases coupled to the amplifier input terminals to receive the first differential input voltage signal from the pair of amplifier input terminals.

Abstract: A logarithmic amplifying circuit with a reduced power dissipation and suitable for applying to an integrated circuit. The logarithmic amplifying circuit has cascade-connected differential amplifiers, a rectifier connected to each if the amplifiers and an adder for adding the output currents of the rectifiers. Each of the rectifiers has a differential pair composed of a plurality of transistors emitter-coupled or source-coupled, a constant current source for a tail current of the differential pair and an offset voltage source for superimposing a DC offset voltage on a differential input voltage to be supplied to the differential pair.

Abstract: A vector summation device includes a squaring circuit for receiving a number of input voltage signals, and a square-root circuit having first and second current terminals connected electrically to the squaring unit. The squaring circuit receives first and second current signals respectively from the first and second current terminals of the square-root circuit. The difference between the current values of the first and second current signals is proportional to the sum of the squares of the voltage values of the input voltage signals. The square-root circuit generates an output voltage signal with a voltage value that is proportional to the square-root of the difference between the current values of the first and second current signals.

Abstract: A power semiconductor device circuit has an insulated gate field effect power semiconductor device with first and second main electrodes and a gate electrode. A gate control circuit provides a conductive path between the gate electrode and a gate voltage supply terminal. The gate control circuit has a resistance coupled between the gate electrode and the gate voltage supply terminal. A switching device has first and second main electrodes coupled to the gate voltage supply terminal and the gate electrode, respectively, so that the main current path between the first and second main electrodes is coupled in parallel with the resistance, the switching device having a first non-conducting state and a second conducting state for providing, in the second conducting state, an additional resistance in parallel with the resistance.

Abstract: A bias voltage generation circuit has a bias voltage generation means and a VBB detector. The bias voltage generation means is made up of a charge pump circuit, and a ring oscillator for biasing a P-type region to have a predetermined potential level. The VBB detector detects the bias level of the P-type region and controls the bias generation means. The VBB detector incorporates a bias level detection circuit, and two delay circuits which are controlled on the basis of a signal appearing at an output node N2 of the bias level detection circuit. The ring oscillator is controlled on the basis of outputs of the two delay circuits. One of the two delay circuits has a higher detection level and is therefore less responsive to the signal at the output node N2 than the other delay circuit, but provides a shorter delay time than that provided by the other delay circuit.

Abstract: A bias generation and distribution system in which bias potentials are generated at one main location within a logic circuit and then distributed throughout the logic circuit to MOS load devices, MOS load networks, other bias voltage conversion centers, and logic circuits is disclosed. The system generates a first bias voltage that provides a temperature compensated voltage that is utilized to bias MOS load devices and parallel MOS load networks. The first bias voltage generator includes either a reference MOS load device or a reference parallel MOS load network which determines the value of the first bias voltage. The reference MOS load network includes a switching network responsive to a first set of control signals. The first set of control signals may be adjusted to vary the value of the first bias voltage to compensate for process variations. The first bias voltage is distributed to either remote single load MOS devices or to remote parallel MOS load networks.

Abstract: A filter circuit and a filter integrated circuit capable of being used in a high frequency band includes a first resistor R.sub.1 connected between an input signal source and an emitter of a common-base transistor TR.sub.1, a first capacitor C.sub.1 connected between said input signal source and a reference voltage point, a second capacitor C.sub.2 connected between said input signal source and a collector of the common-base transistor TR.sub.1, and a second resistor R.sub.2 connected between the collector of the common-base transistor and the reference voltage point. Thus, a low-pass filter which operates in a high frequency band and suppresses the influence of characteristic parameters over the filter characteristic can be constructed.

Abstract: The circuit for generating current has a controllable current source M.sub.7, an input transistor pair 24 having a first branch and a second branch, a current mirror 28 having a first branch and a second branch, and an amplifier 50. The controllable current source M.sub.7 is coupled to the first and second branches of the input transistor pair 24. The first branch of the current mirror 28 is coupled to the first branch of the input transistor pair 24. The second branch of the current mirror 28 is coupled to the second branch of the input transistor pair 24. The input transistor pair 24 is coupled between the controllable current source M.sub.7 and the current mirror 28. The amplifier 50 has an output coupled to the controllable current source M.sub.7, and a first input coupled to the second branch of the input transistor pair 24 and the second branch of the current mirror 28.

Abstract: An amplifier (10) receives a bias voltage to the gate of a depletion mode field effect transistor (12). In one embodiment, a bias circuit (20) offsets (22) the bias voltage from a power supply potential (26) to maintain substantially constant drain current over a range of threshold voltages (34,36,38) caused by process and temperature variation. In an alternate embodiment, a transistor (58) in the bias circuit (50) provides an incremental current flow to compensate the bias voltage of the MESFET for variation in threshold voltages. The bias circuit is applicable to other depletion mode field effect transistor circuits having a negative threshold voltage.

Abstract: A spread-spectrum clock circuit is applied to microprocessor or other clocked digital electronic equipment for the purpose of reducing spectral emissions residing at harmonic and subharmonic multiples of the clock frequency. This clock randomly varies the frequency of its output within a frequency constraint bound centered at the average clock frequency. The center frequency of the spread-spectrum clock is stable and is usable for timing and measurement applications. The spread-spectrum clock is a sealed, self-contained circuit module that can be applied to existing digital electronic equipment without modification.

Abstract: In a method for generating a transmitting wave, a power supply voltage to be supplied to a transmission power amplifier is detected by a voltage detector, and a modulating signal is controlled so that a peak value of a modulated wave is lowered in accordance with a reduction amount of the power supply voltage. Since the peak value of the modulated wave input to the power amplifier is lowered, it is possible to obtain a transmitting wave without a distortion of the wave form or an increased bandwidth even when the reduction in the power supply voltage involves the lowering of the driving capability of the power amplifier.

Abstract: A frequency modulation circuit which varies the resonance frequency of an LC resonance circuit, and which corresponds to the frequency modulation conversions of all TV methods with a simple constitution. Each of a plurality of passive element series circuits for varying a time constant of the LC resonance circuit is composed of, for instance, a capacitor and a resistor, which is switched and controlled by connecting to or separating from the LC resonance circuit by a switching circuit such as a transistor. Thereby, the oscillation frequency of the LC resonance circuit can be easily converted to a predetermined frequency.

Abstract: A Single-Sideband (SSB) modulator includes:a demultiplexer for successively distributing an A/D converted digital signal x(t) to L sequences x.sub.1 (t.sub.1), x.sub.2 (t.sub.2)... ...x.sub.L (t.sub.L) in accordance with a sampling period t, an adder including L/2 adders for adding constants to x.sub.i (t.sub.i) of the demultiplexer, where i is either an even or an odd number; a phase shift network system comprising L/2 phase shift networks for making a 90-degree phase difference between the outputs of the adder and x.sub.i (t.sub.i) of the demultiplexer; a timing signal generator for generating timing signals expressed by A(-1).sup.(KL)/2+n and/or A(-1).sup.((K-1)L)/2+n in accordance with the sampling period t; a multiplier including L/2 pair of multipliers for multiplying the outputs of the phase shift network system by the outputs of the timing signal generator; a multiplexer for selecting the outputs of the multiplier in accordance with the sampling period t.

Abstract: A cable equalizer (10) receives signals transmitted over a coaxial cable (12) at a multi-path simulator (14). The multi-path simulator (14) includes a splitter (16) that places the signal along a first path (26) and a second path (28), wherein the signal on the first path (26) is 180.degree. out of phase with the signal along the second path (28). The signal along the first path (26) propagates to a combiner circuit (18). The signal along the second path (28) propagates through a delay circuit (20) having a delay value of .tau. that determines the notch spacing of the equalized signal. The signal along second path 28 propagates from delay circuit 20 to a variable attenuator circuit (22) that determines the notch depth for the equalized signal. The combiner (18) receives the signal along the first path (26) and the second path (28) and generates an equalized signal at the output of the multi-path simulator (14).

Abstract: An attenuator for use with a current transformer. The attenuator includes an input voltage terminal, an input ground terminal, an output voltage terminal, an output ground terminal, an input resistive arm, a shunt resistive arm, an output resistive arm, and a compensation circuit. The input and output ground terminals are coupled together. The input resistive arm has a first end coupled to the input voltage terminal and a second end. The output resistive arm has a first end coupled to the output voltage terminal and a second end coupled to the second end of the input resistive arm. The shunt resistive arm has a first end coupled to the input and output ground terminals and a second end coupled to the second ends of the input and output resistive arms. The shunt resistive arm has a shunt resistance and an intrinsic inductance effectively in series with the resistance.

Abstract: An earth electrode and a spiral pattern electrode are formed on both surfaces of a dielectric plate. One end of the pattern electrode is connected to the earth electrode. The width of the pattern electrode is made narrow in proportion to going from one end toward the other end. An area ratio S2/S1 is 0.15 or more when defining an area of the pattern electrode as S1, and an area of center portion where the pattern electrode is not formed as S2. A take-out electrode is drawn out from the pattern electrode with a distance from the one end of the pattern electrode. A chip type filter is manufactured by forming plural pattern electrodes on the dielectric plate, and coupling the pattern electrodes electromagnetically.

Abstract: In a surface acoustic wave (SAW) filter, on a 36.degree. Y-cut X-propagation lithium tantalate substrate, series branch SAW resonators, which are connected in series between an input terminal and an output terminal, and parallel branch SAW resonators, which are connected between respective pairs of the series branch resonators by wirings and which are grounded, are provided. Two series branch resonators and one parallel branch resonator are connected in a T shape, so as to form a fundamental unit. In the SAW filter, three fundamental units are serially connected. An interdigital transducer (IDT) included in each resonator is made of a metal film containing aluminum as the main component. The thickness of the metal film is in the range of 8% to 10% of the electrode pitch of the IDT of the parallel branch resonator.

Abstract: One example of a high-frequency filter includes a dielectric substrate having a high dielectric constant. On one whole main face of the dielectric substrate, an earth electrode is formed. On the other main face of the dielectric substrate, two pattern electrodes are formed. The pattern electrodes have first parts formed in parallel at an interval, and second parts extended in crossing (non-parallel) directions. Also, on one main face of the dielectric substrate, input-output electrodes are respectively formed near the end parts of the pattern electrodes, and capacitors are respectively formed between the open end parts and the input-output electrodes.

Abstract: The present invention relates to a radio frequency filter, comprising a block(1) of a dielectric agent and an insulation sheet (2) attached to a side surface thereof. From the top surface of the block to the undersurface, at least two holes (3,4,5) coated with a conductive agent extend. At least most of the surface of the body, with the exception of one side surface, as well as the surfaces of the holes have been coated with a conductive agent, whereby a transmission line resonator is produced for each hole. The surface of the insulation sheet (2) fixed against the uncoated side surface but not facing the block has also been coated with a conductive agent. The coupling pattern formed by the metallic electrodes is located between the opposite surfaces. The unevenness of the surfaces placed against each other and the defects in adjusting the pieces cause great divergence in the response curves of the filters.

Abstract: While carrying and rotating a tubular body to be inspected, an image pick up device is inserted into the tubular body to be inspected to pick up an image of the internal surface thereof to take out a corresponding video signal to transmit the video signal to an image processing device through an antenna device to carry out image processing to judge the internal surface of the tubular body to be inspected. In the antenna device, ring-shaped conductors are oppositely arranged in a ring-shaped hollow chamber provided within an electromagnetic shielding body wherein one ring-shaped conductor is rotated and the other is fixed.

Abstract: A circuit breaker actuating mechanism has a magnetic frame and a load coil, with a magnetic pole piece which is aligned with the axis of the coil. An elongate L-shaped armature pivots on the magnetic frame and has a head which moves transversely relative to the axis of the coil towards the pole piece. The pole piece is typically circular in section, and the head of the armature has a circular recess which matches the shape of the pole piece. The head of the armature has a pair of projections which extend relatively close to the pole piece when the armature is in a retracted position, increasing the initial attractive force between the pole piece and the armature. The mechanism is relatively simple and economical to manufacture, and offers an improved pull-in force.

Abstract: A high performance radial anisotropic cylinder-shape ferrite magnet for use in a motor to lower its noise and enable miniaturization thereof is formed of an integrated one-piece body formed of sintered Sr and/or Ba ferrite powders and has an axially-extending slit that is created before the body is sintered to reduce internal stress due to shrinkage. The slit can extend in parallel to both the axial and radial directions of the body, diagonally to both the axial and radial directions, or diagonally to the radial direction and parallel to the axial direction. The slit can be filled with a resin material.

Abstract: A unipolar magnet is composed of a plurality of magnetic units. Each magnetic unit is made up of a magnetic body, a paramagnetic or diamagnetic first layer which covers the entire magnetic body except for one of the poles, and a magnetically conductive second layer overlying the first layer. The exposed poles of all the magnetic units have the same polarity and together define a peripheral surface of the magnet. The magnetic units can have the configuration of a segment of a ring and can be assembled to form an annular first magnet whose external peripheral surface is constituted by the exposed poles. Several of these annular first magnets can be superimposed to form a hollow cylinder, and such a cylinder can be used to construct a shaft capable of floating in a housing. To this end, the housing is provided with annular second magnets which surround the first magnets.

Abstract: A common mode choke coil has a couple of coils, a magnetic frame in which the coils are encased, the magnetic frame forming closed magnetic circuits around the respective coils, and a magnetic core which pierces through the magnetic frame. The frame is made of an insulating magnetic material which has a relative magnetic permeability of more than one, preferably two through some scores. For example, a mixture of ferrite powder of Ni--Zn and resin is used as the material of the frame. The core is made of a material which has a relative magnetic permeability of preferably several thousands, such as ferrite and amorphous.

Abstract: A power feeding device of three-leg core type having a primary and secondary cores which appear to be a three-leg core cut into two pieces at the legs and form a magnetic circuit including gaps by being coupled to face the cut surfaces, and a primary and secondary windings wound coaxially around the central leg section, with the primary core and primary winding constituting the power supply part and the secondary core and secondary winding constituting the power receiving part. The power feeding device based on this winding structure achieves a far better power transfer efficiency as compared with the conventional counterpart having the primary and secondary windings wound separately on a pair of E-shape cores.

Abstract: An ignition coil comprising a magnetic core and primary and secondary windings wound around the magnetic core is disclosed. At least the secondary winding is wound on a tubular secondary bobbin and the primary winding is disposed within the secondary bobbin.In accordance with the invention, the secondary bobbin is closed on the side of the high voltage terminal end of the secondary winding.

Abstract: The present invention relates to a device for shutting off an engine remotely and sounding off an alarm locally and which includes an alarm motor, a module for activating the alarm motor, a key switch for turning the module on and off, a siren connected to the alarm motor, and a battery with an alternator terminal.

Abstract: An anti-theft system is described adaptable to any motor vehicle having a removable accessory electronic unit such as a high-fidelity stereo component unit installed within a mounting bracket and slidably detachable therefrom. Upon leaving the car, the vehicle owner takes along the entire accessory unit, or alternatively takes only a detachable front control panel from the unit, for secure safekeeping or to be retained in the personal possession of the owner. At the same time, continuity of the electrical circuit supplying current from the storage battery to the motor vehicle fuel pump (or ignition switch, or other control component of the vehicle) is interrupted, thus preventing normal operation of the vehicle and protecting against unauthorized use.

Abstract: A marine craft fuel alert system is operative during a given time period, to compare actual fuel capacity measurements with selected fuel tank capacity reference values, to permit timely intervention. Used with a relatively high reference value and operative during fuel loading, the system and methodology gives a warning to a fuel input agent (i.e., person controlling fuel loading) in sufficient time for the agent to terminate fuel loading and prevent environmental pollution by fuel overfill spillage. Conversely, the system and methodology, with appropriate modifications, can be used to sense and warn of predetermined low fuel level conditions. The system can be integrally incorporated into an original equipment marine craft system or retrofit thereto. Electrical interconnections may extend to marine craft ignition system interdiction during operation of the fuel loading monitoring and warning.

Abstract: A device (10) for signaling the felling of a tree (50) includes a transmitter, an inclination switch (14) which is positioned or mounted within the trunk (52) of the tree (50), the inclination switch (14) being responsive to detect inclination such that the inclination switch (14) is off when the trunk (52) is in an upright position and the switch (14) is on when the trunk (52) has been felled and a fire alarm switch (15) which is responsive to detect a threshold temperature such that the fire alarm switch (15) is off when the environment's temperature is lower than the threshold and the fire alarm switch (15) is on when the threshold temperature is exceeded. The transmitter is connected to the inclination switch (14) and the fire alarm switch (15) and is energized to transmit a signal to a remote location when either or both of the switches is on. The device (10) may be part of a system which includes a plurality of like devices (10) each of which are installed into different trees (50).

Abstract: An intrusion detection electronic circuit package, includes a containment wall in combination with first and second transmission lines being organized in patterns spaced adjacent one another. Electronic circuitry, residing within the containment wall, includes a transmitter for transmitting signals in anti-phase relationship via the first and second transmission lines respectively. A receiver receives signals from the transmission lines and a detector connected to the receiver uses EXCLUSIVE OR logic to detect any significant in-phase components or interruptions in the signals received at the first and second inputs of the receiver. Disturbance of either transmission line in any attempt to breach the containment wall is likely to be detected.

Abstract: A process for monitoring an opening of an enclosed space by an IR alarm system, wherein: a measuring process is generated whereby a modulated IR beam is emitted by at least one IR emitting element of an optoelectronic unit in the form of a pulse and the beam reflected from marginal areas of the opening is detected as a measurement signal by at least one IR receiving element of the optoelectronic unit, with the directional characteristic of th IR beam being matched, by optical components in the path of the beam, to the opening being monitored; the measurement signal detected by the receiving element is compared with a mean value of the previous measurement signals, and a normal operating mode of the alarm system is initiated if there is an approximate correlation between the measurement signal and the mean value, or an alarm operating mode of the alarm system is initiated if there is a significant deviation between the measurement signal and the mean value; in the normal operating mode, the next measuring proc

Abstract: A shock sensor includes a mass suspended in a flexible support arranged to resonate when subjected to a mechanical shock, a microphone spaced closely to the mass, the mass and microphone forming a first air pressure chamber with the flexible support for transmittal therethrough of air pressure waves from the resonating mass to the microphone, the microphone arranged to produce an electronic signal when it detects changes in air pressure from the pressure waves traveling through the chamber.

Abstract: An electric control is shown for gas furnaces which controls fan motors and ignition controls based on inputs from a room thermostat (32), a high limit control and an ignition control (14) including a gas valve. A flame sense circuit (42, 42') is coupled to a microprocessor (U2) and includes a flameprobe (P1) energized by line power through a capacitor (C3) via a quick connect (QC31). A capacitor (C4) is charged by a 5 volt DC source through resistor (R12) and inputted to an inverter (U3, S2) which provides a low signal to the microprocessor when no flame is present. When a flame is present the capacitor (C4) discharges through the flame causing the inverter to change state providing a high to the microprocessor indicating that a flame is present. A diagnostic network comprising a low leakage diode (CR10) and serially connected resistor (R11) is coupled between the microprocessor (pin 8) and the input of the inverter (U3) so that the operation of the flame sense circuit can be tested.

Abstract: A warning announcer for a gasoline dispenser having a pump flow counter, a pump bar switch and/or a nozzle position sensor, a dispenser nozzle, and a nozzle receptacle, including a logic unit, a timer, a speaker, a voice alarm unit for providing a message to the speaker, a circuit for connecting signals from the pump flow counter and the pump bar switch or position sensor to the logic unit for controlling the timer to produce a message signal, and a circuit for connecting the timer to the voice alarm unit for initiating a message when the timer produces a messages signals.

Abstract: A low air warning device for scuba divers. The low air warning device attaches to the first stage of the air regulator, which is attached to the top of the air tank. The low air warning device, being compact and easily used, sounds an audible alarm in the event of low air levels. The low air warning device utilizes a piezo speaker element and driver, located within the waterproof housing, to produce an audible tone which is easily heard under water. The low air warning device automatically turns itself on and off utilizing a water conductivity activation switch.