Patents Issued in February 17, 2004
  • Patent number: 6693267
    Abstract: A portable microwave oven, formed by a hollow prismatic body (10) defining an internal cooking chamber (20) formed between a first polygonal base (30) and a second polygonal base (40) of said body (10) and a peripheral lateral wall (50), the first polygonal base (30) externally defining a first seating surface (31) of the oven, the second polygonal base (40) being at least partially defined by a tiltable door (60) that gives access to the cooking chamber (20), the peripheral lateral wall (50) defining, in part of its extension, a second seating surface (52) of the oven, the cooking chamber (20) being provided with a first product supporting surface (21) and a second product supporting surface (22) in a position usually displaced in 90 degrees in relation to the operative position when using the first product supporting surface (21).
    Type: Grant
    Filed: November 1, 2002
    Date of Patent: February 17, 2004
    Assignee: Multibras S.A. Eletrodomesticos
    Inventors: Ari Koji Shimizu, Willian Harley Garcia, Cláudia Alquezar Facca, Rogério Ferreira Negrão
  • Patent number: 6693268
    Abstract: An auto feedback and photo attenuation structure of a vertical cavity surface emitting laser (VCSEL) includes a VCSEL combined with a monitor photodetector (MPD). The thickness of the absorbing layer of the MPD may be adjusted, so that when output light of different wavelengths passes through the MPD, a portion of light may be absorbed by the absorbing layer to function as a feedback path of an auto power control, and a portion of light may penetrate through the absorbing layer, and may satisfy the requirement of the eye safety class I. The thickness of the absorbing layer of the MPD may be controlled precisely, thereby increasing the quality of products and decreasing cost of fabrication.
    Type: Grant
    Filed: September 24, 2001
    Date of Patent: February 17, 2004
    Assignee: Coretek Opto Corporation
    Inventor: Cheng-Bin Wang
  • Patent number: 6693269
    Abstract: A photomultiplier which detects feeble light emitted by the irradiation of excitation light on an image carrier carrying an image related to a living organism has an integration circuit is DC-coupled with a photomultiplier to convert a current signal output from the photomultiplier, to a voltage signal. The voltage signal converted by the integration circuit is logarithmically compressed with a logarithmic conversion circuit. An offset compensation circuit is provided for reducing an offset voltage that could occur because of charge injection in the integral action of the integration circuit.
    Type: Grant
    Filed: August 7, 2001
    Date of Patent: February 17, 2004
    Assignee: Fuji Photo Film Co., Ltd.
    Inventors: Hitoshi Shimizu, Shu Sato, Taizo Akimoto
  • Patent number: 6693270
    Abstract: A bus system which includes two or more voltage-to-current transformers, a common bus, a terminal bus coupled to a voltage source, two or more first switches, and a selection circuit. Each of the voltage-to-current transformers converts a voltage signal to a current signal. The common bus carries the current signals from the voltage-to-current transformers to an output bus. Each of the first switches has a first position where an output from one of the voltage-to-current transformers is coupled to the common bus and a second position where the output is coupled to the terminal bus. The selection circuit is coupled to each of the first switches and controls movement of each of the first switches between the first and second positions.
    Type: Grant
    Filed: October 26, 2001
    Date of Patent: February 17, 2004
    Assignee: Silicon Video, Inc.
    Inventors: Robert Iodice, Matthew Pace, Jeffrey Zarnowski
  • Patent number: 6693271
    Abstract: An object detection system employs a photo-emitter and photo-detector for synchronously detecting and processing an optical signal reflected from an object in a pinch zone of a window or door opening. A photo-emitter light signal is modulated by a modulation signal having an active phase and an inactive phase. The optical detector provides an optical detector signal that is a function of the intensity of the received light. The detected light signal is synchronously detected using a switching amplifier that multiplies the reflected modulated light signal by a first gain during the active phase and by a second gain during the inactive phase. The duration of the active and inactive phases and the first and second gains are selected such that the system gain will average to zero for ambient light when integrated over a predetermined measurement period. The synchronously detected signal is subtracted from a predetermined offset voltage, and this difference is then integrated over the measurement period.
    Type: Grant
    Filed: August 5, 2002
    Date of Patent: February 17, 2004
    Assignee: Prospects, Corp.
    Inventors: Christopher J. O'Connor, Stephen A. Hawley
  • Patent number: 6693272
    Abstract: A light path deviation detecting apparatus has a diverging element for diverging a detection target light path into two light paths, and detects light receiving position on light receiving surfaces disposed spaced light path lengths different from each other in the diverged light paths. A tilt of the detection target light path is detected from the light receiving positions detected respectively.
    Type: Grant
    Filed: March 7, 2001
    Date of Patent: February 17, 2004
    Assignee: Nikon Corporation
    Inventors: Akira Adachi, Tadashi Uchida, Mikio Aoshima
  • Patent number: 6693273
    Abstract: A system and method are disclosed for enabling the selective monitoring of various regions of an aperture having a powered closure operative therein. Each of plural, individually selectable emitters is adapted to provide a narrow beam whose angle with respect to a horizontal plane is offset from the other emitters. All of the radiated beams lie in substantially the same plane in azimuth. A controller responds to certain stimuli to selectively activate one or more of the emitters. The energy thus produced is monitored by a receiver preferably disposed within the same housing. The receiver output is analyzed by the controller to identify the presence of an obstacle in that portion of the aperture illuminated by the selected emitter(s). A variety of systems may provide input to the controller for the purpose of influencing which of the plural emitters are to be activated for object detection.
    Type: Grant
    Filed: May 2, 2000
    Date of Patent: February 17, 2004
    Assignee: Prospects, Corp.
    Inventors: Christopher J. O'Connor, Stephen A. Hawley
  • Patent number: 6693274
    Abstract: The present invention relates to a method and apparatus for dimensionally sorting a group of received articles, like fruits and vegetables, and using the determined different sizes for differentiation during the subsequent processing and handling of the articles. Generally, the size and shape of each article is determined by the degree of deflection of one or more sensor heads located along a path the article is traversing. The determined size and shape is then used to direct the article during the subsequent processing and/or handling of the article.
    Type: Grant
    Filed: October 29, 2001
    Date of Patent: February 17, 2004
    Assignee: FMC Technologies, Inc.
    Inventors: Randy Baird, Arthur L. Dean
  • Patent number: 6693275
    Abstract: A method and apparatus (16) for inspecting the thickness of conveyed blow molded containers (18) utilizes a laser source (22) for directing a laser beam (24) upwardly from the exterior of the conveyed containers toward the container bottoms so as to be reflected downwardly at both outer and inner surfaces (28, 30) of the container bottom. The downwardly reflected laser beams are detected by a detector (32) so as to measure the thickness of each container bottom along a predetermined path. The inspected blow molded containers (10) are conveyed upright and the inspection path is along a bottom (34) of the container while the containers are conveyed by a rotary wheel (40) that is driven at a constant speed.
    Type: Grant
    Filed: March 23, 2000
    Date of Patent: February 17, 2004
    Assignee: Plastipak Packaging, Inc.
    Inventors: Wilmer D. Stork, Franklin C. McGauley
  • Patent number: 6693276
    Abstract: The invention relates to a device and a method for producing, from any previously configured ion beams, precisely localized small packages of ions which all fly at the same velocity. The invention consists of damping the ions in a damping-gas filled series of apertured diaphragms (which are firstly subjected alternately to the two phases of an RF voltage and secondly to a multiphase low-frequency travelling field voltage) into the axis of the apertured diaphragm arrangement and packaging the ions in bundles which are propelled axially at the same velocity for ions of different specific masses. These ion packages, which are restricted both in an axial and a radial direction, can be used to advantage for injection into different types of mass spectrometer, both storage ion-trap mass spectrometers, such as cyclotron resonance mass spectrometers or quadrupole ion traps and, especially, for time-of-flight mass spectrometers with orthogonal injection.
    Type: Grant
    Filed: February 22, 2002
    Date of Patent: February 17, 2004
    Assignee: Bruker-Daltonik GmbH
    Inventors: Gerhard Weiss, Jochen Franzen
  • Patent number: 6693277
    Abstract: Detection of submicron scale cracks and other mechanical and chemical surface anomalies using PET. This surface technique has sufficient sensitivity to detect single voids or pits of sub-millimeter size and single cracks or fissures of millimeter size; and single cracks or fissures of millimeter-scale length, micrometer-scale depth, and nanometer-scale length, micrometer-scale depth, and nanometer-scale width. This technique can also be applied to detect surface regions of differing chemical reactivity. It may be utilized in a scanning or survey mode to simultaneously detect such mechanical or chemical features over large interior or exterior surface areas of parts as large as about 50 cm in diameter. The technique involves exposing a surface to short-lived radioactive gas for a time period, removing the excess gas to leave a partial monolayer, determining the location and shape of the cracks, voids, porous regions, etc., and calculating the width, depth, and length thereof. Detection of 0.
    Type: Grant
    Filed: January 4, 1999
    Date of Patent: February 17, 2004
    Assignee: The Regents of the University of California
    Inventors: Thomas E. Cowan, Richard H. Howell, Carlos A. Colmenares
  • Patent number: 6693278
    Abstract: In the production of semiconductors it is necessary to inspect circuit patterns on wafers. In circuits having very small details (for example, 40 nm), inspection can be carried out by means of electron beam columns, a plurality of wafers then being inspected at the same time and the signals being compared on-line. In an inspection apparatus in accordance with the invention more beam columns 1 to 7 are provided for every wafer A, B, C in order to obtain a high feed-through rate. The inspection is carried out by way of an x-y scan and the wafers are fed through according to a rectilinear movement, thus providing the possibility of scanning only the Care Area Fraction of the wafers, resulting in a high feed-through rate for the wafers in the inspection apparatus.
    Type: Grant
    Filed: December 20, 2001
    Date of Patent: February 17, 2004
    Assignee: FEI Company
    Inventors: Diederik Jan Maas, Jan Martijn Krans
  • Patent number: 6693279
    Abstract: A signal processing technique applied to the readout of two-dimensional detector arrays provides a dynamic correction mechanism for the varying offsets of the different elements of the array. The outputs of the elements are supplied to an offset correction circuit operative to compensate for the differences in the d.c. or low frequency outputs from a predetermined voltage wherein a fraction of the difference is subtracted at each successive cycle to gradually reduce the difference.
    Type: Grant
    Filed: December 13, 2001
    Date of Patent: February 17, 2004
    Assignee: InfraRed Integrated Systems Limited
    Inventors: Stephen George Porter, Graham Robert Jones, David Harry Broughton, John Fox, Bhajan Singh
  • Patent number: 6693280
    Abstract: A mid-IR spectrometer attachment performs reflection spectroscopy measurements using commercially available infinity corrected light microscopes without degrading the microscope's performance. The mid-IR spectrometer attachment, which is mounted to and supported by the visible light microscope, introduces infrared radiation into the optical path of the microscope. Radiation from the mid-IR spectrometer source is directed by a trichroic radiation director to a mid-IR objective lens affixed to the microscope nosepiece. The objective lens focuses the radiation on to a subject sample surface in order to acquire either internally or externally reflected infrared spectra by subsequently directing the sample encoded reflected mid-infrared radiation to the radiation director and then to a mid-infrared radiation detection system.
    Type: Grant
    Filed: August 3, 2001
    Date of Patent: February 17, 2004
    Assignee: Sensir Technologies, L.L.C.
    Inventors: Donald W. Sting, Robert V. Burch, John A. Reffner, Donald K. Wilks
  • Patent number: 6693281
    Abstract: Methods and apparatus involving neutron resonance radiography are used to map the elemental composition of an object. Sets of neutrons having energies within particular energy bands are directed through an object to be imaged. The attenuation of the neutrons passed through the object is detected, and that data can be used to detect explosives, weapons, drugs and other contraband.
    Type: Grant
    Filed: December 31, 2001
    Date of Patent: February 17, 2004
    Assignee: Massachusetts Institute of Technology
    Inventors: Gongyin Chen, Richard C. Lanza
  • Patent number: 6693282
    Abstract: An electron source for, for example, an electron microscope cannot exhibit a high brightness and a large beam current at the same time, because the virtual emitter dimension is enlarged by Coulomb repulsion in the electron beam in the case of a large beam current, thus reducing the brightness. In a conventional electron source switching-over could take place from a high brightness to a large beam current by varying the dimension of a beam-limiting diaphragm; however, this is objectionable because the location of such a diaphragm is not readily accessible. In accordance with the invention said switching-over can take place by arranging two lenses 26, 28 in the source, which lenses parallelize In the described circumstances the beam either directly behind the emitter 4 (large current) or directly in front of the diaphragm aperture 32 (high brightness).
    Type: Grant
    Filed: June 19, 2000
    Date of Patent: February 17, 2004
    Assignee: FEI Company
    Inventor: Peter Christiaan Tiemeijer
  • Patent number: 6693283
    Abstract: The present invention relates to a scanning System for a heavy ion gantry comprising a scanner magnet (1-2; 3-4) for a high energy ion beam used in a heavy ion cancer therapy facility having a maximal bending angle (&agr;) of about 1.5. degree; a curvature radius of about 22 m; a path length of about 0.6 m and a gap height (h) and a gap width (w) in the range of 120 mm to 150 mm. Further each scanner magnet (1-2, 3-4) comprises one glued yoke element made of steel plates having a thickness of up to 0.3 mm and being alloyed with up to 2% silicon. This yoke element has a width in the range of 300 mm to 400 mm, a height in the range of 200 mm to 250 mm and a length in the range of 500 to 600 mm. A coil for each scanner magnet (1-2; 3-4) has a number of windings in the range of 50 to 70.
    Type: Grant
    Filed: April 16, 2003
    Date of Patent: February 17, 2004
    Assignee: Gesellschaft fuer Schwerionenforschung mbH
    Inventors: Hartmut Eickhoff, Thomas Haberer, Peter Spiller, Marius Pavlovic
  • Patent number: 6693284
    Abstract: Stage apparatus are disclosed that include a table that can be driven with multiple degrees of freedom without disturbing any neighboring magnetic fields. Hence, such stage apparatus can be used in charged-particle-beam microlithography apparatus without compromising accuracy and precision of a lithography process being conducted on the substrate by the charged particle beam. From downstream to upstream, a representative stage assembly comprises a first (“lower”) stage driven by a respective linear motor along the Y-axis, a frame that can be rotated by a piezo actuator in the &thgr;Z direction, a second (upper) stage driven by a respective linear motor along the X-axis, and a table driven by multiple piezo actuators in the &thgr;X, &thgr;Y, and Z directions. A wafer table, on which a substrate can be mounted, is attached to the “upper” surface of the table. The stage assembly allows motion of the wafer table with six degrees of freedom.
    Type: Grant
    Filed: October 4, 2001
    Date of Patent: February 17, 2004
    Assignee: Nikon Corporation
    Inventor: Keiichi Tanaka
  • Patent number: 6693285
    Abstract: A new fluid interface position sensor has been developed, which is capable of optically determining the location of an interface between an upper fluid and a lower fluid, the upper fluid having a larger refractive index than a lower fluid. The sensor functions by measurement, of fluorescence excited by an optical pump beam which is confined within a fluorescent waveguide where that waveguide is in optical contact with the lower fluid, but escapes from the fluorescent waveguide where that waveguide is in optical contact with the upper fluid.
    Type: Grant
    Filed: March 20, 2002
    Date of Patent: February 17, 2004
    Assignee: Sandia Corporation
    Inventor: Jonathan D. Weiss
  • Patent number: 6693286
    Abstract: A first chopper between a laser device and a semiconductor substrate chops an excitation light at a specific frequency, and a second chopper between the first chopper and the semiconductor substrate chops the excitation light at a variable frequency higher than the first chopper. A photoluminescence light emitted by the semiconductor substrate when the semiconductor substrate is intermittently irradiated with the excitation light is introduced into a monochromator. A controller obtains the decay time constant T of the photoluminescence light from variation of the average intensity of the photoluminescence light when gradually increasing the chopping frequency of the excitation light by controlling the second chopper, and computes the life time &tgr; of the semiconductor substrate from an expression “&tgr;=T/C”, where C is a constant.
    Type: Grant
    Filed: November 19, 2002
    Date of Patent: February 17, 2004
    Assignee: Mitsubishi Materials Silicon Corporation
    Inventors: Takeshi Hasegawa, Terumi Ito, Hiroyuki Shiraki
  • Patent number: 6693287
    Abstract: A method for collecting data for use in image reconstruction of a tissue being scanned containing cancer cells comprises the steps of providing a source of laser beam; providing a biochemical marker that selectively binds to cancer cells within the tissue; directing the laser beam toward the object being scanned; orbiting the laser beam around the object; providing a plurality of sensors adapted to simultaneously detect the laser beam after passing through the object; and limiting the sensors to detect only the radiation released by the biochemical marker after having been activated by the laser beam.
    Type: Grant
    Filed: October 1, 2001
    Date of Patent: February 17, 2004
    Assignee: Imaging Diagnostic Systems, Inc.
    Inventors: Richard J. Grable, Robert H. Wake
  • Patent number: 6693288
    Abstract: A charged particle beam irradiation apparatus includes a specimen stage for holding a specimen; a specimen stage drive unit for moving the specimen stage; a detector for detecting the amount of displacement of the moved specimen stage; a charged particle beam optical unit for irradiating the specimen with a charged particle beam; an image display unit for displaying an image of the specimen, the image being formed by using charged particles or electromagnetic waves emitted from the specimen irradiated with the charged particle beam; a marker display unit for displaying a marker on each target position on an image of the specimen, on a viewscreen of the image display unit; a marker position input unit for designating reference positions on the image of the specimen; and a marker position calculation unit for calculating the position on which each marker is displayed on the image of the specimen on the viewscreen of the image display unit; wherein the position on the image of the specimen, on which each marker
    Type: Grant
    Filed: October 2, 2001
    Date of Patent: February 17, 2004
    Assignee: Hitachi, Ltd.
    Inventor: Kaneo Kageyama
  • Patent number: 6693289
    Abstract: A source magnet assembly for an ion source system of an ion implantation system. The source magnet assembly includes source magnetic poles that are operationally movable with respect to an arc chamber of the ion source system. In one example, the magnetic field produced by the source magnet is positionable in a two dimensional area. In another example, the magnetic field can be rotated. Some source magnet assemblies include plates that are slidable with respect to one another. The magnetic core is moved by moving the plates with respect to each other by a motorized force. With some assemblies, structures of the assembly are rotatable with respect to one another so that the core may be rotated around the arc chamber.
    Type: Grant
    Filed: February 7, 2000
    Date of Patent: February 17, 2004
    Assignee: NEC Electronics, Inc.
    Inventors: Marvin G. March, Stephen W. Toy
  • Patent number: 6693290
    Abstract: The present invention provides an electron beam processing device capable of preventing the adhesion of contaminants to an exposed irradiation part of an electron beam tube, particularly a window thereof, in a processing chamber, and also capable of controlling the rise in temperature of this irradiation unit, and in this electron beam processing device, the irradiation part of the electron beam tube (1) is disposed in the processing chamber (2) and irradiates an electron beam onto a substance (6) disposed in the processing chamber (2), the irradiation part is constituted by a lid part with an opening (31) for allowing the electron beam to pass therethrough and a window (4) which covers the opening (31) and has a transmission part (41) permeable to the electron beam, and a cooling block (7) is arranged in contact with a part of the irradiation part excluding the transmission part (41).
    Type: Grant
    Filed: May 11, 2001
    Date of Patent: February 17, 2004
    Assignee: Ushio Denki Kabushiki Kaisha
    Inventor: Masanori Yamaguchi
  • Patent number: 6693291
    Abstract: A method and apparatus for detecting radiation including x-ray, gamma ray, and particle radiation for radiographic imaging, and nuclear medicine and x-ray mammography in particular, and material composition analysis are described. A detection system employs fixed or configurable arrays of one or more detector modules comprising detector arrays which may be electronically manipulated through a computer system. The detection system, by providing the ability for electronic manipulation, permits adaptive imaging. Detector array configurations include familiar geometries, including slit, slot, plane, open box, and ring configurations, and customized configurations, including wearable detector arrays, that are customized to the shape of the patient. Conventional, such as attenuating, rigid geometry, and unconventional collimators, such as x-ray optic, configurable, Compton scatter modules, can be selectively employed with detector modules and radiation sources.
    Type: Grant
    Filed: June 13, 2003
    Date of Patent: February 17, 2004
    Inventors: Robert Sigurd Nelson, William Bert Nelson
  • Patent number: 6693292
    Abstract: A spot detector including a light source with a lens arranged in the path of the light from the source and a lens disposed in the path of the light reflected from the medium surface. An opaque mask is provided on the far side of the receiving lens. The opaque mask is configured with at least one slit such that the size and location in two dimensions of a single spot may be detected. A photodetector generates a voltage proportional to the amount of light impinging on its photosensitive surface, which depends upon whether or not a spot is present. According to one embodiment of he present invention, a layered mask is provided wherein the optical working distance to a given mask opening is staggered by placing it on different mask substrate layers. Accordingly, different portions of the depth of field can be resolved.
    Type: Grant
    Filed: June 30, 1999
    Date of Patent: February 17, 2004
    Assignee: Vishay Infrared Components, Inc.
    Inventor: Robert A. Lewis
  • Patent number: 6693293
    Abstract: A surface inspection apparatus is constructed of an illumination unit for irradiating a wafer with illumination radiation for inspection, and a radiation receiving unit having a CCD imaging device for detecting an image of the wafer by converging regularly reflected radiation from the wafer. The wafer surface is inspected based on the image detected by the CCD imaging device. An incident angle i and a wavelength &lgr; of the use-for-inspection illumination radiation with which the illumination unit irradiates the wafer, are set to satisfy the following conditional formula: &lgr;/(sin i+1)≦p  (1) where p is a pattern repetitive pitch.
    Type: Grant
    Filed: August 1, 2001
    Date of Patent: February 17, 2004
    Assignee: Nikon Corporation
    Inventors: Takeo Oomori, Kazuhiko Fukazawa
  • Patent number: 6693294
    Abstract: Provided are a Schottky barrier tunnel transistor (SBTT) and a method of fabricating the same. The SBTT includes a buried oxide layer formed on a base substrate layer and having a groove at its upper surface; an ultra-thin silicon-on-insulator (SOI) layer formed across the groove; an insulating layer wrapping the SOI layer on the groove; a gate formed to be wider than the groove on the insulating layer; source and drain regions each positioned at both sides of the gate, the source and drain regions formed of silicide; and a conductive layer for filling the groove. In the SBTT, the SOI layer is formed to an ultra-thin thickness to minimize the occurrence of a leakage current, and a channel in the SOI layer below the gate is completely wrapped by the gate and the conductive layer, thereby improving the operational characteristics of the SBTT.
    Type: Grant
    Filed: December 31, 2002
    Date of Patent: February 17, 2004
    Assignee: Electronics and Telecommunications Research Institute
    Inventors: Moon-Gyu Jang, Seong-Jae Lee, Woo-Seok Cheong, Won-Ju Cho, Kyoung-Wan Park
  • Patent number: 6693295
    Abstract: A light-emitting device comprising: a pair of electrodes formed on a substrate; and at least one organic compound layer containing a light-emitting layer provided between the electrodes, wherein the at least one organic compound layer comprises a host material, a layer of the host material has an energy gap of not less than 3.6 eV and an ionization potential of the host material is from 5.4 eV to 6.3 eV.
    Type: Grant
    Filed: December 21, 2001
    Date of Patent: February 17, 2004
    Assignee: Fuji Photo Film Co., Ltd.
    Inventor: Kazumi Nii
  • Patent number: 6693296
    Abstract: An OLED apparatus including a substrate, a plurality of spaced apart bottom electrodes disposed over the substrate; a plurality of spaced apart organic EL elements disposed over the spaced apart bottom electrodes and each one of the spaced apart organic EL elements extending over an edge of its corresponding spaced apart bottom electrode; and a plurality of spaced apart top electrodes with each spaced apart top electrode disposed over a substantial portion of its corresponding spaced apart organic EL element forming a device and extending into electrical contact with the next adjacent spaced apart bottom electrode so that current flows between each corresponding spaced apart bottom and top electrodes through the corresponding spaced apart organic EL element into the next spaced apart bottom and top electrodes and spaced apart organic EL elements so that a series connection of devices is provided which reduces power loss due to series resistance.
    Type: Grant
    Filed: August 7, 2002
    Date of Patent: February 17, 2004
    Assignee: Eastman Kodak Company
    Inventor: Yuan-Sheng Tyan
  • Patent number: 6693297
    Abstract: The present invention discloses a thin film transistor and a process for forming thereof by a high anisotropy etching process. A thin film transistor according to the present invention comprises a transistor element including a gate electrode, a gate insulating layer, a semiconductor layer, and source and drain electrodes; a passivation layer being deposited on the layers and having first openings for contact holes; and an interlayer insulator extending along with the passivation layer and having second openings for the contact holes, the first openings and the second openings being aligned each other over the substrate, wherein an electrical conductive layer is deposited on an inner wall of the contact hole and the inner wall is formed by the first and second openings tapered smoothly and continuously through an anisotropic etching process.
    Type: Grant
    Filed: June 18, 2001
    Date of Patent: February 17, 2004
    Assignee: International Business Machines Corporation
    Inventors: Takatoshi Tsujimura, Masatomo Takeichi, Kai R. Schleupen, Evan G. Colgan
  • Patent number: 6693298
    Abstract: High quality epitaxial layers of monocrystalline materials can be grown overlying monocrystalline substrates such as large silicon wafers by forming a compliant substrate for growing the monocrystalline layers. An accommodating buffer layer comprises a layer of monocrystalline oxide spaced apart from the silicon wafer by an amorphous interface layer of silicon oxide. The amorphous interface layer dissipates strain and permits the growth of a high quality monocrystalline oxide accommodating buffer layer. The accommodating buffer layer is lattice matched to both the underlying silicon wafer and the overlying monocrystalline material layer. A monocrystalline layer is then formed over the accommodating buffer layer, such that a lattice constant of the monocrystalline layer substantially matches the lattice constant of a subsequently grown monocrystalline film.
    Type: Grant
    Filed: July 20, 2001
    Date of Patent: February 17, 2004
    Assignee: Motorola, Inc.
    Inventors: Kurt W. Eisenbeiser, Zhiyi Yu, Ravindranath Droopad
  • Patent number: 6693299
    Abstract: In a semiconductor device using a crystalline semiconductor film on a substrate 106 having an insulating surface, impurities are locally implanted into an active region 102 to form a pinning region 104. The pinning region 104 suppresses the spread of a depletion layer from the drain side to effectively prevent the short-channel effect. Also, since a channel forming region 105 is intrinsic or substantially intrinsic, a high mobility is realized.
    Type: Grant
    Filed: July 13, 1998
    Date of Patent: February 17, 2004
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Hisashi Ohtani, Akiharu Miyanaga, Toru Mitsuki, Takeshi Fukunaga
  • Patent number: 6693300
    Abstract: A semiconductor thin film having extremely superior crystallinity and a semiconductor device using the semiconductor thin film having high performance are provided. The semiconductor thin film is manufactured in such a manner that after an amorphous semiconductor thin film is crystallized by using a catalytic element, a heat treatment is carried out in an atmosphere containing a halogen element to remove the catalytic element. The thus obtained crystalline semiconductor thin film has substantially {110} orientation. The concentration of C, N, and S remaining in the final semiconductor thin film is less than 5×1018 atoms/cm3, and the concentration of O is less than 1.5×1019 atoms/cm3.
    Type: Grant
    Filed: August 26, 2002
    Date of Patent: February 17, 2004
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Hisashi Ohtani, Shunpei Yamazaki, Jun Koyama, Yasushi Ogata, Akiharu Miyanaga
  • Patent number: 6693301
    Abstract: A display device comprising a substrate having an insulating surface; a first signal line extending over said substrate; a first bottom gate type thin film transistor having a channel region comprising crystalline silicon formed over said substrate wherein a gate of said first thin film transistor is connected to said first signal line; a second signal line extending across said first signal line; a second bottom gate type thin film transistor having a channel region comprising crystalline silicon formed over said substrate wherein agate of said second thin film transistor is electrically connected to said second signal line through at least said first thin film transistor; a voltage supply line formed over said substrate; a pixel electrode formed over said substrate wherein the pixel electrode is connected to said voltage supply line through at least said second thin film transistor.
    Type: Grant
    Filed: April 30, 2001
    Date of Patent: February 17, 2004
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventor: Yasuhiko Takemura
  • Patent number: 6693302
    Abstract: In a semiconductor light-emitting element, an underlayer is made of a high crystallinity Al-including semiconducting nitride material of which the FWHM is 90 seconds or below in full width at half maximum of an X-ray rocking curve. A light-emitting layer is made of a semiconducting nitride material including it least one element selected from the group consisting of Al, Ga and In and containing at least one element selected from rare earth metal elements. The light-emitting layer can be omitted if at least one element selected from rare earth metal elements is incorporated in the underlayer.
    Type: Grant
    Filed: December 28, 2001
    Date of Patent: February 17, 2004
    Assignee: NGK Insulators, Ltd.
    Inventors: Yuji Hori, Tomohiko Shibata, Mitsuhiro Tanaka, Osamu Oda
  • Patent number: 6693303
    Abstract: A nitride semiconductor device is composed of Group III nitride semiconductors. The device includes an active layer, and a barrier layer made from a predetermined material and provided adjacent to the active layer. The barrier layer has a greater band-gap than that of the active layer. The device also includes a barrier portion formed of the predetermined material for surrounding a threading dislocation in the active layer. The barrier portion has a vertex. The device also includes a semiconductor layer having an impurity concentration ranging from 1E16/cc to 1E17/cc in which the vertex is placed.
    Type: Grant
    Filed: June 11, 2002
    Date of Patent: February 17, 2004
    Assignees: Pioneer Corporation, Rohm Co., Ltd.
    Inventors: Hiroyuki Ota, Masayuki Sonobe, Norikazu Ito, Tetsuo Fujii
  • Patent number: 6693304
    Abstract: The optical communication module comprises a laminated lead frame composed of a plurality of lead frames that are laminated and held by a tie bar made of an insulating material, and an optical communication functional unit that is disposed on at least one layer of the lead frame. The optical communication functional unit comprises at least one of a light emitting element (LD) and a light receiving element and an optical transmission medium (optical fiber).
    Type: Grant
    Filed: July 18, 2002
    Date of Patent: February 17, 2004
    Assignee: Sumitomo Electric Industries, Ltd.
    Inventors: Hiromi Nakanishi, Yoshiki Kuhara, Takeshi Okada
  • Patent number: 6693305
    Abstract: A semiconductor device includes a plurality of diodes including a substrate of a first conductivity type biased to a reference potential, a well region of a second conductivity type formed in a surface region of the substrate, and a first diffusion region of the first conductivity type formed in a surface region of the well region, wherein the plurality of diodes have sizes of at least two kinds and are cascade-connected to each other.
    Type: Grant
    Filed: December 3, 2001
    Date of Patent: February 17, 2004
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Nobuaki Otsuka, Tomoaki Yabe
  • Patent number: 6693306
    Abstract: A structure of a light emitting diode (LED) and a method of making the same are disclosed. The present invention is suitable for the light emitting diode having the area that is larger than 100 mil2 and having the insulating substrate, and is featured in that the P electrode and the N electrode are mutually intercrossed. With the use of the present invention, the light emitted by each individual unit chip is more even; the operating voltage of the device is reduced; the cut size of the device can be enlarged arbitrarily according to the size of the unit chip; and the light emitting efficiency is increased.
    Type: Grant
    Filed: July 22, 2002
    Date of Patent: February 17, 2004
    Assignee: United Epitaxy Company, Ltd.
    Inventors: Tzer-Perng Chen, Rong-Yih Hwang, Charng-Shyang Jong, Cheng-Chung Young
  • Patent number: 6693307
    Abstract: In a light emitting element using nitride compound semiconductors, an active layer made of a mixed crystal containing In additionally contains at least Al or B as a component of the mixed crystal to improve the thermal resistance of the crystal and the reliability of the element characteristics. Thus, the semiconductor light emitting element has a sufficient lifetime and permits the emission wavelength to be freely selected from a wider wavelength range including blue, green and orange.
    Type: Grant
    Filed: November 2, 2001
    Date of Patent: February 17, 2004
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Hideto Sugawara, Koichi Nitta
  • Patent number: 6693308
    Abstract: Silicon carbide semiconductor power devices having epitaxially grown guard rings edge termination structure are provided. Forming the claimed guard rings from an epitaxially grown SiC layer avoids the traditional problems associated with implantation of guard rings, and permits the use of self aligning manufacturing techniques for making the silicon carbide semiconductor power devices.
    Type: Grant
    Filed: February 22, 2002
    Date of Patent: February 17, 2004
    Assignee: Semisouth Laboratories, LLC
    Inventors: Igor Sankin, Janna B. Dufrene
  • Patent number: 6693309
    Abstract: A mask ROM and a method for manufacturing such a mask ROM are provided. Here, the mask ROM can be effective to obtain a product that corresponds to each user's specification, where the same aluminum reticle is used even though each user uses different specification. For manufacturing the mask ROM, one of a first route and a second route is selected. The first route is for providing a second NAND circuit 26 with an input of a pulse obtained by passing a standard pulse 93 from an address transition detecting circuit through a first delay circuit 23 and an input of a fixed potential.
    Type: Grant
    Filed: June 5, 2002
    Date of Patent: February 17, 2004
    Assignee: NEC Electronics Corporation
    Inventor: Hitomi Koga
  • Patent number: 6693310
    Abstract: A pin diode is formed by a p+ collector region, an n type buffer region, an n− region and an n+ cathode region. A trench is formed from the surface of n+ cathode region through n+ cathode region to reach n− region. An insulating film is formed along an inner wall surface of trench. A gate electrode layer is formed to oppose to the sidewall of n+ cathode region with insulating film interposed. A cathode electrode is formed to be electrically connected to n+ cathode region. An anode electrode is formed to be electrically connected to p+ collector region. The n+ cathode region is formed entirely over the surface between trenches extending parallel to each other. Thus, a power semiconductor device in which gate control circuit is simplified and which has good on property can be obtained.
    Type: Grant
    Filed: May 23, 2001
    Date of Patent: February 17, 2004
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Tetsuo Takahashi, Katsumi Nakamura, Tadaharu Minato, Masana Harada
  • Patent number: 6693311
    Abstract: A wavelength selective detector having a first absorbing layer for absorbing light with a wavelength below a lower band cutoff, a second absorbing layer downstream of the first absorbing layer for absorbing light with a wavelength below an upper band cutoff, and a confinement layer situated between the first and second absorbing layers. The lower and upper band cutoffs can be set by controlling the bandgaps and/or thicknesses of the first and second absorbing layers. The wavelength selective detector of the present invention has a good out-of-band rejection, a narrow spectral responsivity, and a high in-band responsivity. In addition, the wavelength selective detector is relatively easy to manufacture using conventional integrated circuit fabrication techniques.
    Type: Grant
    Filed: June 4, 2002
    Date of Patent: February 17, 2004
    Assignee: Honeywell International Inc.
    Inventors: James K. Guenter, Ralph H. Johnson
  • Patent number: 6693312
    Abstract: A photo-optical transmitter assembly is produced in the following manner: a glass wafer is fixed onto a transparent submount and a V-shaped recess is subsequently created between optical prism elements using targeted sawcuts. A rod-shaped element with a reflective coating is inserted into the V-shaped recess. A laser beam from a semiconductor laser is thus deflected by 90° on the rod-shaped element with the reflective coating and traverses the submount.
    Type: Grant
    Filed: July 22, 2002
    Date of Patent: February 17, 2004
    Assignee: Infineon Technologies AG
    Inventors: Ralf Dietrich, Mathias Kämpf, Wolfgang Gramann, Martin Weigert
  • Patent number: 6693313
    Abstract: The invention encompasses integrated circuitry which includes a semiconductive material substrate and a first field effect transistor supported by the substrate. The first field effect transistor comprises a first transistor gate assembly which includes a first layer of conductively doped semiconductive material and only one layer of conductive nitride. The integrated circuitry further comprises a second field effect transistor supported by the substrate. The second field effect transistor comprises a second transistor gate assembly which includes a second layer of conductively doped semiconductor material and at least two layers of conductive nitride. The invention also encompasses a field effect transistor assembly which includes a channel region and an insulative material along the channel region. The transistor assembly further includes a gate stack proximate the channel region. The gate stack includes a first conductive nitride layer separated from the channel region by the insulative material.
    Type: Grant
    Filed: November 19, 2002
    Date of Patent: February 17, 2004
    Assignee: Micron Technology, Inc.
    Inventors: Fernando Gonzalez, Chandra Mouli
  • Patent number: 6693314
    Abstract: A junction field-effect transistor containing a semiconductor region with an inner region is described. In addition, a first and a second connecting region, respectively, are disposed within the semiconductor region. The first connecting region has the same conductivity type as the inner region, but in a higher doping concentration. The second connecting region has the opposite conductivity type to that of the inner region. This reduces the forward resistance while at the same time maintaining a high reverse voltage strength.
    Type: Grant
    Filed: June 22, 2001
    Date of Patent: February 17, 2004
    Assignee: SiCed Electronics Development GmbH & Co. KG
    Inventors: Heinz Mitlehner, Dietrich Stephani, Jenoe Tihanyi
  • Patent number: 6693315
    Abstract: There is provided a technique for improving the flatness at the surface of members embedded in a plurality of recesses without resulting in an increase in the time required for the manufacturing processes. According to this technique, the dummy patterns can be placed up to the area near the boundary BL between the element forming region DA and dummy region FA by placing the first dummy pattern DP1 of relatively wider area and the second dummy pattern DP2 of relatively small area in the dummy region FA. Thereby, the flatness of the surface of the silicon oxide film embedded within the isolation groove can be improved over the entire part of the dummy region FA. Moreover, an increase of the mask data can be controlled when the first dummy patterns DP1 occupy a relatively wide region among the dummy region FA.
    Type: Grant
    Filed: November 2, 2001
    Date of Patent: February 17, 2004
    Assignees: Renesas Technology Corporation, Hitachi ULSI Systems Co., Ltd.
    Inventors: Kenichi Kuroda, Kozo Watanabe, Hirohiko Yamamoto
  • Patent number: 6693316
    Abstract: A charge pump circuit includes a multiplicity of first electrodes, insulating layers, and a multiplicity of second electrodes. The multiplicity of first electrodes are formed at multiple locations within one region of the substrate, wherein the multiplicity of first electrodes are interconnected. The insulating layers are formed on/above respective substrate regions between neighboring first electrodes, each layer covering at least the respective substrate region. The multiplicity of second electrodes are formed on/above the respective insulating layers, wherein the multiplicity of second electrodes are interconnected.
    Type: Grant
    Filed: November 13, 2001
    Date of Patent: February 17, 2004
    Assignee: Rohm Co., Ltd.
    Inventors: Toshimasa Tanaka, Hironori Oku