Patents Issued in November 6, 2007
-
Patent number: 7292425Abstract: To provide a magnetic bearing device capable of reducing vibration by preventing a deterioration in the control of a rotor shaft due to a variation in the axial position of the rotor shaft, while performing positional control over the rotor shaft in a specific attitude with optimal magnetic force, and to a turbo molecular pump with the magnetic bearing device mounted thereto. A sensitivity storage section 281 stores therein a sensor sensitivity used in a sensor sensitivity adjustment. The sensitivity storage section 281 outputs the stored sensor sensitivity to a sensitivity switching section. The sensitivity switching section switches the sensor sensitivity according to the situation, and outputs the result to a sensor signal amplifier section.Type: GrantFiled: March 23, 2005Date of Patent: November 6, 2007Assignee: BOC Edwards Japan LimitedInventors: Toshiaki Kawashima, Hirotaka Namiki, Hideo Fukami
-
Patent number: 7292426Abstract: A substrate holding system having a chuck for vacuum attraction and electrostatic attraction of a substrate. The system includes a ring-like rim for carrying a substrate thereon, a plurality of first protrusions disposed inside the rim, for carrying the substrate thereon, and a plurality of second protrusions disposed inside the rim, for carrying the substrate thereon. A substrate carrying surface area of at least one first protrusion is smaller than a substrate carrying surface area of at least one second protrusion and a smallest interval between the first protrusions is smaller than a smallest interval between the second protrusions. Also included are an exhaust system for exhausting a clearance between the chuck and the substrate, an electrode for electrostatic attraction, a power supplying system for supplying power to the electrode, a measuring system for measuring a pressure in the clearance, and a control system for controlling the power supply.Type: GrantFiled: September 30, 2004Date of Patent: November 6, 2007Assignee: Canon Kabushiki KaishaInventors: Atsushi Ito, Keiji Emoto
-
Patent number: 7292427Abstract: A vacuum chuck apparatus may include chuck plate having a substantially flat chucking surface, one or more lift pins, and a lifting mechanism. The lift pins are configured to clamp a substrate at three or more locations. The lifting mechanism lifts the heads of the pins above the level of the chucking surface subsequently lowers the pins to pull the substrate to substantially conform to the chucking surface. A warped substrate may be secured to the chuck surface by raising the lift pins above the surface of chuck, securing a backside of the substrate with the lift pins at three or more locations, and lowering the lift pins to draw the substrate against the surface of the chuck so that the substrate substantially conforms to the surface of the chuck.Type: GrantFiled: October 12, 2004Date of Patent: November 6, 2007Assignee: KLA-Tencor Technologies CorporationInventors: Steven Murdoch, Timothy Blomgren
-
Patent number: 7292428Abstract: A lift pin assembly for use in a reactor for processing a workpiece includes plural lift pins extending generally parallel with a lift direction, each of the plural lift pins having a top end for supporting a workpiece and a bottom end. A lift table faces the bottom ends of the pins and is translatable in a direction generally parallel with the lift direction. A small force detector senses a force exerted by the lift pins that is sufficiently large to indicate a chucked wafer and sufficiently small to avoid dechucking a wafer. A large force detector senses a force exerted by the lift pins in a range sufficient to de-chuck the wafer.Type: GrantFiled: April 26, 2005Date of Patent: November 6, 2007Assignee: Applied Materials, Inc.Inventors: Hiroji Hanawa, Andrew Nguyen, Kenneth S. Collins, Kartik Ramaswamy, Biagio Gallo, Amir Al-Bayati
-
Patent number: 7292429Abstract: A low inductance multi-layer capacitor. The capacitor includes interleaved parallel internal electrode plates with dielectric there between. Each internal electrode plate includes two lead-out tabs and is generally T shaped. A first external electrode terminal is electrically connected to the lead-out tabs of the even internal electrode plates, and a second external electrode terminal is electrically connected to the lead-out tabs of the odd internal electrode plates. The external electrode terminals are on a common first exterior surface and a common opposing second exterior surface of the capacitor.Type: GrantFiled: January 18, 2006Date of Patent: November 6, 2007Assignee: Kemet Electronics CorporationInventors: Michael S. Randall, John Prymak, Azizuddin Tajuddin
-
Patent number: 7292430Abstract: A multi-layer chip capacitor includes a capacitor body; first and second internal electrodes alternately arranged therein and separated by dielectric layers, each of the internal electrodes having at least one opening formed at one or more sides thereof; first and second conductive vias passing through the openings and electrically connected to the first and second internal electrodes, respectively; first and second terminal electrodes of opposite polarities formed on one or more side faces of the capacitor body; and first and second lowermost electrode patterns being coplanar, each pattern including a via contact portion and a lead portion extending therefrom. The first and second lowermost electrode patterns are connected to the first and second terminal electrodes, respectively, through the respective lead portions of the lowermost patterns.Type: GrantFiled: November 15, 2005Date of Patent: November 6, 2007Assignee: Samsung Electro-Mechanics Co., Ltd.Inventors: Byoung Hwa Lee, Chang Hoon Shim, Kyong Nam Hwang, Dong Seok Park, Sang Soo Park, Min Cheol Park
-
Patent number: 7292431Abstract: The invention is an electrochemical capacitor with its electrodes made on a conducting substrate with a layer of a redox polymer of the poly[Me(R-Salen)] type deposited onto the substrate. Me is a transition metal (for example, Ni, Pd, Co, Cu, Fe), R is an electron-donating substituent (for example, CH3O—, C2H5O—, HO—, —CH3), Salen is a residue of bis(salicylaldehyde)-ethylendiamine in Schiff's base. The electrolyte comprises of an organic solvent, compounds capable of dissolving in such solvents with the resulting concentration of no less than 0.01 mol/l and dissociating with the formation of ions, which are electrochemically inactive within the range of potentials from ?3.0 V to +1.5 V (for example, salts of tetramethyl ammonium, tetrapropyl ammonium, tetrabutyl ammonium), and a dissolved metal complex [Me(R-Salen)]. The method of using the capacitor contemplates periodically alternating the connection polarity of the electrodes, causing the electrochemical characteristics of the electrodes to regenerate.Type: GrantFiled: April 4, 2005Date of Patent: November 6, 2007Assignee: Gen 3 Partners, Inc.Inventors: Alexander Mikhailovich Timonov, Sergey Anatolijevich Logvinov, Dmitriy Ivanovich Pivunov, Svetlana Viktorovna Vasiljeva, Nik Shkolnik, Sam Kogan
-
Patent number: 7292432Abstract: A solid electrolytic capacitor of the present invention includes a capacitor element having an anode element, an anode lead member projecting from the anode element, a dielectric coating formed on a surface of the anode element and a surface of the anode lead member near the anode element, a solid electrolyte layer formed on the dielectric coating, and a cathode lead layer formed on the solid electrolyte layer; and an insulating enclosure member for coating the outer periphery of the capacitor element. End faces of the dielectric coating and the solid electrolyte layer formed on the anode lead member are formed approximately flush with each other. The end faces of the dielectric coating and the solid electrolyte layer are covered with an insulating layer made of a thermoplastic insulating material.Type: GrantFiled: February 15, 2006Date of Patent: November 6, 2007Assignee: Sanyo Electric Co., Ltd.Inventors: Atsushi Furuzawa, Yoshikazu Hirata, Kohei Goto, Mitsuru Shirasaka
-
Patent number: 7292433Abstract: An adjustment assembly adjustably couples enclosures, such as a meter breaker panelboard and a load distribution panelboard, in a back-to-back configuration within a structure, such as a wall. The adjustment assembly includes a first end member at or about the top end of one of the enclosures, a second end member at or about the bottom end of the other enclosure, and at least one fastener coupling the end members together. A number of elongated apertures in at least one of the end members, such as slots and arcuate apertures, provide translational and pivotal adjustment, respectively. The fastener, which may comprise bolts and wingnuts to enable such adjustment without requiring separate tools, extends from one enclosure through at least one of the elongated apertures in the end member of the other enclosure in order to couple the enclosures together while enabling adjustment of one enclosure with respect to the other.Type: GrantFiled: October 31, 2005Date of Patent: November 6, 2007Assignee: Eaton CorporationInventors: Jeffrey L. Johnson, Syed M. Karim
-
Patent number: 7292434Abstract: A replaceable liquid crystal display back plate for portable computer includes a back plate forming part of a housing of a liquid crystal display of a portable computer and being provided on an outer surface with a flat recess; a replaceable cover plate adapted to fitly set in and cover the flat recess on the back plate; and a locking mechanism operable between a locked position, in which the replaceable cover plate is locked to the flat recess, and an unlocked position, in which the replaceable cover plate is separable from the flat recess to be replaced with another one. The replaceable cover plate is made of a transparent material, and may have a pictorial layer provided between it and the flat recess.Type: GrantFiled: February 23, 2005Date of Patent: November 6, 2007Assignee: Mitac Technology Corp.Inventor: Chin-Jui Chi
-
Patent number: 7292435Abstract: A protective device for a liquid crystal display has a protective plate, a plate holder, a holding block, a strip and a clamping device. The plate holder has a groove on a top, a flange extending backward and an abutting recess defined under the flange. The holding block combines with the plate holder and has a channel for receiving the strip. When the protective device mounts on a monitor of the liquid crystal display, the flange rests on a flat top of an outer frame of the monitor to make the abutting recess snugly combine with the outer frame. When the protective plate engages the groove and erects in front of a screen panel of the monitor, the strip ties the protective plate and the monitor together and the clamping device holds the plate and the outer frame of the monitor to keep the protective plate steady.Type: GrantFiled: December 6, 2005Date of Patent: November 6, 2007Inventor: Wang-Lung She
-
Patent number: 7292436Abstract: A heat dissipating structure for a computer host is disclosed. The heat dissipating structure is fixable to a housing of the computer host and is provided for a heat dissipating fan for dissipating heat. The heat dissipating structure includes a fan fixing housing including a front opening and a hollow network, the fan fixing housing being a hollow frame; a plurality of first fixing portions formed in a peripheral region around the front opening of the fan fixing housing; and a plurality of second fixing portions corresponding to the first fixing portions and formed on a peripheral region of the hollow network of the fan fixing housing.Type: GrantFiled: March 30, 2006Date of Patent: November 6, 2007Assignee: Inventec CorporationInventor: Chun-Ying Yang
-
Patent number: 7292437Abstract: Computing devices, including laptop computers, desk top computers, servers and video game terminals employ microprocessors which generate considerable heat. In fact, the heat generated from microprocessors is generally considered the limiting factor in computing speed. A heat sink is provided in thermal contact with a microprocessor whereby a water barrier is applied to and proximate a socket configured within the computing device's motherboard for preventing water of condensation from contacting areas covered by the water barrier.Type: GrantFiled: January 10, 2005Date of Patent: November 6, 2007Inventor: Alan Mark Cohen
-
Patent number: 7292438Abstract: A liquid-cooling heat dissipation module. The liquid-cooling heat dissipation module circularly dissipates heat from a heat source. The liquid-cooling heat dissipation module includes a fan, a pump, a heat sink, and a guide member. The pump is attached to the fan and driven by the fan. The heat sink is coupled to the fan, and has an opening for receiving the pump. A guide member is disposed in the opening of the heat sink and communicates with the pump. The guide member has a through hole and a guide passage formed on the surface of the guide member. Power provided by the fan, the working fluid in the liquid-cooling heat dissipation module circulates through the through hole, the pump and the guide passage to dissipate heat.Type: GrantFiled: July 27, 2005Date of Patent: November 6, 2007Assignee: Delta Electronics, Inc.Inventors: Lee-Long Chen, Chien-Hsiung Huang, Yu-Hsien Lin, Chin-Ming Chen
-
Patent number: 7292439Abstract: According to an embodiment of the present invention, a thermal management system for an electronic assembly includes an electronic component coupled to a substrate, the substrate coupled to a coldplate, a spring member disposed between and engaging both the electronic component and the coldplate, and a heat transfer element disposed within a chamber formed by the spring member.Type: GrantFiled: January 19, 2005Date of Patent: November 6, 2007Assignee: Raytheon CompanyInventors: James S. Wilson, Michael A. Moore
-
Patent number: 7292440Abstract: A plasma display device entirely distributes the temperature of a heat generator, and improves the detachability of a heat dissipating sheet and coherence with the heat generator. The plasma display device includes a plasma display panel for displaying an image, a chassis base disposed to face the plasma display panel, and a heat dissipating sheet disposed between the plasma display panel and the chassis base and including a resin material and carbon fibers fixed in the resin material. Preferably, the carbon fibers are intensively impregnated in a center portion of the resin material toward the display panel, and are arranged at least in one direction parallel to the display panel, or in different directions with respect to each other and separated from each other by the resin material.Type: GrantFiled: August 31, 2004Date of Patent: November 6, 2007Assignee: Samsung SDI Co., Ltd.Inventors: In-Soo Cho, Sok-San Kim
-
Patent number: 7292441Abstract: A thermal solution for a portable electronic device, which is positioned between a heat source and another component of the electronic device, where the thermal solution facilitates heat dissipation from the heat source while shielding the second component from the heat generated by the heat source.Type: GrantFiled: July 7, 2005Date of Patent: November 6, 2007Assignee: Advanced Energy Technology Inc.Inventors: Martin David Smalc, Gary D. Shives, Robert Anderson Reynolds, III
-
Patent number: 7292442Abstract: A heat sink clip and an assembly incorporating such clip are provide. The heat sink clip comprises: a body, an actuating member and a movable fastener. The body has a securing portion formed at one end thereof. The actuating member has a hinge portion thereof. The movable fastener is secured to the hinge portion of the actuating member. The actuating member is pivotably mounted to the securing portion of the body in a direction substantially perpendicular to the body, and the actuating member is turnable relative to the body between a locked position and an unlocked position.Type: GrantFiled: April 24, 2006Date of Patent: November 6, 2007Assignees: Fu Zhun Precision Industry (Shen Zhen) Co., Ltd., Foxconn Technology Co., Ltd.Inventors: Fang-Xiang Yu, Yeu-Lih Lin, Ming Yang
-
Patent number: 7292443Abstract: A heat sink mounting assembly includes a retention module having a bottom and a pair of posts extending from the bottom. A heat sink is located on the bottom of the retention module. A clip spans across the heat sink and includes a clamping member having first and second legs releasably engaging with the posts of the retention module, and a pressing member having a first end thereof pivotably engaging with a first end of the clamping member. The pressing member has a pressing portion pressing the heat sink toward the retention module when a second end of the pressing member is depressed to engage with a pair of ears formed at a second end of the clamping member.Type: GrantFiled: October 3, 2006Date of Patent: November 6, 2007Assignees: Fu Zhun Precision Industry (Shen Zhen) Co., Ltd., Foxconn Technology Co., Ltd.Inventors: Cheng-Tien Lai, Cui-Jun Lu, Song-Shui Liu
-
Patent number: 7292444Abstract: A heat sink fastener includes a main body, a piercing member and a wire clip. The main body includes a pressing part for holding a heat sink in contact with a heat-generating component, an engaging part and a latching leg; the engaging part and the latching leg are disposed at opposing ends of the pressing part. The piercing member includes a piercing body extending through the engaging part of the main body and a tubular part and a hook. The wire clip includes a pivot shaft pivotally connected with the tubular part of the piercing member, a locking leg for fastening to the main body and a lever interconnecting the pivot shaft and the locking leg together, wherein the lever is rotatable to change the positional relationship between the piercing member and the engaging part of the main body.Type: GrantFiled: October 3, 2006Date of Patent: November 6, 2007Assignees: Fu Zhun Precision Industry (Shen Zhen) Co., Ltd., Foxconn Technology Co., Ltd.Inventors: Bo-Yong Yang, Yong-Dong Chen, Guang Yu, Shih-Hsun Wung, Chun-Chi Chen
-
Patent number: 7292445Abstract: An active integrated rectifier and regulator module for providing charging current to a battery of an automobile including a stacked structure comprising two lead frames disposed above on another, the module including a voltage regulator and elements for active rectification of alternating current from a stator.Type: GrantFiled: February 25, 2004Date of Patent: November 6, 2007Assignee: Siliconix Technology C.V.-IRInventor: Mario Linke
-
Patent number: 7292446Abstract: A Plasma Display Panel (PDP) includes: a panel adapted to display images using a plasma discharge; a chassis base attached to the panel and adapted to support the panel; a circuit board adapted to supply signals to electrodes of the panel; a signal transmission unit adapted to electrically connect the electrodes of the panel to the circuit board, and including at least one circuit device; and a chassis bed adapted to support the signal transmission unit. The chassis bed includes at least a first ventilation hole adapted to facilitate air flow therethrough to remove heat generated by the at least one circuit device. The heat generated by the circuit device can be dissipated effectively, and overheating of the circuit board is prevented, and the circuit board can operate stably.Type: GrantFiled: December 7, 2005Date of Patent: November 6, 2007Assignee: Samsung SDI Co., Ltd.Inventor: Sung-Won Bae
-
Patent number: 7292447Abstract: A back plate assembly (100) for a board (200) comprises a back plate (110) abutting against a side of the board and a plurality of posts (120). Each post comprises at least one latching portion (1206) formed thereon. After the latching portions have passed through the back plate and the board, the latching portions are blocked by one of the board and the back plate to secure the back plate to the board. Screws (330) are used to extend through a heat sink (300) to threadedly engage with the posts thereby mounting the heat sink to the board. Thus, the heat sink can have an intimate contact with an electronic component (210) mounted on the board.Type: GrantFiled: March 22, 2006Date of Patent: November 6, 2007Assignees: Fu Zhun Precision Industry (Shen Zhen) Co. Ltd., Foxconn Technology Co., Ltd.Inventors: Wan-Lin Xia, Tao Li, Jun Long
-
Patent number: 7292448Abstract: A circuit substrate includes a first rigid substrate having a plurality of land portions located at a predetermined interval on one surface, a second rigid substrate having a plurality of second land portions located at a predetermined interval on one surface and a flexible wiring board sandwiched by the first and second rigid substrates and which has a plurality of third land portions corresponding to the first land portions on one surface and a plurality of fourth land portions corresponding to the second land portions on the other surface. In this circuit substrate, the second and fourth land portions are displaced from each other relative to the first and third land portions and at least part of the first and third land portions and at least part of the second and fourth land portions are electrically connected to each other, respectively.Type: GrantFiled: August 24, 2006Date of Patent: November 6, 2007Assignee: Sony CorporationInventors: Toshichika Urushibara, Koji Shiozawa, Masakazu Okabe, Yukiko Hyodo, Yusuke Masuda, Tadayuki Miyamoto
-
Patent number: 7292449Abstract: A digital apparatus having a cable comprising a plurality of high-speed and low-speed signal carrying conductors, the conductors carrying the low-speed signals are bypassed to a signal ground with selected values of capacitance so as to become virtual signal ground return conductors for the high-speed signal conductors. The selected values of capacitance have a lower impedance then the characteristic impedance of the conductors in the cable. The cable may be a multi conductor cable, a ribbon cable, a flex cable, a twisted pair cable, etc. In a similar fashion, signal conductors on a printed circuit board, not having a separate ground plane layer, may create virtual signal ground returns from the low-speed signal carrying conductors that are proximate to the high-speed signal carrying conductors for reduction of radiated electromagnetic radio frequency interference.Type: GrantFiled: December 13, 2004Date of Patent: November 6, 2007Assignee: Lexmark International, Inc.Inventors: Paul Kevin Hall, Keith Bryan Hardin, Brandon Robert Shields
-
Patent number: 7292450Abstract: A printed wiring assembly comprising, a printed wiring board, a ball grid array coupled to the printed wiring board, and a high density surface mount part array disposed on the printed wiring board.Type: GrantFiled: January 31, 2006Date of Patent: November 6, 2007Assignee: Microsoft CorporationInventors: Jelena H. Larsen, Chee Kiong Fong, Peter Anthony Atkinson, Raul Rodriguez-Montanez
-
Patent number: 7292451Abstract: Power converters such as power modules configured as inverters employ modularized approaches. In some aspects, semiconductor devices are thermally coupled directly to thermally conductive substrates without intervening dielectric or insulative structures. Additionally, or alternatively, semiconductor devices are thermally coupled to thermally conductive substrates with relatively large surface areas before heat transferred from the semiconductor devices encounters a dielectric or electrically insulating structure with correspondingly high thermal impedance.Type: GrantFiled: December 13, 2004Date of Patent: November 6, 2007Assignee: Siemens VDO Automotive CorporationInventors: Pablo Rodriguez, Douglas K. Maly, Ajay V. Patwardhan, Kanghua Chen, Sayeed Ahmed, Gerardo Jimenez, Fred Flett
-
Patent number: 7292452Abstract: A component having reference layer openings to contribute towards achieving a differential impedance in a circuit, is described herein.Type: GrantFiled: June 10, 2004Date of Patent: November 6, 2007Assignee: Intel CorporationInventors: Kok-Siang Ng, King Keong Wong, Michael E. Ryan
-
Patent number: 7292453Abstract: A mounted printed wiring board is disclosed that will allow sensors to be installed in optimal positions thereon with the same time and effort needed for one board, and allow the same to be inexpensively manufactured with a simple process. A single board unit includes first and second board portions having a break line interposed therebetween. Sensors and mounted components that are shorter than the sensors are mounted on the first board portion, connectors and mounted components that are taller than the sensors are mounted on the second board portion, and jumper wires are mounted across the first and second board portions. The board unit is then folded in two with the break line so that the mounting surfaces face outward, and the first and second board portions are fixed with spacers.Type: GrantFiled: October 14, 2004Date of Patent: November 6, 2007Assignee: Kyocera Mita CorporationInventor: Kentarou Naruse
-
Patent number: 7292454Abstract: A system and method for minimizing the effects of non-uniform dielectric properties includes forming traces on printed circuit boards (PCB) where the fibers within the printed circuit boards are non-rectangular with respect to the rectangular edges of the circuit board. The orientation of the traces with respect to the fibers substantially minimizes the effects of non-uniform dielectric properties of the PCB.Type: GrantFiled: December 3, 2004Date of Patent: November 6, 2007Assignee: Dell Products L.P.Inventors: Sandor Tibor Farkas, Jimmy D. Pike
-
Patent number: 7292455Abstract: The present invention provides a multilayered power supply line suitable for use in a semiconductor integrated circuit and a layout method thereof. In the multilayered power supply line (10) for the semiconductor integrated circuit, a top metal (12) and a second metal (14) are electrically connected to each other by through holes (18). Further, a capacitor metal (16) is electrically connected to the top metal (12) by through holes (20) to thereby make the top metal (12), the second metal (14) and the capacitor metal (16) identical in potential to one another, whereby the multilayered power supply line functions as a power supply line based on normal wiring metals without functioning as a capacitor. It is thus possible to supply power with reduced impedance.Type: GrantFiled: March 31, 2004Date of Patent: November 6, 2007Assignee: Oki Electric Industry Co., Ltd.Inventors: Seiichiro Sasaki, Kouji Morita
-
Patent number: 7292456Abstract: A control assembly controls removal of a circuit board from a chassis. The control assembly includes a support member configured to fasten to the circuit board, and a handle pivotally attached to the support member. The handle is configured to swing from an opened position to a closed position relative to the support member during installation of the circuit board within the chassis, and from the closed position to the opened position during removal of the circuit board from the chassis. The control assembly further includes a button configured to move between a biased position and a depressed position relative to the support member. The button is further configured to (i) inhibit removal of the circuit board from the chassis when the button is in the biased position, and (ii) enable removal of the circuit board from the chassis when the button is in the depressed position.Type: GrantFiled: November 15, 2005Date of Patent: November 6, 2007Assignee: Cisco Technology, Inc.Inventors: Jimmy Leung, Mandy Lam, Toan Nguyen, Saeed Seyed, Michael Chern
-
Patent number: 7292457Abstract: A folding latching mechanism and related structure. An embodiment of the folding latching mechanism includes a latch member having a claw-shaped clasp disposed proximate to a pivot member that enables a pivotal coupling about a first pivot axis. A lever arm is pivotally-coupled to the latch member about a second pivot (fold) axis that is perpendicular to the first pivot axis of the latch member. During use, the latch member is rotated about its first pivot axis via the lever arm in an extended position, whereby the latching member is securely coupled to a frame member via its clasp. The lever arm is then rotated about its fold axis and secured in place. The folding latching mechanism may be employed on an Advanced Telecom Computing Architecture (ATCA) board hosting one or more Advanced Mezzanine Card (AdvancedMC) modules, wherein the mechanism does not interfere with the I/O port interfaces for the modules.Type: GrantFiled: March 31, 2005Date of Patent: November 6, 2007Assignee: Intel CorporationInventors: Steven DeNies, William Handley, Mark D. Summers
-
Patent number: 7292458Abstract: A circuit board assembly includes a motherboard defining a motherboard plane, and a daughter board defining a daughter board plane which is substantially parallel to the motherboard plane. The motherboard and the daughter board electrically connect to each other through a set of circuit board connectors. The circuit board assembly further includes a set of edge clips. Each edge clip extends outwardly from the daughter board along the daughter board plane and is configured to operate as a mounting platform through which to physically secure the daughter board to the motherboard.Type: GrantFiled: December 1, 2005Date of Patent: November 6, 2007Assignee: Cisco Technology, Inc.Inventors: Michael Chern, Saeed Seyed, Phillip Ting
-
Patent number: 7292459Abstract: A handheld communication apparatus includes a metallic insert molding member, a circuit board and a shielding frame. The metallic insert molding member includes a metal plate. An electronic component is mounted on the circuit board. The shielding frame defines opposite first and second openings, wherein the shielding frame is bonded to the metal plate of the metallic insert molding member at the first opening, thereby forming a shielding case. The electronic component on the circuit board is inserted into the second opening of the shielding frame to be shielded by the shielding case.Type: GrantFiled: May 31, 2006Date of Patent: November 6, 2007Assignee: Arima Communications Corp.Inventor: Szu Wei Wang
-
Patent number: 7292460Abstract: A converter circuit is specified for switching a large number of switching voltage levels, which has n first switching groups for each phase, with the n-th first switching group being formed by a first power semiconductor switch and a second power semiconductor switch, and with the first first switching group to the-th switching group each being formed by a first power semiconductor switch and a second power semiconductor switch and by a capacitor, which is connected to the first and second power semiconductor switches, with each of the n first switching groups being connected in series to the respectively adjacent first switching group, and with the first and the second power semiconductor switches in the first first switching group being connected to one another.Type: GrantFiled: November 20, 2003Date of Patent: November 6, 2007Assignee: ABB Research Ltd.Inventors: Peter Barbosa, Jürgen Steinke, Peter Steimer, Luc Meysenc, Thierry Meynard
-
Patent number: 7292461Abstract: A switching power source apparatus has a switching element being connected with a DC power source through a primary winding of a transformer in which parasitic capacitance exists between terminals of the switching element. A voltage V4 of free oscillation appears at a gate of the switching element after a flyback period due to the parasitic capacitance. Based on the free oscillation voltage, the switching power source apparatus detects timing synchronized with a period of the free oscillation, outputs a trigger signal V10 based on the detected timing, uses the trigger signal to estimate bottom timing when the free oscillation reaches a bottom level the second time, outputs an ON start signal V9 synchronized with the bottom timing, uses the ON start signal to output an ON control signal to turn on the switching element, and drives the switching element in response to the ON control signal.Type: GrantFiled: October 16, 2006Date of Patent: November 6, 2007Assignee: Sanken Electric Co., Ltd.Inventor: Masaru Nakamura
-
Patent number: 7292462Abstract: A DC/DC converter that is small, light, highly efficient, and inexpensive are provided which includes a DC power supply input section, a first and second capacitor connected in series, and an output section connected to the series connected first and second capacitors, a switching device that switches a plurality of switches which incorporate a configuration for connecting a power supply of the DC power supply input section, to the first capacitor and the second capacitor, and a switching control device that controls ON/OFF switching of the respective switches in the switching device in accordance with an operation mode.Type: GrantFiled: February 2, 2005Date of Patent: November 6, 2007Assignee: Honda Motor Co., Ltd.Inventors: Yasuto Watanabe, Mitsuaki Hirakawa, Kouya Kimura
-
Patent number: 7292463Abstract: A semiconductor switch circuit is connected to a primary winding of a transformer having a secondary winding connected to a load. The semiconductor switch circuit has switches controlled by PWM to provide a controlled constant current. In the inventive inverter, constant current control is performed by PWM operation of the switches of the semiconductor switch circuit. The inverter cuts off electricity to the control circuit when putting the control circuit into a standby state if a run-stop signal gains a logical stop-state. At the same time as the run-stop signal gaining the stop-state, switch drive signals enabling the switches of the semiconductor switch circuit are turned off. Thus, over-current can be prevented from flowing in the load when the control circuit is put into the standby state.Type: GrantFiled: June 28, 2006Date of Patent: November 6, 2007Assignee: Rohm Co., Ltd.Inventor: Kenichi Fukumoto
-
Patent number: 7292464Abstract: A ferroelectric memory device is characterized in having a first n-type MOS transistor having a gate connected to a word line, a ferroelectric capacitor having one end connected through the first n-type MOS transistor to a bit line, and another end connected to a plate line, and a plate line control circuit that drives the plate line, wherein the plate line control circuit includes an inverter having a first p-type MOS transistor and a second n-type MOS transistor, and an output terminal connected to the plate line, a voltage source that supplies a voltage to be supplied to a source of the first p-type MOS transistor, and a third n-type MOS transistor provided between the voltage source and the output terminal.Type: GrantFiled: June 16, 2005Date of Patent: November 6, 2007Assignee: Seiko Epson CorporationInventor: Kenya Watanabe
-
Patent number: 7292465Abstract: A ferroelectric random access memory device, includes at least one bit line extending in a first direction; a plurality of first active regions, arranged in the first direction a predetermined distance from each other on one side of the bit line, each being connected to the bit line and a first ferroelectric capacitor; and a plurality of second active regions, arranged in the first direction a predetermined distance from each other on the other side of the bit line, each being connected to the bit line and a second ferroelectric capacitor, the first active regions partly overlapping, in the first direction, the second active regions respectively neighboring the first active regions, and being arranged a predetermined distance from the respective neighboring second active regions in a second direction crossing the first direction.Type: GrantFiled: June 7, 2006Date of Patent: November 6, 2007Assignee: Seiko Epson CorporationInventor: Yasunori Koide
-
Patent number: 7292466Abstract: A memory includes a first resistive memory cell, a current source configured to provide an input current indicating a desired resistance level for the first memory cell, and a current mirror that mirrors the input current to provide an output current. The memory includes a first switching circuit configured to pass the output current to the first memory cell with the first memory cell not at the desired resistance level, and block the output current from the first memory cell in response to the first memory cell achieving the desired resistance level.Type: GrantFiled: January 3, 2006Date of Patent: November 6, 2007Assignee: Infineon Technologies AGInventor: Thomas Nirschl
-
Patent number: 7292467Abstract: A memory device includes a memory cell, a reference structure, and a sensing device. The memory cell includes an MR element and a pass transistor. The pass transistor, reference structure, and sensing device are connected to an input node. The logic state of the memory cell can be detected by a read operation that includes the sensing device sensing the voltage at the input node. The voltage at the input node will vary depending on the state of the MR element. The reference structure provides a voltage drop allowing for an increased read voltage to the memory cell. This in turn can provide for decreased read times. In some embodiments, the MR element can include a magnetic tunneling junction sandwiched between electrode layers. One of the electrode layers can be connected to a bit line, the other can be connected to the pass transistor.Type: GrantFiled: April 22, 2005Date of Patent: November 6, 2007Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventor: Jhon Jhy Liaw
-
Patent number: 7292468Abstract: A magnetic random access memory includes a first magnetoresistive element which is used as a memory element, and a second magnetoresistive element which is used as a current load of a read bias circuit.Type: GrantFiled: August 2, 2005Date of Patent: November 6, 2007Assignee: Kabushiki Kaisha ToshibaInventor: Yoshihisa Iwata
-
Patent number: 7292469Abstract: A method of programming a non-volatile memory device including a transition metal oxide layer includes applying a first electric pulse to the transition metal oxide layer for a first period to reduce a resistance of the transition metal oxide layer and applying a second electric pulse to the transition metal oxide layer for a second period, longer than the first period, to increase the resistance of the transition metal oxide layer. Related devices are also disclosed.Type: GrantFiled: November 18, 2005Date of Patent: November 6, 2007Assignee: Samsung Electronics Co., Ltd.Inventors: Moon-Sook Lee, In-Gyu Baek
-
Patent number: 7292470Abstract: An end of a selected bit line in a selected column is electrically coupled to an end of a corresponding current return line by one of first and second write column select gates, which are selectively turned on in response to results of column selection. A data write circuit sets the other end of the selected bit line and the other end of the current return line to one and the other of a power supply voltage and a ground voltage in accordance with a level of write data via one of first and second data buses and an inverted data bus, respectively.Type: GrantFiled: December 4, 2006Date of Patent: November 6, 2007Assignee: Renesas Technology Corp.Inventor: Hideto Hidaka
-
Patent number: 7292471Abstract: By first readout, the current input from a selected cell is converted by a preamplifier and a VCO into pulses of a frequency inversely proportionate to the current value, and the number of the pulses within a preset time interval is counted by a counter 5 so as to be stored in a readout value register. A selected cell is then written to one of two storage states, and second readout is then carried out. The storage state of the selected cell is verified by comparing a count value of the counter for the second readout, a count value for the first readout as stored in a readout value register and a reference value stored in a reference value register to one another. By the use of the VCO, the integrating capacitor for the current or the generation of a reference pulse may be eliminated.Type: GrantFiled: March 20, 2006Date of Patent: November 6, 2007Assignee: NEC CorporationInventors: Noboru Sakimura, Takeshi Honda, Tadahiko Sugibayashi
-
Patent number: 7292472Abstract: A memory device according to the present invention includes a memory cell array including a plurality of memory cells arranged therein, the memory cell array being divided into a plurality of regions each selectable independently of the others as an object for data writing, and further includes a plurality of current supply sections provided correspondingly to the plurality of regions, respectively. Each of the plurality of current supply sections, when a corresponding region of the plurality of regions is selected as an object for data writing, is activated to supply a data write current to the corresponding region and each of the plurality of regions includes a plurality of write select lines provided correspondingly to predetermined units of the plurality of memory cells. The plurality of write select lines are selectively supplied with the data write current from a corresponding one of the plurality of current supply sections.Type: GrantFiled: November 22, 2006Date of Patent: November 6, 2007Assignee: Renesas Technology Corp.Inventor: Hideto Hidaka
-
Patent number: 7292473Abstract: A non-volatile memory (NVM) that can be optimized for data retention or endurance is divided into portions that are optimized for one or the other or potentially some other storage characteristic. For the portion allotted for data retention, the memory cells are erased to a relatively greater extent. For the portion allotted for high endurance, the memory cells are erased to a relatively lesser extent. This is conveniently achieved by simply raising the level of the current reference that is used to determine if a cell has been sufficiently erased for the high data retention cells. The higher endurance cells thus will typically receive fewer erase pulses than the memory cells for high data retention. The reduced erasing requirement for the high endurance cells results in overall faster erasing and less stress on the high endurance cells as well as on the circuitry that generates the high erase voltages.Type: GrantFiled: September 7, 2005Date of Patent: November 6, 2007Assignee: Freescale Semiconductor, Inc.Inventors: Martin L. Niset, Andrew W. Hardell
-
Patent number: 7292474Abstract: A semiconductor integrated circuit device has a memory cell array including a plurality of pages and a page buffer. Each of the plurality of pages includes a user region and a page flag region in which page flag data indicative of a current state of a corresponding page is written. The page buffer includes a user page buffer section which temporarily holds the user data and a page flag page buffer section which temporarily holds the page flag data. The page flag data is recorded in the form of two levels in the non-volatile semiconductor memory cell arranged in the page flag region. The user data is recorded in the form of multilevel in the non-volatile semiconductor memory cell arranged in the user region.Type: GrantFiled: May 31, 2006Date of Patent: November 6, 2007Assignee: Kabushiki Kaisha ToshibaInventors: Naohisa Iino, Fumitaka Arai