Abstract: A method of forming a filled via with an optically transmissive material and a resulting product. The method comprises drilling a via in a panel and filling the via with an optically transmissive material. The method can also be used to create a light transmissive section of a housing. A light source directed to one side of the via is seen through the optically transmissive material so as to be visible to a viewer viewing a surface at the second side of the via.

Abstract: The pendent style luminaire split design incorporates generally a housing split into sections, a first section of the housing is attached to the top member located at the mounting arm while the second section of the housing is attached to the lens frame. The second section swings about a hinge between the first section and the lens frame. In the open position of the luminaire, the design allows for the convenience of “hands free” maintenance of both the lamp and the electrical component assembly of the luminaire at the same time. A sealed optical chamber is created, since neither the lens nor lens frame is needed to be separated from the reflector to gain access to the lamp.

Abstract: The invention relates to an electro-luminescent light element, in particular to a foil-shaped light element with a light emitting surface (34) for emitting light from a light pigment layer (16) arranged on a carrier (12). According to the invention the light element (10) is provided with an electrically conductive cover (30).

Abstract: By a convex lens arranged on an optical axis extending in a front and rear direction of a lamp unit, direct light from a light emitting element arranged rearward of the convex lens is deflected to emit so that the light is made to be parallel light in a vertical face and diffused light toward left and right sides in a horizontal face. An entire region of a left side lens region of the convex lens is constituted as upper deflecting regions for deflecting light to a direction upward with respect to a direction of light of a right side lens region. Light emitted to the front side by transmitting the respective upper deflecting regions is made to be light directed upward from light emitted from the right side lens region to thereby form a laterally elongated light distribution pattern in which an upper end edge of a portion of being disposed on a left side relative to the optical axis is stepped up from an upper end edge of a portion thereof disposed on a right side.

Abstract: A motor vehicle headlight that is able to emit a light beam on a roughly longitudinal axis and that comprises a housing that has a rear bottom and inside which there are arranged; at least one light source that is mounted fixedly in the housing; and at least one reflector that is mounted so as to pivot about a transverse axis with respect to the housing; wherein the headlight comprises an attached intermediate support element that is fixed inside the housing and on which the reflector is pivotally mounted.

Abstract: A lamp unit includes a semiconductor light-emitting element portion, a reflector that radiates light from a light source forward of the lamp, and a driving portion that moves relative positions of the semiconductor light-emitting element portion and the reflector. The semiconductor light-emitting element portion is provided with a light-emitting surface whose outer peripheral shape is generally oblong, the reflector is provided with a parabolic surface that has a focus line in the horizontal direction, and the driving portion is configured such that rotation is possible within a horizontal plane of the light-emitting surface from a first position where a short side of the light-emitting surface is generally parallel to the focus line up to a second position where a long side of the light-emitting surface is generally parallel to the focus line.

Abstract: A vehicle headlamp includes a light source bulb for emitting light, a base member fixed with a light source bulb, a reflector for reflecting light emitted from the light source bulb, a projecting lens for projecting light reflected by the reflector to a front side along an optical axis Ax, and a shade for blocking a portion of light directed from the reflector to the projecting lens. The vehicle headlamp displaces the reflector from a first position to a second position which is upward and rearward from the base member. The vehicle headlamp can facilitate obtaining a light distribution suitable for driving on a motorway or in wet conditions.

Abstract: A light emitting diode arrangement, comprising at least one high power light emitting diode (34), the high power light emitting diode (34) being mounted onto a flexible circuit board (10). A method is also disclosed for producing such a light emitting diode arrangement.

Abstract: A fused fiber array optics is provided as a LED lens. The fused fiber array optics is formed by multiple fibers having a same numerical aperture arranged and fused together. Each fiber has a transparent core wrapped inside a cladding. By choosing fibers of a particular numerical aperture and using the resultant fused fiber array optics as the lens of a LED device, the manufacturer of the LED device can achieve a desired illuminating range from the LED device.

Abstract: A light source assembly (212) for providing a homogenized light beam (224) includes a first light source (234), a second light source (236), and an optical pipe (228) that defines a pipe passageway (228A). The first light source (234) generates a first light (234A) that is directed into the pipe passageway (228A) at a first region (228I). The second light source (236) generates a second light (236A) that is directed into the pipe passageway (228A) at a second region (228H) that is different than the first region (228I). The optical pipe (228) homogenizing the first light (234A) and the second light (236A). Additionally, the light source assembly (212) can include a third light source (238) that generates a third light (238A) that is directed into the optical pipe (228) at a third region (228G) that is different than the first region (228I) and the second region (228H).

Abstract: A load control device comprises an actuator for controlling a connected lighting load and a plurality of status indicators for displaying the intensity of the lighting load as feedback to a user. One or more of the status indicators are illuminated to a bright active level when the actuator is actuated. After a predetermined amount of time, the intensity of the status indicators is faded one of two dim levels depending upon whether the lighting load is on or off. Accordingly, the load control device will “wake up”, i.e., the status indicators will illuminate to the bright active level, upon another actuation of the actuator.

Abstract: A hot spot filter for a light guide is created by taking an image of the light output pattern of an illuminated light guide. The hot spot filter may be a film, a layer, or an additional liquid crystal display dedicated to attenuating bright spots from the light guide. The hot spot filter may be incorporated into the image display by adjusting the grey scale of individual pixels to provide sufficient compensation.

Abstract: The invention relates to an illumination system (1) for illuminating display devices, comprising: a light emission window (2) for emitting light in the direction of a display device, a reflector (5) for reflecting light, at least a part of which reflector is arranged substantially parallel to and opposite to the light emission window, and a plurality of elongated light sources (6, 9) arranged between said light emission window and said reflector, wherein the surface of each light source is provided with coatings (11) that define multiple elongated light emitting apertures (12), which span each an angle x whose bisector (13) is directed towards the reflectors. The invention further relates to a display device comprising said illumination system.

Abstract: A backlight assembly including a universal lamp unit with a common connecting structure coupling a lamp and an inverter through a lamp socket and a conductor when connecting the lamp and the inverter with each other, a liquid crystal display including the same and a method of manufacturing thereof. Backlight assembly includes a mold frame including a receiving space therein and a lamp unit disposed in the receiving space of the mold frame. The lamp unit includes at least one lamp, and at least one pair of lamp sockets disposed on the mold frame. The pair of lamp sockets secure the lamp and apply electric power to the lamp.

Abstract: A backlight module includes a light guide plate, at least one point light source, and an optical film. The light guide plate has a light outputting surface and a light reflecting surface opposing to the light outputting surface. A plurality of dots are indented on the light outputting surface, and a plurality of grooves are formed parallel to each other on the light reflecting surface. The propagation directions of most of the emitting light rays of the point light source are substantially parallel to the direction of the grooves. The optical film is provided with refraction elements arranged in a direction perpendicular to the direction of the grooves.

Abstract: A cables fixing apparatus for backlight a module includes a rear frame having a leading-out area in a side edge with a plurality of protrusions thereof; a lamp cable; and a mold frame having a plurality of crooks, wherein these crooks face to any one of these protrusions so as to define a cable groove to fix the lamp cable. These protrusions of the rear frame and these crooks of the mold frame are utilized to arrange and fix the lamp cable in the cable groove to avoid the fracturing problem of solder joint of lamp and prevent the interference as assembling because of the displacement issue of the lamp cable.

Abstract: A backlight unit includes a lamp, a bottom frame disposed under the lamp, the bottom frame having a first hole corresponding to the lamp, a light guide holder inserted into the first hole, and a light emitting diode disposed under the light guide holder.

Abstract: An exemplary backlight module (200) includes a light source (250), and a frame (260) containing the light source therein. The frame includes an absorbing material for absorbing electromagnetic radiation generated by the light source. The frame of the backlight module installed in an LCD device (20) contains absorbing material therein, which helps to shield an LCD panel (290) of the LCD device from any electromagnetic interference may be generated by the backlight module including the light source.

Abstract: A power conversion unit and method for converting DC power. The power conversion unit includes a self-oscillating device configured to convert a DC voltage into a self-oscillating alternating current AC signal, a transformer connected to the self-oscillating device and configured to transform the self-oscillating AC signal into a transformed AC signal, and an AC-to-DC converter configured to convert the transformed AC signal into a DC signal. The method generates a self-oscillating current, transforms the self-oscillating current into a transformed AC signal, and converts the transformed AC signal into a DC signal.

Abstract: A half-bridge resonant converter includes: a primary winding; a secondary winding having a first and a second end and a central point; a first electronic switch; a second electronic switch; a first power-storage element; a second power-storage element; and a load having a first and a second end. Wherein, the first end of said the secondary winding serially connects with said the first electronic switch and the first power-storage element, and the second end of said the secondary winding serially connects with said the second electronic switch and the second power-storage element, and the first end of said the load connects simultaneously with said the first power-storage element and the second power-storage element, and the second end connects with the central point of the secondary winding.

Abstract: A switching power supply has a switching device connected via a primary winding of a transformer to DC input voltage; a circuit for rectifying voltage at a secondary winding of the transformer, and outputting an output signal; and a control circuit for controlling on/off states of the switching device. The control circuit detects a current signal generated based on a forward voltage generated at a drive winding of the transformer while the switching device is on; generates an input correction signal using the current signal, the level of the input correction signal varying in accordance with the DC input voltage; detects a signal of current flowing through the switching device; and compares the input correction signal with the signal of the current flowing through the switching device, and limits the maximum value of this current in accordance with the DC input voltage.

Abstract: An power supply circuit (2) includes a bridge rectifier circuit (22); a control circuit (23) having a switch circuit (231) and a pulse width modulation circuit (232); a high frequency transformer (24); at least one commutating and filter circuit (25); and a positive feedback circuit (29). An alternating current voltage input from an external source is converted into a high frequency direct current voltage via the bridge rectifier circuit, and the high frequency DC voltage is outputted from the power supply circuit via the switch circuit, the high frequency transformer, and the at least one commutating and filter circuit. The positive feedback circuit receives the high frequency DC voltage outputted by the bridge rectifier circuit and transmits the high frequency DC voltage to the pulse width modulation circuit, and the pulse width modulation circuit controls a conduction time of the switch circuit according to the received high frequency DC voltage.

Abstract: A converter (34) includes a control device (6) connected at its output to a pulse width modulator (8), which is connected on the output side to control inputs of a load-side inverter (10), and a current measuring device (4), which is connected on the input side to two terminals of the load-side inverter (10), and on the output side to two measurement inputs of the control device (6). Further provided is a two-channel damping control circuit (38), whose control-circuit channels (56, 58) are each connected on the input side to an output of the current measuring device (4), and on the output side to an inverting adder (54), and the outputs of the two control-circuit channels (56, 58) and the output of the inverting adder (54) are connected to inputs of the pulse width modulator (8). As a result, a converter (34) is realized that can actively dampen a connected undamped inverter output-filter (36) without causing an additional control dead time.

Abstract: The inventive system uses modular N+1 bulk power supplies to power a computer system. Thus, the individual BPSs may be replaced while the system is on-line. Each BPS is split into two halves, with each halve being run by a separate power grid. This means that if one of the power grids goes down, the other grid fills the power. Thus, there are no switching times or latencies, the inventive power supply system keeps running. When both power grids are present, each power supply halve in a BPS load shares 50/50. The two input AC power grids are each controlled separately via two power distribution control assemblies (PDCA). Each assembly can be separately configured for 3 phase wye, 3-phase delta or single phase inputs.

Abstract: A multi-phase converter comprising a plurality of switching circuits each controlled by a phase controller and each providing a switched output voltage to an output node of the converter and wherein each switching circuit under control of the phase controller sequentially provides a switched output voltage to the output node at which an output voltage of the converter is developed; and a main control circuit including a clock circuit for providing a first clock signal to each of the switching circuits and a second lower frequency clock signal to a first of the phase controllers, each phase controller having a delay circuit controlled by the first clock signal to provide a delayed second clock signal for coupling to a next one of the phase controllers and in the case of a last one of the phase controllers, back to the main control circuit, whereby a plurality of sequentially delayed second clock signals is provided, one to each of the remaining phase controllers after the first phase controller to determine wh

Abstract: The present invention is a DC/AC inverter for converting a DC supply voltage signal to an AC voltage signal. The DC/AC inverter includes a drive circuit, a switch circuit, a transformer circuit and an auxiliary circuit. The drive circuit provides a first drive signal and a second drive signal. The switch circuit includes a high-side transistor for receiving the first drive signal from the drive circuit and a low-side transistor for receiving the second drive signal from the drive circuit. The switch circuit further receives the DC supply voltage signal and generates a voltage signal. The transformer circuit receives the voltage signal from the switch circuit and transforms it to the AC voltage signal. The auxiliary circuit adjusts a gate-source voltage of the high-side transistor and thus enables the DC/AC inverter to be applicable to a wide DC voltage supply range.

Abstract: An interconnection inverter device includes a pair of capacitors connected in series to a pair of direct-current buses each connecting a direct-current power supply and the inverter; an opening/closing unit connected to either one of the pair of direct-current buses; voltage monitor units that monitor terminal voltages of the pair of capacitors respectively; and a controller that controls opening or closing of the opening/closing unit based on monitor voltages detected by the voltage monitor units.

Abstract: A DC power source voltage is supplied to a center tap of a primary winding, and first and second semiconductor switches alternately turned on are disposed between each of both ends of the primary winding and a common potential point, and a current flowing through a load is fed back and PWM control of each of the semiconductor switches is performed. Also, snubber circuits are respectively connected between a ground and the center tap of the primary winding, and an abnormal high voltage at the time of switching is reduced. Also, a parallel running of plural inverters is simply performed by disposing PWM comparators corresponding to the first and second semiconductor switches.

Abstract: A combined content addressable memory device and memory interface is provided. The combined device and interface includes one or more one molecular wire crossbar memories having spaced-apart key nanowires, spaced-apart value nanowires adjacent to the key nanowires, and configurable switches between the key nanowires and the value nanowires. The combination further includes a key microwire-nanowire grid (key MNG) electrically connected to the spaced-apart key nanowires, and a value microwire-nanowire grid (value MNG) electrically connected to the spaced-apart value nanowires. A key or value MNGs selects multiple nanowires for a given key or value.

Abstract: A compact memory card connector with an extended communication distance is provided. This connector has a loading port at its one end, through which a memory card can be accommodated therein. The connector is equipped with a base made of an electrical insulating material, a plurality of contacts arranged on the base so as to electrically contact connecting terminals of the memory card inserted in the connector, and an antenna block, which houses a secondary antenna and is slidable in a direction of inserting the memory card into the connector.

Abstract: System for a memory device. An electronic device includes a non-volatile memory array. The non-volatile memory array includes a first transistor and a second transistor. The first and second transistors have a shared doped region. A first word line is formed along a first axis. The first word line includes a first gate electrode for the first transistor and a second gate electrode for the second transistor. The non-volatile memory array includes a bit line formed along a second axis. The first axis is perpendicular to the second axis. The bit line is electrically connected to the shared doped region.

Abstract: A memory apparatus is provided that includes a storage element configured to store and retain information based on the state of an electric resistance, and a circuit element connected in series to the storage element as a load. In the memory apparatus, a resistance value is set to one of a plurality of different levels by controlling a voltage or a current applied to the circuit element or the storage element upon the writing. The storage element includes levels having low resistance values and levels having high resistance values obtained after erasing, to each of which different information is allocated. One storage element may store information having a ternary value or more. When erasing the information from the levels excluding the level having the lowest resistance value, a level is initially changed to the level having the lowest resistance value, and subsequently changed to that having a higher resistance value.

Abstract: The present invention relates to methods and apparatus for improving the stability of static random access memory (SRAM) cells by using boosted word lines. Specifically, a boosted word line voltage (Vdd?) is applied to the word line of a selected SRAM cell, while such a boosted word line voltage (Vdd?) is sufficiently higher than the power supply voltage (Vdd) of the SRAM cell so as to improve the cell stability to a desired level. Specifically, a specific boosted word line voltage is predetermined for each SRAM cell based on the specific cell configuration, by using a circuit simulation program, such as the BERKELEY-SPICE simulation program. A boost voltage generator is then used to apply the predetermined boosted word line voltage to the selected SRAM cell.

Abstract: According to some preferred embodiments of the present invention, a semiconductor memory device includes an array of memory cells and plural pairs of complementary bit lines, each pair of the complementary bit lines being connected to the memory cells arranged in the same column. The array is divided into plural memory blocks each including plural memory cells arranged in the same column. The corresponding complementary bit lines of the plural memory blocks are connected to corresponding common complementary data lines, respectively. Some pairs of the complementary data lines are crossed at least one time so that the complementary data lines of each pair of the some pairs of the complementary data lines are reversed in position and that the crossed data line and a non-cross data line are arranged alternately whereby crosstalk to be generated between adjacent data lines are reduced.

Abstract: A magnetoresistive device is provided with separate read and write architecture. In one embodiment, a magnetic tunnel junction (MTJ) has a nonmagnetic nonconductive barrier layer sandwiched between two ferromagnetic conducting layers. A first read line having a first resistance is coupled to a first ferromagnetic layer and a second read line having a third resistance is coupled to a second ferromagnetic layer such that a voltage difference between the two read lines will produce a current flowing perpendicularly through each layer of the MTJ. A first write line having a second resistance is separated from the first read line by a first insulator and a second write line having a fourth resistance is separated from the second read line by a second insulator, and wherein the second and fourth resistances are lower than the first and third resistance.

Abstract: Each memory cell of an MRAM that uses toggle writing is written by applying to the memory cell a first field, then a combination of the first field and the second field, then the second field. The removal of the second field ultimately completes the writing of the memory cell. The combination of the first field and the second field is known to saturate a portion, the synthetic antiferromagnet (SAF), of the MRAM cell being written. This can result in not knowing which logic state is ultimately written. This is known to be worsened at higher temperatures. To avoid this deleterious saturation, the magnetic field is reduced during the time when both fields are applied. This is achieved by reducing the current that provides these fields from the current that is applied when only one of the fields is applied.

Abstract: Magnetic memory devices integrated together with a logic circuit on a common semiconductor chip are arranged to have layouts mirror-symmetrical (mirror inversion) with respect to an axis parallel to a magnetization-hard axis of a magneto-resistance element of a magnetic memory cell in the magnetic memory device. The logic circuit is arranged between the magnetic memory devices. The magnetic memory device capable accurately of maintaining integrity in logical level between write data and read data is achieved.

Abstract: The invention provides a phase change memory device comprising a stacked structure disposed on a substrate. The stacked structure comprises a first electrode, a second electrode overlying the first electrode and an insulating layer interposed between the first and the second electrodes. A memory spacer is formed on part of the sidewall of the stacked structure to contact the first electrode, the insulating layer and the second electrode.

Abstract: The invention relates to a dynamic multifunctional module and to an electronic communication device comprising a main body part, a sliding body part, said parts being connected together with sliding contact, and a dynamic multifunctional module, the dynamic multifunctional module being joint from one edge to the main body part with an articulation and in linked connection to sliding body part and the dynamic multifunctional module being in a first position when the said sliding body part is in closed position and turned by an angle around the articulation to a second position by the sliding body part when the sliding body part is moved to open position. The invention also includes a method for changing an image capturing direction of an electronic communication device.

Abstract: A switch contains a first semiconductor die, which is configured to receive signals on a plurality of input ports and to output the signals on a plurality of output ports. The first semiconductor die is further configured to selectively couple the signals between the input and output ports using a plurality of switching elements in accordance with a set of control signals, which correspond to a configuration of the switch. During this process, a plurality of proximity connectors, proximate to a surface of the semiconductor die, are configured to communicate the signals by capacitive coupling.

Abstract: A non-volatile memory device and method thereof are provided. The example non-volatile memory device may include a plurality of main cells, each of the plurality of main cells arranged at first intersection regions between one of a plurality of word lines and one of a plurality of main bit line pairs and a plurality of flag cells, each of the plurality of flag cells arranged at second intersection regions between one of the plurality of word lines and a plurality of flag bit line pairs, each of the plurality of flag cells configured to store page information in a manner such that page information associated with main cells corresponding to one of the main bit line pairs is stored in flag cells corresponding to more than one of the flag bit line pairs.

Abstract: An information processing apparatus has a multi-valued NAND nonvolatile memory including a plurality of word lines and a plurality of memory cells connected to the respective word lines. Each memory cell has a plurality of threshold voltages, and is divided into a first and a second storage area. A program code is stored in the first storage area, and user data is stored in the second storage area. The apparatus also includes a volatile memory to which the program code is transferred from the multi-valued NAND nonvolatile memory. The apparatus further includes a CPU connected to the volatile memory and configured to operate based on the program code transferred to the volatile memory.

Abstract: A nonvolatile memory apparatus including a control circuit, plural terminals having clock, command and other terminals, data and command registers, and plural nonvolatile memory cells. The clock terminal receives a clock signal and the command terminal receives commands including read and program commands. The data register receives from and outputs data to outside. The control circuit reads operation steps from memory used to control the apparatus. The control circuit, responsive to the read command, controls reading data from the memory cells, storing read data to the data register, and outputting read data via the other terminal, not the command terminal, based on the clock signal. The control circuit, responsive to the program command, controls receiving data via the other terminal, not the command terminal, based on the clock signal, storing received data to the data register and writing received data to the memory cells.

Abstract: A nonvolatile semiconductor memory device includes a semiconductor substrate, plural semiconductor columns arranged in a matrix form on the substrate, plural first conductive areas zonally formed in a column direction on the substrate between the semiconductor columns and functioning as word lines, plural second conductive areas formed at tops of the semiconductor columns, respectively, plural bit lines connecting the second conductive areas in a row direction, plural channel areas respectively formed in the semiconductor columns between the first and second conductive areas and contacting the first and second conductive areas, plural third conductive areas continuously formed via first insulating films above the substrate and opposite to the channel areas in the column direction between the semiconductor columns and functioning as control gates, and plural charge accumulation areas respectively formed via second insulating films at upper portions of the channel areas at a position higher than the third condu

Abstract: A nonvolatile semiconductor memory controller has a plurality of word lines and a plurality of memory cells. Each memory cell is connected to a corresponding one of the word lines, and each memory cell has N threshold voltages, where N is a natural number of 4 or greater. The plurality of memory cells constitutes a plurality of pages, the same data is written in each of the pages when writing in the nonvolatile memory, and only part of the pages to which the same data is written is accessed when reading out the nonvolatile memory.

Abstract: A virtual ground array structure uses inversion bit lines in order to eliminate the need for implanted bit lines. As a result, the cell size can be reduced, which can provide greater densities and smaller packaging.

Abstract: A NAND architecture non-volatile memory device and programming process is described that programs the various cells of strings of non-volatile memory cells utilizing a drain-side self boost, modified drain-side self boost or local self boost process that increases the pass voltage (Vpass_high) on a word line on the source line side of a memory cells selected for programming to boost the voltage on the source of the adjacent blocking cell of the string. This drives the adjacent blocking cell further into cutoff and increases boosting by decreasing channel leakage to the source line during programming.

Abstract: Non-volatile storage elements are programmed using counter-transitioning waveform portions on neighboring word lines which reduce capacitive coupling to a selected word line. In one approach, the waveform portions extend between pass or isolation voltages of a boosting mode, which are applied during a programming pulse on the selected word line, and read voltages, which are applied when verify pulses are applied to the selected word line to verify whether the storage elements have been programmed to a desired programming state. The waveform portions reduce the net voltage change which is coupled to the selected word line. The selected word line can reach a reduced, steady state level sooner so that the verify pulses can be applied sooner, thus reducing the overall programming time.

Abstract: A nonvolatile semiconductor memory device in accordance with the present invention is provided with a plurality of memory cells of field effect transistor type, a source bias control circuit, and a drain bias control circuit. The source bias control circuit variably sets the potential of a source line connected in common to the sources of the plurality of memory cells at the time of write operation. The drain bias control circuit variably sets the potential of the drains of the plurality of memory cells at the time of write operation according to the potential of the source line.

Abstract: Non-volatile storage elements are programmed using counter-transitioning waveform portions on neighboring word lines which reduce capacitive coupling to a selected word line. In one approach, the waveform portions extend between pass or isolation voltages of a boosting mode, which are applied during a programming pulse on the selected word line, and read voltages, which are applied when verify pulses are applied to the selected word line to verify whether the storage elements have been programmed to a desired programming state. The waveform portions reduce the net voltage change which is coupled to the selected word line. The selected word line can reach a reduced, steady state level sooner so that the verify pulses can be applied sooner, thus reducing the overall programming time. In another aspect, a pass voltage transitions directly to a read voltage on an unselected word line, thereby reducing programming time.