Abstract: A semiconductor device includes a CAM cell array that stores the operation setting information as to the semiconductor device, a controller that controls read and write of the CAM cell array, a row decoder, and a column decoder. With this structure, different row addresses are allocated to respective functions of the operation setting information. Accordingly, stress is not caused in the CAM cell array of the unselected functions at the time of programming.

Abstract: A memory controller, such as a memory controller for reading data received from a DDR SDRAM memory, may detect the beginning and end of a read cycle. The memory controller may include a preamble detection circuit to receive a strobe signal and output a first control signal indicating detection of a preamble window in the strobe signal that indicates a beginning of the read cycle, where the first control signal is delayed based on a selectable delay period applied to the first control signal. The memory controller may further include a first gate to, based on the first control signal, either output the strobe signal for reading of the data lines or block the strobe signal, and the control logic to set an amount of the selectable delay period for the preamble detection circuit.

Abstract: Embodiments of the present invention include circuitry for issuing address and data signals to a memory array using a system clock and a write clock. A locked loop may be used to compensate for additional delay experienced by the system clock relative to write clock and ensure synchronization of the clock signals. A write latch enable block may be used to develop a write latch enable signal for issuance along with a corresponding address signal. The write latch enable signal can be timed such that it arrives at an appropriate time to issue the data corresponding to the issued address.

Abstract: Various data protection techniques are provided. In one embodiment, a memory device is provided. The memory device may initiate a security measure upon occurrence of one or more triggering events. The one or more triggering events may include receipt of a command signal. Various additional methods, devices, and systems are also provided.

Abstract: Systems, methods, and devices for iteratively writing contents to memory locations are provided. A statistical model is used to determine a sequence of pulses to write desired contents to a memory location. The contents can be expressed as a resistance value in a range to store one or more bits in a memory cell. For phase change memory, an adaptive reset pulse and one or more annealing pulses are selected based on a desired resistance range. Reading the resistance value of the memory cell can provide feedback to determine adjustments in an overall pulse application strategy. The statistical model and a look up table can be used to select and modify pulses. Adaptively updating the statistical model and look up table may reduce the number of looping iterations to shift the resistance value of the memory cell into the desired resistance range.

Abstract: A semiconductor memory device includes a first memory block, a second memory block, and a signal controller. The first memory block is configured to generate a first blocking signal, a second blocking signal, and a first enable signal in response to a row address, and to block and enable wordlines of the memory block in response to the first blocking signal and the first enable signal, respectively. The second memory block is configured to generate a third blocking signal, a fourth blocking signal, and a second enable signal in response to the row address, and to block and enable wordlines of the second memory block in response to the third blocking signal and the second enable signal, respectively. The signal controller is connected between the first memory block and the second memory block and is configured to enable the third blocking signal when the second blocking signal is enabled, and to enable the first blocking signal when the fourth blocking signal is enabled.

Abstract: In an anti-fuse repair control circuit, a semiconductor memory device is integrated into a multi-chip package to perform an anti-fuse repair. An anti-fuse repair control circuit includes a data mask signal input circuit, a cell address enable unit a repair enable unit, and a repair unit. The data mask signal input circuit receives and outputs a data mask signal upon receiving a test control signal for an anti-fuse repair. The cell address enable unit receives an anti-fuse repair address to enable a cell address of an anti-fuse cell to be repaired upon receiving the data mask signal outputted from the data mask signal input circuit. The repair enable unit codes the cell address and output a repair enable signal and a drive signal according to whether or not an anti-fuse cell corresponding to the cell address is enabled. The repair unit supplies a repair voltage to the anti-fuse cell when the repair enable signal, the address, and the drive signal are enabled.

Abstract: Techniques for testing a semiconductor memory device are provided. The memory device includes a plurality of memory cells and a plurality of row lines and column lines connected to the memory cells for selectively accessing one or more of the memory cells. The method includes the steps of: applying a first voltage to at least a given one of the row lines corresponding to at least a given one of the memory cells to be tested, the first voltage being selected to stress at least one performance characteristic of the memory device, the first voltage being different than a second voltage applied to the given one of the row lines for accessing at least one of the memory cells during normal operation of the memory device; exercising the memory device in accordance with prescribed testing parameters; and identifying whether the memory device is operable within prescribed margins of the testing parameters.

Abstract: A memory test system is disclosed. The memory system includes a memory device, a tester generating a clock signal and a test signal for testing the memory device, and an optical splitting module. The optical splitting module comprises an electrical-optical signal converting unit which converts each of the clock signal and the test signal into an optical signal to output the clock signal and the test signal as an optical clock signal and an optical test signal. The optical splitting unit further comprises an optical signal splitting unit which splits each of the optical clock signal and the optical test signal into n signals (n being at least two), and an optical-electrical signal converting unit which receives the split optical clock signal and the split optical test signal to convert the split optical clock signal and the split optical test signal into electrical signals used in the memory device.

Abstract: A memory malfunction prediction system and method, such as those that sequentially stress each row of memory cells in an array by decreasing the refresh rate of the row. Prior to doing so, the data stored in the row can be copied to a holding row, and a CRC value for the data can be generated and stored. After the test, the data stored in the row being tested can be read, and a CRC value for the data can then be generated. This after test CRC value can be compared to the stored pre-test CRC value. In the event of a match, the row can be considered to be functioning properly, and the next row can then be tested. If the CRC values do not match, a predicted malfunction of the row can be considered to exist, and corrective action can be taken, such as by repairing the row by substituting a redundant row of memory cells.

Abstract: A semiconductor memory device comprises: a memory cell array including a plurality of word lines, a plurality of bit line pairs containing a first bit line and a second bit line, and a plurality of memory cells; a plurality of replica bit lines formed in the same manner as the first and second bit lines; a write buffer circuit operative to drive the first or second bit line to the ground voltage; a replica write buffer circuit operative to drive the replica bit lines to the ground voltage; and a boot strap circuit operative to drive the first or second bit line currently driven to the ground voltage further to a negative potential at a timing when the potential on the replica bit lines reaches a certain value.

Abstract: In a 4F2 memory cell designed using an SGT as a vertical transistor, a bit line has a high resistance because it is comprised of a diffusion layer underneath a pillar-shaped silicon layer, which causes a problem of slowdown in memory operation speed. The present invention provides a semiconductor storage device comprising an SGT-based 4F2 memory cell, wherein a bit line-backing cell having the same structure as that of a memory cell is inserted into a memory cell array to allow a first bit line composed of a diffusion layer to be backed with a low-resistance second bit line through the bit line backing cell, so as to provide a substantially low-resistance bit line, while suppressing an increase in area of the memory cell array.

Abstract: The present invention provides a semiconductor memory device which reduces current consumption in a standby state owing to a suitable refresh-thinning-out function, and a refresh control method thereof. When the refresh-thinning-out function is added while a refresh operation and an external access operation are being executed independently of each other, a refresh address counter outputs a refresh address Add(C) and inputs predetermined high-order bits thereof to a refresh-thinning-out control as a high-order refresh address Add(C) (m), where judgment as to whether the refresh operation is performed, is made. A refresh permission signal RFEN corresponding to the result of judgment is inputted to a word driver to activate and control the word driver. The process of judgment by the refresh-thinning-out control circuit can be embedded in an access time of a row system.

Abstract: A semiconductor memory device includes a fuse set configured to form a current path including at least one of a plurality of fuses in response to address information corresponding to a plurality of memory cells and to output a redundancy address corresponding to a programming state of the plurality of fuses where the plurality of fuses are programmed with address information corresponding to a target memory cell to be repaired among the plurality of memory cells, and at least one current controlling unit configured to control a driving current flowing through the current path according to at least one detection signal.

Abstract: A nonvolatile memory device includes a nonvolatile memory and a controller unit for the nonvolatile memory. The nonvolatile memory and the controller unit include a first logic section and a second logic section, respectively. The nonvolatile memory includes a voltage detector configured to detect a power supply voltage externally supplied to the nonvolatile memory and the controller unit, and an output of the detection is supplied to the first logic section of the nonvolatile memory provided with the voltage detector, and also to the second logic section of the controller unit and/or a logic section of at least one added nonvolatile memory via a buffer amplifier, simultaneously.

Abstract: A voltage adjustment circuit of a semiconductor memory apparatus includes a control voltage generating unit configured to distribute an external voltage for selectively outputting a plurality of distribution voltages as a control voltage in response to a control signal, the plurality of the distribution voltages each have different voltage levels, a comparing unit configured to include a voltage supply unit configured to control an external voltage supplied to a first node and a second node if a level of an output voltage is higher than a level of a reference voltage in response to a level of the control voltage, and a detection signal generating unit configured to drop potential levels of the first and second nodes according to the levels of the output voltage and the reference voltage, and to output the potential level of the second node as a detection signal, and a voltage generating unit configured to drive the external voltage according to a potential level of the detection signal and to output the exter

Abstract: A semiconductor memory includes an address converting circuit which latches an address and a bank signal and generates a latch address for activating a data access path of a second bank group, and converts the latch address according to a level of the bank signal and generates a variable address for activating a data access path of a first bank group, a first column decoder which decodes the variable address and generates a first output enable signal for activating the data access path of the first bank group, and a second column decoder which decodes the latch address and generates a second output enable signal for activating the data access path of the second bank group.

Abstract: A memory system, memory interface device and method for a non-power-of-two burst length are provided. The memory system includes a plurality of memory devices with non-power-of-two burst length logic and a memory interface device including non-power-of-two burst length generation logic. The non-power-of-two burst length generation logic extends a burst length from a power-of-two value to insert an error-detecting code in a burst on data lines between the memory interface device and the plurality of memory devices.

Abstract: An ultrasound device generates polar-coordinate image data divided up into an (N×M) array of polar-coordinate image data blocks; a first external memory configured to store the (N×M) array of data blocks; a second external memory configured to store x-y coordinate image data corresponding to the polar-coordinate image data; a video processing chip comprising an internal memory configured to store an (N×R) array of the polar-coordinate image data blocks; and a controller configured to perform a data conversion operation on the (N×R) array of data blocks to generate x-y coordinate image data, and to store the x-y coordinate image data to the second external memory. N, M, and R are integers greater than 1; R is less than M; and an internal access time for the internal memory element is shorter than an external access time for the first external memory element.

Abstract: A system for detecting precursor seismic electromagnetic waveforms includes a transducer connected to the emitter of a transistor and arranged to conduct in response to an electromagnetic seismic precursor. Conduction by the transducer initiates a current in the transistor's base-emitter junction, reversing the bias of the function and enabling a resonating current in the junction.

Abstract: In order to make it possible to set up an alarm method which is rich in variation, a mobile phone is configured so that a plurality of alarm times are related to the same group, the group to which a plurality of alarm times are related is set to activation or cancellation, and when there comes any one of a plurality of alarm times which are related to the group being set to activation, an alarm is raised. Since setting to raise an alarm at a plurality of alarm times, or cancellation of the setting can be made, an alarm method rich in variation can be configured.

Abstract: A detection unit detects light passing through apertures provided in a seconds wheel, a center wheel and an hour wheel, respectively, which rotate on the same axis. The apertures in the seconds wheel include a circular aperture provided at a reference position therein, and two apertures provided separated by corresponding arcuate apertures of different lengths from the aperture on its opposite sides, respectively. By counting the number of light non-detection events the detection unit encounters due to the light blocking area covering the detection unit, the rotational position of the seconds wheel is detected accurately and securely.

Abstract: A time-to-digital converter apparatus including a delay phase-locked loop, a subtracter, a multi-phase detector and a Vernier detector is disclosed. The delay phase-locked loop herein includes digital delay components for producing counting signals. The multi-phase detector includes digital delay components for producing delay outputs according to the counting signals and thereby detecting a pulse input signal. The Vernier detector includes digital delay components for detecting the remainder of the pulse input signal according to the difference between the delay outputs produced by the subtracter.

Abstract: A solar panel determines whether or not a wristwatch is in darkness. When the darkness has continued for a predetermined time period, e.g., for 61-70 minutes, it is determined that the wristwatch is not in use and set in a sleep state. Out of seconds, center and hour hands, at least the seconds hand is rotated to a reference position (00-second position) and stopped, and positions of the center and hour hands are detected. Therefore, power consumption during can be reduced when the wristwatch is not in use.

Abstract: An optical near-field generating device is provided. The optical near-field generating device includes: a light source; a light transmissive substrate; and a conductive scatterer irradiated with light from the light source to generate an optical near-field. The scatterer is formed across planes with different heights on the light transmissive substrate and includes a first area formed on a surface closest to an object to which the optical near-field is applied and a second area formed on a surface distant from the object as compared with the first area. The optical near-field is generated from the first area of the scatterer toward the object.

Abstract: The invention is a near-field optical head that generates near-field light to heat a predetermined area of a medium and applies a magnetic field to the predetermined area to record information, the head including an optical waveguide 103 having a path for propagating a pencil of light, and a tip 117 having an optical minute opening 118 at the position facing against the predetermined area and collecting the pencil of light emitted from the optical waveguide 103 and simultaneously propagating the collected pencil of light to the optical minute opening 118 to generate the near-field light. The optical minute opening 118 is formed by a magnetic pole that applies a magnetic field to the predetermined area.

Abstract: An object lens actuator can improve workability and operate with high reliability by prevention of damage to the object lens actuator and a disc and sticking of a moving part caused by an excessive movement of the moving part. In a disc drive employing the object lens actuation, stable writing/reading operation is implemented by always keeping a focal point of an object lens at a predetermined track of a recording surface of the disc even when being under the action of external perturbations such as a vertical deviation or a radial deviation of the disc, resulting in improved reliability. A solder-flux adhesion prevention gadget is provided between a substrate and a stopper receiving face, which may include a stepped stage, a partition protruding from the surface of the lens holder, or alternatively a combination of them arranged in order in the range.

Abstract: A tilt sensor includes a photodetector having a photosensitive plane and detecting a light beam in multiple areas and outputting detection signals representing its intensities and a tilt detector for generating a tilt error signal, including information about the tilt of a disk, based on the detection signals. The light beam forms a beam spot on the photosensitive plane. The beam spot includes a +first-order light area in which zero-order and +first-order light rays, diffracted by a track on the disk, are superposed, ?first-order light area in which zero-order and ?first-order light rays are superposed, and a zero-order light area which is sandwiched between the +first-order and ?first-order light areas, includes neither the +first-order nor ?first-order light ray, but includes a zero-order light ray. The photodetector generates the detection signals except for light entering an opaque area provided for at least part of the zero-order light area.

Abstract: Disclosed herein are aspects of optical tape technology, tape manufacturing, and tape usage. Methods and systems of tape technology disclose optical tape media including: configurations, formulations, markings, and structure; optical tape manufacturing methods, systems, and apparatus methods and systems including: curing processes, coating methods, embossing, drums, testing, tracking alignment stamper strip; optical tape methods and systems including: pick up head adapted for the disclosed optical tape; and optical tape uses including optical storage media devices for multimedia applications.

Abstract: An apparatus for converting a groove/land polarity on an optical medium, comprises a physical identification (PID) detector for detecting a first PID value from a first sector, a sector information unit for providing an information which includes a second PID value indicative of either a second sector or at least one reference groove/land changing point, a sector counter for counting a first value whose an initiation is set by the sector information unit based on the information and/or by the PID detector based on the first PID value, and a comparing unit for determining at least one oncoming groove/land changing points, when the first value approaches a second value predetermined in or generated by the sector information unit according to the information.

Abstract: The invention relates to an optical drive (10) and a method for determining a reading and/or writing position of an optical drive (10). The optical drive (10) in accordance with the invention comprises control means (12) and at least three PLL units (20, 22, 24), wherein the control means (12) are adapted to control the three PLL units (20, 22, 24) to try to lock on to three different frequencies characteristic for an optical disc (26). The method in accordance with the invention comprises the step of controlling at least three PLL units (20, 22, 24) to try to lock on to three different frequencies characteristic for an optical disc (26). If the optical disc (26) is a Blue Ray Disc, the three different frequencies can be the HFM frequency, the wobble frequency, and the expected HF frequency.

Abstract: An address detection circuit includes a correction signal generator that generates a plurality of timing correction signals based on an ADIP (Address In Pre-groove) signal that is read out from a wobble of an optical disk, the timing correction signals having different cycles with each other, a correction signal selector that selects one of the timing correction signals generated by the correction signal generator and outputs the selected signal, and a timing corrector that outputs a data address detected based on a data signal that is read out from a data track of the optical disk at a timing in accordance with the timing correction signal transmitted from the correction signal selector.

Abstract: A method of reducing power dissipation in a variable-gain photo-detector circuit is described. The variable-gain photo-detector circuit has an output to output a main spot signal and at least one side spot signal. The main spot (M) and the side spot (Si or S2) are formed by separating a light beam into a main beam and at least one side beam and focusing the main beam on the main spot (M) and the side beam on at least one side spot (Si or S2) on an optical record carrier The method processes the main spot signal with a first averaging circuit having a first cut-off frequency. The side spot signal is processed with a second averaging circuit having a second cut-off frequency. The second cut-off frequency is lower than the first cut-off frequency. The above technique reduces power dissipation in the variable-gain photo-detector circuit and is useful for all optical devices.

Abstract: Trial writing is made by recording waveform different from that used to record information in a disc. In the trial writing, particularly, the strategy having short cooling time or large cooling power is used to make recording, so that the jitter characteristic having clear difference between jitters in magnitude can be obtained to get stable calculated power. Thus, the recording quality can be ensured and user's convenience is increased.

Abstract: A recording/reproducing device includes an optical head unit which performs writing and reading of information expressed by marks and spaces on an optical recording medium by irradiating laser light onto the optical recording medium, a laser driving pulse generating unit that generates a laser driving pulse according to the recorded information to supply a laser driving signal to the optical head unit, and executes the irradiation of the laser light onto the optical head unit for recording, an evaluation value calculating unit that calculates a quality evaluation value, which is an index of recording signal quality based on a signal read from the optical recording medium by the optical head unit, and an adjustment controlling unit that performs an adjustment setting of the laser driving pulse generated in the laser driving pulse generating unit.

Abstract: A method and a device for fast disc recognition for use in read/write performances when an optical disc is connected to an optical drive, including the provision of a set S of parameters for safe data transfer between the drive and the disc, the direct calibration during a disc recognition step only of those parameters out of said set S in need of a direct calibration, the start of a read/write data transfer sequence after said disc recognition step is finalized and the calibration of the remaining parameters at first after or during one or more data transfer read/write sequences.

Abstract: An optical disc device and tracking control method capable of stable tracking control even for inferior optical discs with tracks decentered by a large amount. The optical disc device and tracking control method includes: obtaining a rotation angle at which the degree of displacement of the track due to the eccentricity of the optical disc becomes maximum on the inner circumference side and the outer circumference side, and detecting the eccentricity amount of the optical disc; and performing track pull-in at the rotation angle, at which the degree of displacement of the track due to the eccentricity of the optical disc becomes maximum, detecting a displacement direction of the optical disc at the time of the pull-in, and moving the slider in the detected displacement direction for a distance equal to or almost equal to the eccentricity amount of the optical disc.

Abstract: A method of recording data, as embodied, includes creating and temporarily storing first management information for the data recorded before a recording failure occurs, when the recording failure occurs during recording of the data on a recording medium; continuously recording the data starting from a subsequent available recording location; and creating second management information for the data recorded after the occurrence of the recording failure, and recording the second management information on the recording medium in connection with the temporarily stored first management information when recording is completed.

Abstract: Provided are a disk defect inspection method and apparatus. The defect inspection method includes; determining an independent recording density value for disk defect detection in relation to disk drive component factors excepting a disk of the disk drive, and performing a disk defect inspection using the independent recording density value for disk defect detection.

Abstract: The optical data recording method comprising the steps of: modulating data to be recorded, to generate a plurality of recording modulation codes; and emitting a pulse-like light beam to an optical disc, so that a plurality of recording marks and spaces which have lengths corresponding to the plurality of recording modulation codes are formed on the optical disc. In the optical data recording method, at least two of the plurality of recording marks comprises: a first pulse which is disposed at a front and forms a leading edge of the recording mark, a last pulse which is disposed at a backend and forms a trailing edge of the recording mark, and a multi-pulse train which is disposed between the first pulse and the last pulse and forms a center of the recording mark. The multi-pulse train has a pulse period longer than T which represents a reference period of the recording modulation code.

Abstract: An information reproducing apparatus (1) is provided with: an offset adding device (19-1, 19-2) for adding a first offset value (OFS) which can be set to be variable, to a read signal (RRF) read from a recording medium (100); a correcting device (18) for correcting waveform distortion occurring in a read signal corresponding to a long mark, of the read signal to which the first offset value is added; an offset subtracting device (19-2, 19-3) for subtracting a second offset value (OFS) which can be set to be variable, from the read signal in which the waveform distortion is corrected; and a waveform equalizing device (15) for performing a waveform equalization process on the read signal in which the second offset value is subtracted.

Abstract: A small size circuit reproducing data with low error rate even when a signal includes a non-linear distortion is desired. In such a circuit, the Viterbi method is performed. In the Viterbi method, branch metrics are calculated based on a difference of a sampled reproduction signal and a predetermined expectation values. Path metrics are calculated from the branch metrics. Paths among the plurality of paths having the calculated path metrics and merging at a same state are compared with one another. Based on the magnitude of the compared path metrics, survivor path is selected. In the circuit, for the path metrics of paths merging at a same state, offset corresponding to a determination result until a merging point is added to the paths for the comparison for determining the survivor path from the plurality of merging paths.

Abstract: A recording apparatus with a device for recording information onto a medium, provided with: (i) a first layer irradiated with laser light to record information on a first area; and (ii) a second layer irradiated with laser light through the first layer and having a second area whose edge on an inner circumferential side corresponds to an edge on an outer circumferential side of the first area; and a controlling device for controlling the recording device to pre-record, into an area portion of the first area, other than an area portion having a size corresponding to a tolerance length, which indicates an acceptable range of a relative position shift between an address defined on the predetermined position in the first layer and an address related to the predetermined position in the second layer, with the edge on the outer circumferential side of the first area as a starting point.

Abstract: A dual-path optical recording medium and an apparatus for accessing such are disclosed. The dual-path optical recording medium includes a substrate, an intermediate recording layer, a holographic recording layer and a dichronic mirror layer. The intermediate recording layer is a rewritable data storage layer with a relatively low storage capacity. The holographic recording layer is a write-once data storage layer with a relatively high storage capacity. The dichronic mirror layer is located between the holographic recording layer and the intermediate recording layer. The apparatus for accessing the dual-path optical recording medium includes a first light module capable of generating a first laser light, and a second light module capable of generating a second laser light.

Abstract: A method of recording holographic information and an apparatus for recording/reproducing holographic information. The method includes: forming an information layer by recording a hologram on a holographic recording layer of a holographic information storage medium; and fixing the information layer on which the hologram is recorded, by radiating light on the information layer.

Abstract: An optical pickup apparatus for reproducing information from an optical disk, includes: a semiconductor laser applying a beam to an optical disk having two recording layers through an objective lens; and a light receiving device to which light reflected from the optical disk is directed through the objective lens and a beam splitting device, wherein: the beam splitting device has two first light receiving areas for detecting a push-pull signal and a second light receiving area for detecting a focus error signal, and a configuration is provided such that the center of the optical axis of the reflected light in the beam splitting device is made to lie within the second light receiving area for detecting the focus error signal.

Abstract: An optical pickup device radiates laser light to a disc having a plurality of recording layers in a direction of lamination. The optical pickup device includes an astigmatic element and a spectral element. The astigmatic element allows reflected light from the disc to converge in a first direction and form a first focal line at a first position, and allows reflected light to converge in a second direction and form a second focal line at a second position closer to the disc than the first position. The spectral element splits a reflected light flux in two along a straight line parallel to the first direction and turns traveling directions of the split two light fluxes into directions separated from each other. Here, the spectral element is interposed between the second focal line of the reflected light from a target recording layer and the second focal line of the reflected light from a deeper recording layer than the target recording layer.

Abstract: An objective lens includes a first optical path difference providing structure in which a first basic structure and a second basic structure are overlapped together, and a second optical path difference providing structure in which a third basic structure, a fourth basic structure, and a fifth basic structure are overlapped together. The first and third basic structures emit diffracted light fluxes with the same diffraction order having the maximum light amount. The second and fourth basic structures emit diffracted light fluxes with the same diffraction order having the maximum light amount. The fifth basic structure emits 0th-order diffracted light fluxes with the maximum light amount, for the first light flux, emits 0th-order diffracted light fluxes with the maximum light amount, for the second light flux, and emits Gth-order diffracted light fluxes with the maximum light amount, for the third light flux, where G is an integer excluding zero.

Abstract: An objective lens relating to the present invention includes a first optical path difference providing structure in which a first basic structure and a second basic structure are overlapped with each other. The first basic structure is a blaze-type structure which emits a Xth-order diffracted light flux, when the first light flux passes through the first basic structure, where the value of X is an odd integer. At least a part of the first basic structure arranged around an optical axis includes a step facing an opposite direction to the optical axis. The second basic structure is a blaze-type structure which emits a Lth-order diffracted light flux, when the first light flux passes through the second basic structure, where the value of L is an even integer. At least a part of the second basic structure arranged around the optical axis includes a step facing the optical axis.

Abstract: An interference type optical head and an optical disk device that can easily adjust an optical path length difference of a couple of lights, ensure higher signal amplification effect, and are suitable for reduction in size are provided in order to improve a regeneration signal quality with amplification of signal in the case where reflectivity of each layer must be lowered and relative noise for the signal increases because read speed is high in a multilayer optical disk. In view of essentially improving an S/N ratio of the regeneration signal in high-speed rotation of a multilayer disk, a plurality of interference phases are generated and an optical system for differential calculation has been reduced in size with an angular selective polarization conversion element in the optical disk device for amplifying the signal with interference of the light not radiated to the disk with the reflected light from the disk.