Abstract: Layers of a passivating material and/or containing luminescent centers are deposited on phosphor particles or particles that contain a host material that is capable of capturing an excitation energy and transferring it to a luminescent center or layer. The layers are formed in an ALD process. The ALD process permits the formation of very thin layers. Coated phosphors have good resistance to ambient moisture and oxygen, and/or can be designed to emit a distribution of desired light wavelengths.

Abstract: The present invention relates to metal complexes and to electronic devices, in particular organic electroluminescent devices, comprising these metal complexes.

Abstract: A plasma gasification reactor, and process for its operation, with one or both of, first, a quench zone within an upper part of a top section of the reactor and, second, feed ports through a lateral wall of a middle section of the reactor for supplying feed material to a feed bed within the middle section and the feed ports located proximate the feed bed. The quench zone is provided with nozzles for introducing a fluid to reduce the temperature of molten solid bits sufficiently to minimize their sticking within external ductwork. The middle section feed port arrangement assists in more thorough reaction of light particles in the feed material that may otherwise exit with gaseous products.

Abstract: A sintered indium oxide comprising niobium as an additive, wherein the ratio of the number of niobium atoms relative to the total number of atoms of all metal elements contained in the sintered compact is within a range of 1 to 4%, the relative density is 98% or higher, and the bulk resistance is 0.9 m?·cm or less. Provided are a sintered compact of indium oxide system and a transparent conductive film of indium oxide system, which have characteristics of high transmittance in the short wavelength and long wavelength ranges since the carrier concentration is not too high even though the resistivity thereof is low.

Abstract: A process for forming thermoelectric nanoparticles includes the steps of providing a core material and a bismuth containing compound in a reverse micelle; providing a tellurium containing compound either in or not in a reverse micelle; reacting the bismuth containing compound with the tellurium containing compound in the presence of a base, forming a composite thermoelectric nanoparticle having a core and shell structure.

Abstract: The present invention is directed to a display fluid comprising charged composite pigment particles dispersed in a solvent. The composite pigment particles have a density which matches to the density of the solvent in which they are dispersed. A display fluid comprising the composite pigment particles provides improved display performance.

Abstract: Apparatus and method for stringing aerial cables through tower structures using aircraft without requirement that a person be present on the tower while the aircraft is performing the stringing operation are described. An elongated needle-like threading member to which a sock line is attached and having spaced-apart projections emanating therefrom at different directions around the threading member, is directed by the aircraft pilot through a block having a pulley suspended by an insulator or other tower structure, the projections in cooperation with the block preventing the threading member from being pulled rearwardly under tension from the sock line. A device adapted for grabbing and releasing the threading member and attached to an aircraft haul line, permits the threading member to be hauled forward through the block once the aircraft flies to the other side of the tower and reattaches the grabbing device to the threading member.

Abstract: A hoisting assembly for lifting or lowering a heavy object includes an upper fixed block, an upper movable block being suspended from the upper fixed block by at least one first rope which is reeved into one or more first rope lengths between the upper fixed block and the upper movable block, a lower movable block being connected to the upper movable block by at least one second rope which is reeved into one or more second rope lengths between the upper fixed block and the upper movable block. The first and second ropes are reeved in such a way that in use the upper movable block can be positioned at a distance greater than zero from the upper fixed block and at a distance greater than zero from the lower movable block by controlling the lengths of the first and second ropes.

Abstract: A lifting and/or tilting device is provided for a grass cutting machine, such as a ride-on mower. The device includes a fixed chassis element designed to rest on the ground. A movable chassis element is capable of accommodating at least one wheel of the machine and is movable about an axle supported by the fixed chassis element, between a stowed position, in which the movable chassis element extends essentially in the plane formed by the fixed chassis element, and at least one raised position in which the movable chassis element is separated from the fixed chassis element. The device has a cylinder with a body that is attached permanently to the fixed chassis element and a shaft that is movable relative to the body, attached permanently to the movable chassis element, and mounted in such manner that in the raised position it extends essentially outside of the zone delimited by the fixed and movable chassis elements.

Abstract: A terminal post for a cable barrier which includes: a post body; wherein the post body itself is of unitary construction and includes: at least one cable-barrier portion which receives and retains one or more barrier-cables used in the cable-barrier; at least one anchor-cable portion which receives and retains one or more anchor-cables which are anchored to counter balance the force applied to the terminal post by the barrier-cable(s); wherein the cable-barrier portion(s) and the anchor-barrier portion(s) within the post body are configured so that the anchor-cables and/or barrier-cables are releasable therefrom, during a collision with a vehicle, in situations where the anchor-cables act as a ramp and/or snag during the collision.

Abstract: A swing gate (30) enables safe locking and unlocking of the gate (30) in the face of a beast (24) captured between rails (36, 38). The gate (30) has a pivot end (32) connected to the rail (36) by hinges (40) and a distal end (34) remote from the pivot end (32). The gate (30) includes a centre hinge (42) between the pivot end (32) and the distal end (34). The centre hinge (42) effectively divides the gate (30) into two sections, namely, a primary section (44) between the pivot end (32) and the centre hinge (42) and a safety section (46) between the centre hinge (42) and the distal end (34). When the beast (24) attacks the gate (30), the primary section (44) can swing open while the safety section (46) folds away to protect an operator (22).

Abstract: A memory device includes a first metal layer and a first metal oxide layer coupled to the first metal layer. The memory device includes a second metal oxide layer coupled to the first metal oxide layer and a second metal layer coupled to the second metal oxide layer.

Abstract: Provided are a nonvolatile memory device which can suppress non-uniformity in initial breakdown voltages among nonvolatile memory elements and prevent reduction of yield, and a manufacturing method thereof. The nonvolatile memory device includes a nonvolatile memory element (108) having a stacked-layer structure in which a resistance variable layer (106) is parallel to a main surface of a substrate (117) and is planarized, and a plug (103) electrically connected to either a first electrode (105) or a second electrode (107), and an area of an end surface of a plug (103) at which the plug (103) and the nonvolatile memory element (108) are connected together, the end surface being parallel to the main surface of the substrate (117), is greater than a cross-sectional area of a cross-section of a first transition metal oxide layer (115) which is an electrically-conductive region, the cross-section being parallel to the main surface of the substrate (117).

Abstract: A resistive non-volatile memory cell with a bipolar junction transistor (BJT) access device formed in conjunction with the entire memory cell. The memory cell includes a substrate acting as a collector, a semiconductor base layer acting as a base, and a semiconductor emitter layer acting as an emitter. Additionally, metal plugs and the phase change memory element are formed above the BJT access device while the emitter, metal plugs, and phase change memory element are contained within an insulating region. In one embodiment of the invention, a spacer layer is formed and the emitter layer is contained within the protective spacer layer. The spacer layer is contained within the insulating region.

Abstract: Methods of forming diode structures for use in memory cells and memory arrays, such as resistive random access memory (RRAM). The methods include forming a first electrode by chemisorbing a graphite material (e.g., graphene) on a conductive material. A low-k dielectric material may be formed over surfaces of the first electrode exposed through an opening in a dielectric material overlying the first electrode, followed by formation of a high-k dielectric material over the low-k dielectric material. A remaining portion of the opening may be filled with another conductive material to form a second electrode. The first and second electrodes of the resulting diode structure have different work functions and, thus, provide a low thermal budget, a low contact resistance, a high forward-bias current and a low reverse-bias current. A memory cell and a memory array including such a diode structure are also disclosed.

Abstract: The present invention provides a high voltage-resistant lateral double-diffused transistor based on a nanowire device, which relates to the field of microelectronics semiconductor devices.

Abstract: A method of device growth and p-contact processing that produces improved performance for non-polar III-nitride light emitting diodes and laser diodes. Key components using a low defect density substrate or template, thick quantum wells, a low temperature p-type III-nitride growth technique, and a transparent conducting oxide for the electrodes.

Abstract: Disclosed are a growth substrate and a light emitting device. The light emitting device includes a silicon substrate, a first buffer layer disposed on the silicon substrate and having an exposing portions of the silicon substrate, a second buffer layer covering the first buffer layer and the exposed portions of the silicon substrate, wherein the second buffer layer is formed of a material causing a eutectic reaction with the silicon substrate, a third buffer layer disposed on the second buffer layer, and a light emitting structure disposed on the third buffer layer, and the second buffer layer includes voids.

Abstract: Certain embodiments provide a semiconductor light emitting device including: a first metal layer; a stack film including a p-type nitride semiconductor layer, an active layer, and an n-type nitride semiconductor layer; an n-electrode; a second metal layer; and a protection film protecting an outer circumferential region of the upper face of the n-type nitride semiconductor layer, side faces of the stack film, a region of an upper face of the second metal layer other than a region in contact with the p-type nitride semiconductor layer, and a region of an upper face of the first metal layer other than a region in contact with the second metal layer. Concavities and convexities are formed in a region of the upper face of the n-type nitride semiconductor layer, the region being outside the region in which the n-electrode is provided and being outside the regions covered with the protection film.

Abstract: Silicon, silicon-germanium alloy, and germanium nanowire optoelectronic devices and methods for fabricating the same are provided. According to one embodiment, a P-I-N device is provided that includes a parallel array of intrinsic silicon, silicon-germanium or germanium nanowires located between a p+ contact and an n+ contact. In certain embodiments, the intrinsic silicon and germanium nanowires can be fabricated with diameters of less than 4.9 nm and 19 nm, respectively. In a further embodiment, vertically stacked silicon, silicon-germanium and germanium nanowires can be formed.

Abstract: A CMOS device includes a PMOS transistor with a first quantum well structure and an NMOS device with a second quantum well structure. The PMOS and NMOS transistors are formed on a substrate.

Abstract: A p-channel tunneling field effect transistor (TFET) is selected from a group consisting of (i) a multi-layer structure of group IV layers and (u) a multi-layer structure of group III-V layers. The p-channel TFET includes a channel region comprising one of a silicon-germanium alloy with non-zero germanium content and a ternary III-V alloy. An n-channel TFET is selected from a group consisting of (i) a multi-layer structure of group IV layers and (u) a multi-layer structure of group III-V layers. The n-channel TFET includes an n-type region, a p-type region with a p-type delta doping, and a channel region disposed between and spacing apart the n-type region and the p-type region. The p-channel TFET and the n-channel TFET may be electrically connected to define a complementary field-effect transistor element. TFETs may be fabricated from a silicon-germanium TFET layer structure grown by low temperature (500 degrees Centigrade) molecular beam epitaxy.

Abstract: A semiconductor device including a graphene layer and a method of manufacturing the same are disclosed. A method in which graphene is grown on a catalyst metal by a chemical vapor deposition or the like is known. However, the graphene cannot be used as a channel, since the graphene is in contact with the catalyst metal, which is conductive. There is disclosed a method in which a catalyst film (2) is formed over a substrate (1), a graphene layer (3) is grown originating from the catalyst film (2), an electrode (4) in contact with the graphene layer (3) is formed, and the catalyst film (2) is removed.

Abstract: A photoelectric conversion device according to the present invention includes, between a pair of electrodes, an electron donor layer having an interdigitated shape in cross section comprising a stripe-like part in cross section and a base, a plurality of strip-like parts in cross section extending in a direction intersecting electrode main surfaces being formed at intervals in the stripe-like part in cross section; and an electron acceptor layer having an interdigitated shape in cross section comprising a stripe-like part in cross section and a base, a plurality of strip-like parts in cross section extending in a direction intersecting the electrode main surfaces being formed at intervals in the stripe-like part in cross section, the photoelectric conversion device further including an active layer in which the plurality of strip-like parts in cross section of the electron donor layer and the plurality of strip-like parts in cross section of the electron acceptor layer are alternately joined.

Abstract: An organic electroluminescence device includes an anode, a cathode, and an organic thin-film layer interposed between the anode and the cathode. The organic thin-film layer includes a phosphorescent-emitting layer containing a host and a phosphorescent dopant, and an electron transporting layer that is provided closer to the cathode than the phosphorescent-emitting layer. The host contains a substituted or unsubstituted polycyclic fused aromatic skeleton.

Abstract: It is an object of the present invention to provide a novel triazole derivative. Further, it is another object of the present invention to provide a light-emitting element having high luminous efficiency with the use of the novel triazole derivative. Moreover, it is still another object of the present invention to provide a light-emitting device and electronic devices which have low power consumption. A light-emitting element having high luminous efficiency can be manufactured with the use of a triazole derivative which is a 1,2,4-triazole derivative, in which an aryl group or a heteroaryl group is bonded to each of 3-position, 4-position, and 5-position, and in which any one of the aryl group or heteroaryl group has a 9H-carbazol-9-yl group.

Abstract: A light emitting element with a high contrast is realized. A light emitting device with a high contrast is achieved by using the light emitting element with an excellent contrast. The light emitting element has a layer containing a light emitting substance interposed between a first electrode and a second electrode, and the layer containing the light emitting substance includes a light emitting layer, a layer containing a first organic compound, and a layer containing a second organic compound. The first electrode has a light-transmitting property, and the layer containing the first organic compound and the layer containing the second organic compound are interposed between the second electrode and the light emitting layer. Furthermore, color of the first organic compound and color of the second organic compound are complementary.

Abstract: An organic electroluminescence device includes: an anode; a cathode being opposed to the anode; and an emitting layer being provided between the anode and the cathode. The emitting layer includes a host material and a phosphorescent dopant material. The host material includes a monoamine derivative represented by a formula-(1A) below. In the formula (1A), each of Ar1, Ar2 and Ar4 is a substituted or unsubstituted aryl group or heteroaryl group, Ar3 is a substituted or unsubstituted arylene group or heteroarylene group, n is an integer of 0 to 5, Ar3 may be mutually the same or different when n is 2 or more, and at least one of Ar1, Ar2, Ar3, and Ar4 is a group derived from a fused aromatic hydrocarbon skeleton having 3 or more rings.

Abstract: The organic memory device is a double-gate transistor that successively comprises a first gate electrode, a first gate dielectric, an organic semi-conductor material, a second gate dielectric and a second gate electrode. Source and drain electrodes are arranged in the organic semiconductor material and define an inter-electrode surface. A trapping area is arranged between the organic semiconductor material and one of the gate electrodes and is in electric contact with one of the gate electrodes or the organic semi-conductor material. The trapping area is at least facing the inter-electrode surface.

Abstract: An organic transistor (1) includes: an injection improvement layer (40) between a source electrode (14) and an organic semiconductor layer (16); and an extraction improvement layer (50) between a drain electrode (15) and the organic semiconductor layer (16). An electric dipole moment of a material or molecules of the extraction improvement layer (50) has an absolute value lager than that of the injection improvement layer (40). Accordingly, all carriers in the organic semiconductor, which are injected from the source electrode during operation of the transistor, can be drawn out (extracted) into the drain electrode. This reduce contact resistances. Therefore, provided are the organic transistor that reduces a contact resistance between the organic semiconductor layer and the source electrode and a contact resistance between the organic semiconductor layer and the drain electrode and attains to demonstrate stable operation, and a method for fabricating the organic transistor.

Abstract: The present invention relates to dinuclear Pt-carbene complexes comprising carbene ligands and pyrazole bridges, to a process for preparing the dinuclear Pt-carbene complexes by contacting suitable Pt compounds with the corresponding ligands or ligand precursors and/or pyrazole or corresponding pyrazole derivatives, to organic electronic components comprising at least one such dinuclear Pt-carbene complex, to an OLED comprising at least one such dinuclear Pt-carbene complex, to a light-emitting layer comprising at least one such dinuclear Pt-carbene complex, to an OLED comprising such a light-emitting layer, to a device selected from the group consisting of stationary visual display units, mobile visual display units and illumination means, comprising such an OLED, and to the use of an inventive dinuclear Pt-carbene complex in OLEDs.

Abstract: Provided are an organic semiconductor material, organic semiconductor thin film and organic thin-film transistor, which contain a perylene tetracarboxylic diimide derivative represented by the following formula (1): In the formula (1), R1 means a linear or branched alkyl group having from 1 to 20 carbon atoms, R2 means a linear or branched alkyl group having from 2 to 6 carbon atoms, R3 means a linear or branched alkyl group having from 2 to 6 carbon atoms, X1 and X2 each mean a heteroatom selected from an oxygen atom, sulfur atom or selenium atom, Y means a halogen atom or cyano group, m stands for a number of from 0 to 4, and n stands for a number of from 0 to 2. Further, the alkyl groups represented by R1 and R2 may each be substituted with one or more fluorine atoms.

Abstract: An organic electroluminescent device comprising an anode, a cathode, a light emitting layer that is disposed between the anode and the cathode and contains a first light emitting layer material containing a phosphorescent compound and a second light emitting layer material containing a charge transporting polymer compound (that is, a light emitting layer containing a first light emitting layer material and a second light emitting layer material), and a hole transporting layer that is disposed between the anode and the light emitting layer so as to be adjacent to the light emitting layer and is composed of a hole transporting polymer compound, wherein the lowest excitation triplet energy T1e (eV) of the first light emitting layer material, the lowest excitation triplet energy T1h (eV) of the second light emitting layer material and the lowest excitation triplet energy T1t (eV) of the hole transporting polymer compound satisfy the following formulae (A) and (B): T1e?T1h??(A) T1t?T1e?0.10??(B).

Abstract: Two light receiving elements are formed on a support substrate. A first light receiving element is formed of a p-type layer, an n-type layer, a light absorption semiconductor layer, an anode electrode, a cathode electrode, a protection film, etc. A second light receiving element is formed of a p-type layer, an n-type layer, a transmissive film, an anode electrode, a cathode electrode, a protection film, etc. The light absorption semiconductor layer absorbs light in a wavelength range ? and disposed closer to the light receiving surface than is the pn junction region. The transmissive film has no light absorption range and disposed closer to the light receiving surface than is the pn junction region. The amount of light in the wavelength range ? is measured through computation using a detection signal from the first light receiving element and a detection signal from the second light receiving element.

Abstract: According to one embodiment, a method of manufacturing a thin-film transistor circuit substrate including forming an oxide semiconductor thin film above an insulative substrate, forming a gate insulation film and a gate electrode which are stacked on a first region of the oxide semiconductor thin film, and exposing from the gate insulation film a second region and a third region of the oxide semiconductor thin film, the second region and the third region being located on both sides of the first region of the oxide semiconductor thin film, forming an interlayer insulation film of silicon nitride including dangling bonds of silicon, the interlayer insulation film covering the second region and the third region of the oxide semiconductor thin film, the gate insulation film and the gate electrode, and forming a source electrode and a drain electrode.

Abstract: A method is provided for growing a stable p-type ZnO thin film with low resistivity and high mobility. The method includes providing an n-type Li—Ni co-doped ZnO target in a chamber, providing a substrate in the chamber, and ablating the target to form the thin film on the substrate.

Abstract: A semiconductor device includes: plural devices to be measured; and a combined array wiring including plural unit array wirings each having a column wiring and a row wiring provided in different layers as well as each connected to any one of the plural devices to be measured, in which the plural unit array wirings are provided in layers different from each other.

Abstract: Temperatures in microelectronic integrated circuit packages and components may be measured in situ using carbon nanotube networks. An array of carbon nanotubes strung between upstanding structures may be used to measure local temperature. Because of the carbon nanotubes, a highly accurate temperature measurement may be achieved. In some cases, the carbon nanotubes and the upstanding structures may be secured to a substrate that is subsequently attached to a microelectronic package.

Abstract: To provide a liquid crystal display device having high visibility and high image quality by relieving color phase irregularity. A light-shielding layer is selectively provided so as to overlap with a contact hole for electrical connection to a source region or a drain region of a thin film transistor. Alternatively, by providing an opening portion of a colored layer (color filter) with an opening so as to overlap with a contact hole, uneven alignment of liquid crystal molecules does not influence display, and a liquid crystal display having high image quality can be provided.

Abstract: The present invention relates to a process for producing a doped silicon layer on a substrate, comprising the steps of (a) providing a liquid silane formulation and a substrate, (b) applying the liquid silane formulation to the substrate, (c) introducing electromagnetic and/or thermal energy to obtain an at least partly polymorphic silicon layer, (d) providing a liquid formulation which comprises at least one aluminium-containing metal complex, (e) applying this formulation to the silicon layer obtained after step (c) and then (f) heating the coating obtained after step (e) by introducing electromagnetic and/or thermal energy, which decomposes the formulation obtained after step (d) at least to metal and hydrogen, and then (g) cooling the coating obtained after step (f) to obtain an Al-doped or Al- and metal-doped silicon layer, to doped silicon layers obtainable by the process and to the use thereof for production of light-sensitive elements and electronic components.

Abstract: A radiation detector of this invention has a barrier layer on the upper surface of a high resistance film along the outer edge of a common electrode, which enables prevention of a chemical reaction between an amorphous semiconductor layer and a curable synthetic resin. The barrier layer is adhesive to the curable synthetic resin film, and this can prevent strength being insufficient, such that temperature changes cause separation in interfaces between the barrier layer and curable synthetic resin film, thereby reducing the effect of inhibiting warpage and cracking. The material for the barrier layer is an insulating material not including a substance that would chemically react with the amorphous semiconductor layer. This can prevent components of the material for the barrier layer from chemically reacting with the semiconductor layer. Consequently, creeping discharge at the outer edge of the common electrode where electric fields concentrate can be prevented.

Abstract: The present invention relates to a display device and a manufacturing method thereof. A display device according to an exemplary embodiment of the present invention includes a substrate including a first surface and a second surface, a first line disposed on the first surface and made of a transparent metal oxide semiconductor, and a first semiconductor disposed on the first surface and made of the transparent metal oxide semiconductor.

Abstract: The present invention relates to a thin film transistor array panel and a manufacturing method thereof, and a thin film transistor array panel according to an exemplary embodiment of the present invention includes: a substrate; a first conductive layer disposed on the substrate; a second conductive layer overlapping at least a portion of the edge of the first conductive layer on the first conductive layer and including a first portion overlapping the first conductive layer and a second portion not overlapping the first conductive layer; a first insulating layer disposed on the second conductive layer and having a contact hole exposing at least a portion of a boundary between the first portion and the second portion; and a third conductive layer disposed on the first insulating layer and simultaneously contacting the first portion and the second portion that are exposed through the contact hole.

Abstract: The present invention provides a method of manufacturing a thin film transistor of a top-contact structure with suppressed deterioration by a process which is easy and suitable for increase in area without damaging an organic semiconductor pattern. The organic semiconductor pattern is formed on a substrate. An electrode material film is formed on the substrate so as to cover the organic semiconductor pattern. A resist pattern is formed on the electrode material film. By wet etching using the resist pattern as a mask, the electrode material film is patterned. By the process, a source electrode and a drain electrode are formed.

Abstract: In an organic EL element (7), a positive and negative charge transporting layer (30) includes an anode (4), an organic EL layer (8), and a cathode (9). The anode (4) is constituted by an acceptor and the cathode (9) is constituted by a donor. An acceptor that is the same as the material of the anode (4) is added to the hole transport region (100) in the organic EL layer (8) so that a concentration of the acceptor becomes continuously lower toward the light-emitting region (101). A donor that is the same as the material of the cathode (9) is added to the electron transport region (102) so that a concentration of the donor becomes continuously lower toward the light-emitting region (101).

Abstract: A manufacturing method of a thin film transistor array panel includes: simultaneously forming a gate conductor and a first electrode on a substrate, using a non-peroxide-based etchant; forming a gate insulating layer on the gate conductor and the first electrode; forming a semiconductor, a source electrode, and a drain electrode on the gate insulating layer; forming a passivation layer on the semiconductor, the source electrode, and the drain electrode; and forming a second electrode layer on the passivation layer.

Abstract: It is an object of the present invention to provide an organic transistor having a low drive voltage. It is also another object of the present invention to provide an organic transistor, in which light emission can be obtained, which can be manufactured simply and easily. According to an organic light-emitting transistor, a composite layer containing an organic compound having a hole-transporting property and a metal oxide is used as part of the electrode that injects holes among source and drain electrodes, and a composite layer containing an organic compound having an electron-transporting property and an alkaline metal or an alkaline earth metal is used as part of the electrode that injects electrons, where either composite layer has a structure of being in contact with an organic semiconductor layer.

Abstract: In a CMOS circuit formed on a substrate 100, a subordinate gate wiring line (a first wiring line) 102a and main gate wiring line (a second wiring line) 113a are provided in an n-channel TFT. The LDD regions 107a and 107b overlap the first wiring line 102a and not overlap the second wiring line 113a. Thus, applying a gate voltage to the first wiring line forms the GOLD structure, while not applying forms the LLD structure. In this way, the GOLD structure and the LLD structure can be used appropriately in accordance with the respective specifications required for the circuits.

Abstract: Techniques for manufacturing optical devices, such as light emitting diodes (LEDs) using a separation process of thick gallium and nitrogen containing substrate members, are described.

Abstract: A highly integrated DRAM is provided. A bit line is formed over a first insulator, a second insulator is formed over the bit line, third insulators which are in a stripe shape and the like are formed over the second insulator, and a semiconductor region and a gate insulator are formed to cover one of the third insulators. The bit line is connected to the semiconductor region through first contact plugs. Then, a conductive film is formed and subjected to anisotropic etching to form word lines at side surfaces of the third insulators, and a second contact plug is formed to be connected to a capacitor at a top of the one of the third insulators. By synchronizing the word lines, electric charge is accumulated or released through the capacitor. With such a structure, the area of a memory cell can be 4F2.