Patents Issued in March 22, 2016
  • Patent number: 9292363
    Abstract: Predicting consumption of APIs is provided. A set of consumed APIs corresponding to a user and software service applications related to APIs associated with the user is determined based on an API consumption history. A set of users related to the set of consumed APIs corresponding to the user and the software service applications related to the APIs associated with the user is retrieved from an API analytics engine. A set of API consumption prediction models corresponding to the user is generated based on the APIs associated with the user, the software service applications related to the APIs associated with the user, the set of consumed APIs corresponding to the user and the software service applications related to the APIs associated with the user based on the API consumption history, the set of users related to the set of consumed APIs, and APIs associated with the set of users.
    Type: Grant
    Filed: March 5, 2014
    Date of Patent: March 22, 2016
    Assignee: International Business Machines Corporation
    Inventors: Jim A. Laredo, Maja Vukovic
  • Patent number: 9292364
    Abstract: A technique is described providing offline support to business applications. Offline support allows a business application running on a portable electronic device without connectivity to a backend server to operate as though the business application has access to a backend server. The technique receives a client request to operate the application in an offline mode. The technique then retrieves a business object to be utilized in the offline mode and an event trigger for interacting with the business object. The native programming language is then determined and then an event handler written in a native language of the client device and that is associated with the event trigger is retrieved. The event trigger is then modified to point to the event handler. The business object, event trigger, and event handler are then packaged together.
    Type: Grant
    Filed: September 23, 2014
    Date of Patent: March 22, 2016
    Assignee: SAP SE
    Inventors: Mario Linge, Ananda Kumar Gajula, Jianxun Zhou, Oscar Marquez, Xiaojun Feng, Yang-cheng Fan, Ming Zhu, Paul Xi, Marco Eidinger, Mohamed Elzankaly
  • Patent number: 9292365
    Abstract: A computer system comprises a processor (106) configured to respond to events from a plurality of sources, and a prioritisation module (104) implemented in hardware and configured to prioritise the events for the processor. The prioritisation module comprises one or more decision modules (108) comprising multiple, prioritised inputs (110) configured to receive respective event flags relating to events from respective sources. The decision module stores a source identifier of the source corresponding to the highest priority asserted event flag. The processor can read the stored source identifier to identify the source of an event to which the processor is to respond. In this way, the decision as to which event a processor should respond to next is offloaded from the processor and implemented in hardware in the prioritisation module. This can reduce the workload of the processor and thereby result in a more efficient computer system.
    Type: Grant
    Filed: March 25, 2015
    Date of Patent: March 22, 2016
    Assignee: Imagination Technologies Limited
    Inventors: David William Knox, Adrian John Anderson
  • Patent number: 9292366
    Abstract: A method and system for processing electronic documents. A temporary computer object is created. An address of a first electronic document is obtained. A first tag, a second tag, and the address of the first electronic document are copied into a header of the created temporary computer object. Selected text from the first electronic document is obtained. The first and second tag respectively mark the beginning and the end of the header. The address of the first electronic document is disposed between the first and second tags. The selected text and a third tag are copied into the created temporary computer object. The third tag marks the end of the created temporary computer object. The selected text is disposed between the header of the created temporary computer object and the third tag. The created temporary computer object is stored in a second electronic document.
    Type: Grant
    Filed: September 6, 2012
    Date of Patent: March 22, 2016
    Assignee: International Business Machines Corporation
    Inventors: Fernando Incertis Carro, Rita Asuncion Jarillo Sanchez, Ghislain Imbert De Tremiolles
  • Patent number: 9292367
    Abstract: A state migration module (SMM) is described herein which seamlessly, efficiently, and correctly transfers application state between user computing devices, or between different interactions with the application on the same device that occur at different respective times. The SMM operates by capturing the current state of an application relative to the operation of a high-level execution platform (such as a browser) on which the application runs, rather than capturing the overall low-level state of the computing that runs the application. The SMM can include additional provisions designed to improve the efficiency of state migration, such as asynchronous migration, incremental delta-based migration, etc.
    Type: Grant
    Filed: April 8, 2014
    Date of Patent: March 22, 2016
    Assignee: Microsoft Corporation
    Inventor: James W. Mickens
  • Patent number: 9292368
    Abstract: An approach is provided for controlling a user device native function via a web-based application at a user device (e.g., a mobile terminal). The mobile terminal executes a web-based application and a shell application, wherein the shell application provides communication between the web-based application and a native function of the mobile terminal. The mobile terminal registers the web-based application with the shell application for the communication. The mobile terminal invokes the native function of the mobile terminal via the communication based upon a communication protocol that specifies a command of a native function associated with a set top box.
    Type: Grant
    Filed: December 27, 2010
    Date of Patent: March 22, 2016
    Assignee: VERIZON PATENT AND LICENSING INC.
    Inventors: Balamuralidhar Maddali, T. Sahaya George, Madan Kanth Lanka, Thalha Yasir Refaye, Mahendra Nimishakavi, Ravikiran Tummala, Vasanthakumar Sarpasayanam, Sivasankari S. Vekataramamoorthy, Shivakrishna Kanike, Gourgopal Nandi, Vikaskumar Gupta, Naman Patel
  • Patent number: 9292369
    Abstract: An agent unit acquires apparatus status information that indicates a status of the electronic apparatus from an electronic apparatus. A remote maintenance server transmits an acquisition instruction of the apparatus status information to the agent unit and receives the apparatus status information from the agent unit if acquisition of the apparatus status information succeeded. The remote maintenance server (a) acquires operation schedule information on the electronic apparatus, (b) transmits an acquisition instruction of the apparatus status information to the agent unit, (c) registers a retransmission schedule of the acquisition instruction so as to transmit the acquisition instruction at a timing within an operation period of the electronic apparatus determined from the operation schedule if acquisition of the apparatus status information failed, and (d) transmits the acquisition instruction to the agent unit at the timing of the retransmission schedule.
    Type: Grant
    Filed: March 8, 2014
    Date of Patent: March 22, 2016
    Assignee: Kyocera Document Solutions, Inc.
    Inventors: Daisuke Yoshida, Toyoaki Oku, Koki Nakajima, Takeshi Nakamura, Yoshihiko Arai, Atsushi Matsumoto
  • Patent number: 9292370
    Abstract: A first network device includes a forwarding controller configured to forward received data and a fault detector configured to detect occurrence of a failure in a remote second relay node. The forwarding controller includes a forwarding unit configured to forward the received data and a modifier configured to modify the received data for detection of the occurrence of a failure in the second relay node. The modifier includes a flag option marker configured to attach a flag to data, a sequence adding unit configured to add a protocol specific number to a sequence number, and a sequence subtracting unit configured to subtract the protocol specific number from an acknowledgement number. The fault detector detects the occurrence of a failure in the remote second relay node based on at least one of the flag or the acknowledgement number.
    Type: Grant
    Filed: December 30, 2014
    Date of Patent: March 22, 2016
    Assignees: Hitachi, Ltd., Alaxala Networks Corporation
    Inventors: Hideyuki Magoshi, Satoshi Kiyotou
  • Patent number: 9292371
    Abstract: A computer-implemented method for preventing failures of nodes in clusters may include (1) identifying a node that is part of a cluster of nodes and that communicates, via a heartbeat sent at a regular interval to the cluster, that the node is functional and connected to the cluster, (2) calculating a current workload for the node based on a utilization of computing resources on the node, (3) determining, based on the current workload, that the node is functional and connected but is in an excessive load condition and a failure to send the heartbeat within the regular interval is due to the excessive load condition, and (4) setting a new interval for the heartbeat of the node that is longer than the regular interval in response to determining that the node cannot send the heartbeat at the regular interval. Various other methods, systems, and computer-readable media are also disclosed.
    Type: Grant
    Filed: December 11, 2013
    Date of Patent: March 22, 2016
    Assignee: Symantec Corporation
    Inventor: Thomas G. Clifford
  • Patent number: 9292372
    Abstract: A safety device with an error indication function includes at least one ERROR pad configured between the error indication function and at least one normal function, and a set of multiplexers connected to the ERROR pad. The safety device further includes an error indication block and a functional block multiplexed by the set of multiplexers. The error indication block includes a fault collection and control unit for collecting and providing error occurrence information to the ERROR pad, and an ERROR pad select control register for storing ERROR pad selection and configuration information to control select inputs of the first set of multiplexers and provide the ERROR pad configuration information to the ERROR pad.
    Type: Grant
    Filed: May 18, 2014
    Date of Patent: March 22, 2016
    Assignee: FREESCALE SEMICONDUCTOR, INC.
    Inventors: Chandan Gupta, Neha Bagri, Ray C. Marshall
  • Patent number: 9292373
    Abstract: Embodiments relate to a method and computer program product for error handling. The method includes performing at least one query operation. The processing of query operation also includes generating error information data based at least an error encountered during performance of the query operation and generating a data result relating to any portion of the query operation successfully completed. The data result is processed together with the error information data based on encountering any errors. The data result and error information are provided together in a package but separated by an indicator to distinguish between them.
    Type: Grant
    Filed: March 15, 2013
    Date of Patent: March 22, 2016
    Assignee: International Business Machines Corporation
    Inventors: Vuk Ercegovac, Carl-Christian Kanne
  • Patent number: 9292374
    Abstract: The invention enhances automatic incident control, problem control, and problem prevention using information provided by the analysis or analysis data. The burden on the part of both users and providers to resolve problems is reduced by using a method of automatic analysis data upload and intelligent problem analysis and resolution. Problems are better identified, investigated, diagnosed, recorded, classified, and tracked until affected services return to normal operation and errors trends are used to proactively prevent future problems.
    Type: Grant
    Filed: June 21, 2011
    Date of Patent: March 22, 2016
    Assignee: RHAPSODY INTERNATIONAL INC.
    Inventor: Frank Fabbrocino
  • Patent number: 9292375
    Abstract: A memory management method for receiving a multi channel hybrid automatic repeat request (HARQ) packet may enable smooth communication and reduce costs by maintaining a small memory size of a receiver in a communication system using a HARQ including a plurality of channels.
    Type: Grant
    Filed: March 14, 2013
    Date of Patent: March 22, 2016
    Assignee: Electronics and Telecommunications Research Institute
    Inventor: Tae Chul Hong
  • Patent number: 9292376
    Abstract: A system for proactive resource reservation for protecting virtual machines. The system includes a cluster of hosts, wherein the cluster of hosts includes a master host, a first slave host, and one or more other slave hosts, and wherein the first slave host executes one or more virtual machines thereon. The first slave host is configured to identify a failure that impacts an ability of the one or more virtual machines to provide service, and calculate a list of impacted virtual machines. The master host is configured to receive a request to reserve resources on another host in the cluster of hosts to enable the impacted one or more virtual machines to failover, calculate a resource capacity among the cluster of hosts, determine whether the calculated resource capacity is sufficient to reserve the resources, and send an indication as to whether the resources are reserved.
    Type: Grant
    Filed: August 23, 2013
    Date of Patent: March 22, 2016
    Assignee: VMware, Inc.
    Inventors: Joanne Ren, Keith Farkas, Elisha Ziskind, Igor Tarashansky, Manoj Krishnan
  • Patent number: 9292377
    Abstract: Methods and apparatus are provided for detection and decoding in flash memories using a correlation of neighboring bits or errors in neighboring bits. Data from a flash memory device is processed by obtaining one or more read values for a plurality of bits in one or more pages of the flash memory device; converting the one or more read values for the plurality of bits to a reliability value, such as a log likelihood ratio (LLR), for a given bit among said plurality of bits based on a probability that a data pattern was written to the plurality of bits given that a particular pattern was read from the plurality of bits; and decoding the given bit in a given page of the one or more pages using the reliability value. The probability may be obtained from one or more transition probability tables, or may be based on one or more reference cells, prior decoded decisions or performance factors.
    Type: Grant
    Filed: December 31, 2012
    Date of Patent: March 22, 2016
    Assignee: Seagate Technology LLC
    Inventors: Abdel Hakim S. Alhussien, Erich F. Haratsch
  • Patent number: 9292378
    Abstract: An SEU protection circuit comprises first and second storage means for receiving primary and redundant versions, respectively, of an n-bit wide data value that is to be corrected in case of an SEU occurrence; the correction circuit requires that the data value be a 1-hot encoded value. A parity engine performs a parity operation on the n bits of the primary data value. A multiplexer receives the primary and redundant data values and the parity engine output at respective inputs, and is arranged to pass the primary data value to an output when the parity engine output indicates ‘odd’ parity, and to pass the redundant data value to the output when the parity engine output indicates ‘even’ parity. The primary and redundant data values are suitably state variables, and the parity engine is preferably an n-bit wide XOR or XNOR gate.
    Type: Grant
    Filed: May 29, 2014
    Date of Patent: March 22, 2016
    Assignee: TELEDYNE SCIENTIFIC & IMAGING, LLC
    Inventors: John Wallner, Michael Gorder
  • Patent number: 9292379
    Abstract: Apparatus, systems, and methods to manage high capacity memory devices are described. In one example, a controller comprises logic to receive a write operation comprising payload data, a namespace identifier (ID) and a first extended logical block address (LBA), compute a first system cyclic redundancy check (CRC) using a payload CRC, the namespace ID and the first extended LBA, store the first system CRC in association with the first extended LBA in a local memory, and write the payload data, the first system CRC, and a truncated LBA derived from the first extended LBA to a memory. Other examples are also disclosed and claimed.
    Type: Grant
    Filed: September 28, 2013
    Date of Patent: March 22, 2016
    Assignee: Intel Corporation
    Inventors: Knut Grimsrud, Jawad Khan, Richard Mangold
  • Patent number: 9292380
    Abstract: Hardware processors in an SOC integrated circuit logically swapping memories by remapping memory addresses, including tightly coupled and local memories, to enable a sequence of data-processing algorithms to execute more quickly by different hardware processors without having to copy the data between different memories using a relatively slow data crossbar switch. When a memory stores error-correction code (ECC) address information linking stored ECC data with stored user data, the hardware processor dynamically remaps the ECC address information, as needed.
    Type: Grant
    Filed: April 6, 2014
    Date of Patent: March 22, 2016
    Assignee: FREESCALE SEMICONDUCTOR,INC.
    Inventors: Nitin Singh, Gaurav Jain, Amit Jindal, Rohit Tomar
  • Patent number: 9292381
    Abstract: A method for operating a memory (28) includes storing data in a group of analog memory cells (32) of the memory as respective first voltage levels. After storing the data, second voltage levels are read from the respective analog memory cells. The second voltage levels are affected by cross-coupling interference causing the second voltage levels to differ from the respective first voltage levels. Cross-coupling coefficients, which quantify the cross-coupling interference among the analog memory cells, are estimated by processing the second voltage levels. The data stored in the group of analog memory cells is reconstructed from the read second voltage levels using the estimated cross-coupling coefficients.
    Type: Grant
    Filed: November 26, 2013
    Date of Patent: March 22, 2016
    Assignee: Apple Inc.
    Inventors: Ofir Shalvi, Naftali Sommer, Eyal Gurgi, Ariel Maislos
  • Patent number: 9292382
    Abstract: The present disclosure includes apparatuses and methods for codewords that span pages of memory. A number of methods include writing a first portion of a primary codeword to a first page in a first block of memory and writing a second portion of the primary codeword to a second page in a second block of memory. The primary codeword can be included in a secondary codeword. The method can include writing a first portion of the secondary codeword in the memory and writing a second portion of the secondary codeword to a different page and block of the memory than the first portion of the secondary codeword.
    Type: Grant
    Filed: July 17, 2015
    Date of Patent: March 22, 2016
    Assignee: Micron Technology, Inc.
    Inventors: Troy D. Larsen, Martin L. Culley
  • Patent number: 9292383
    Abstract: Embodiments of the present disclosure provide methods, systems, and apparatuses related to multilevel encoding with error correction. In some embodiments, a plurality of bits may be encoded into a plurality of memory cells by level-shifting a subset of the plurality of multilevel memory cells for a bit of the plurality of bits. Other embodiments may be described and claimed.
    Type: Grant
    Filed: October 9, 2014
    Date of Patent: March 22, 2016
    Assignee: Micron Technology, Inc.
    Inventor: Christopher Bueb
  • Patent number: 9292384
    Abstract: Apparatuses, methods and storage medium associated with generating erasure codes for data to be stored in a storage system. In embodiments, a method may include launching, by storage system, a plurality of instances of an erasure code generation module, based at least in part on hardware configuration of the storage system. Additionally, the method may further include setting, by the storage system, operational parameters of the plurality of instances of the erasure code generation module, based at least in part on current system load of the storage system. Further, the method may include operating, by the storage system, the plurality of instances of the erasure code generation module to generate erasure codes for data to be stored in the storage system, in accordance with the operational parameters set. Other embodiments may be described and claimed.
    Type: Grant
    Filed: August 5, 2013
    Date of Patent: March 22, 2016
    Assignee: Intel Corporation
    Inventors: Jun Jin, Zhonghui Jin, Nan Stan Qiao, Zeyu Di
  • Patent number: 9292385
    Abstract: A method begins with a computing device dividing data into data partitions. For a data partition of the data partitions, the method continues with the computing device associating indexing information with the data partition. The method continues with the computing device segmenting the data partition into a plurality of data segments. The method continues with the computing device dispersed storage error encoding the plurality of data segments to produce a plurality of sets of encoded data slices. The method continues with the computing device grouping encoded data slices of the plurality of sets of encoded data slices to produce a set of groupings of encoded data slices.
    Type: Grant
    Filed: March 2, 2015
    Date of Patent: March 22, 2016
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Wesley Leggette, Andrew Baptist, Greg Dhuse, Jason K. Resch, Ilya Volvovski, Manish Motwani, S. Christopher Gladwin, Gary W. Grube, Thomas Franklin Shirley, Jr., Timothy W. Markison
  • Patent number: 9292386
    Abstract: A system stores at least one item of connection information for each of a plurality of processing systems. The system receives a request from the requesting apparatus and, in response to receiving the request, sets a status related to one item of the connection information stored in the storage unit for connection to one of the processing systems. The system transmits the received request to the one processing system by using the one item of connection information and receives a response denoting a result of the processing from the one processing system. Responsive to receiving the response, the system releases the status related to the one item of connection information, and transmits the response to the requesting apparatus.
    Type: Grant
    Filed: March 18, 2014
    Date of Patent: March 22, 2016
    Assignee: International Business Machines Corporation
    Inventors: Noriaki Kohno, Hideki Nagasawa
  • Patent number: 9292387
    Abstract: A medium stores a control program for an information processing apparatus. The control program causes the information processing apparatus to execute a procedure. The procedure includes obtaining history information on a type of an operation performed to each of a plurality of files, calculating a priority for a file among the files based on the type of the operation in the history information, and selecting a file among the files based on the priority.
    Type: Grant
    Filed: September 12, 2013
    Date of Patent: March 22, 2016
    Assignee: FUJITSU LIMITED
    Inventors: Akira Itasaki, Tatsuro Matsumoto, Isamu Yamada, Hiroyasu Sugano, Koichi Yasaki, Hideki Tanaka, Koichi Yokota, Zhaogong Guo, Daisuke Yamashita
  • Patent number: 9292388
    Abstract: According to certain aspects, a computer system may be configured to obtain information indicating a plurality of groupings of data stored in a data source, the information indicating a number of data items included in each of the plurality of groupings; determine a first grouping of the plurality of groupings including one or more data items that have changed by comparing a first number of data items included in the first grouping and a historical first number of data items included in a corresponding local version of the first grouping; access data items included in the first grouping from the data source; compare the data items included in the first grouping to data items of the corresponding local version of the first grouping to determine which data items have changed; extract the changed data items of the first grouping; and forward the extracted data items to a destination system.
    Type: Grant
    Filed: December 23, 2014
    Date of Patent: March 22, 2016
    Assignee: Palantir Technologies Inc.
    Inventors: William Fisher, Peter Maag
  • Patent number: 9292389
    Abstract: A method of prioritizing data for recovery in a distributed storage system includes, for each stripe of a file having chunks, determining whether the stripe comprises high-availability chunks or low-availability chunks and determining an effective redundancy value for each stripe. The effective redundancy value is based on the chunks and any system domains associated with the corresponding stripe. The distributed storage system has a system hierarchy including system domains. Chunks of a stripe associated with a system domain in an active state are accessible, whereas chunks of a stripe associated with a system domain in an inactive state are inaccessible. The method also includes reconstructing substantially immediately inaccessible, high-availability chunks having an effective redundancy value less than a threshold effective redundancy value and reconstructing the inaccessible low-availability and other inaccessible high-availability chunks, after a threshold period of time.
    Type: Grant
    Filed: January 31, 2014
    Date of Patent: March 22, 2016
    Assignee: Google Inc.
    Inventors: Steven Robert Schirripa, Christian Eric Schrock, Robert Cypher, Sean Quinlan
  • Patent number: 9292390
    Abstract: Systems and methods for error recovery include determining an error in at least one stage of a plurality of stages during a first cycle on a hardware circuit, each of the plurality of stages having a main latch and a shadow latch. A first signal is transmitted to an output stage of the at least one stage to stall the main latch and the shadow latch of the output stage during a second cycle. A second signal is transmitted to an input stage of the at least one stage to stall the main latch of the input stage during the second cycle and to stall the main latch and the shadow latch of the input stage during a third cycle. Data is restored from the shadow latch to the main latch for the at least one stage and the input stage to recover from the error.
    Type: Grant
    Filed: July 15, 2013
    Date of Patent: March 22, 2016
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Jae-Joon Kim, Yu-Shiang Lin, Insup Shin
  • Patent number: 9292391
    Abstract: A method includes communicating over an interface between a controller and multiple memory dies, which comprise respective on-die terminations (ODTs) that are each connectable to the interface by the controller. A plurality of termination settings are evaluated, each termination setting specifies a respective subset of the ODTs to be connected to the interface, so as to identify a preferred termination setting in which the communication quality with a given memory die meets a predefined criterion. Subsequent communication with the given memory die is performed while applying the preferred termination setting.
    Type: Grant
    Filed: February 12, 2014
    Date of Patent: March 22, 2016
    Assignee: Apple Inc.
    Inventors: Shai Ojalvo, Eyal Gurgi, Yoav Kasorla
  • Patent number: 9292392
    Abstract: A memory module includes a memory module copy engine for copying data from an active memory die to a spare memory die. Access is mapped away from the active memory die to the spare memory die.
    Type: Grant
    Filed: June 30, 2011
    Date of Patent: March 22, 2016
    Assignee: Hewlett Packard Enterprise Development LP
    Inventor: Lidia Warnes
  • Patent number: 9292393
    Abstract: Systems and methods for redundant object storage are disclosed. A method may include storing at least two copies of each of a plurality of objects among a plurality of nodes communicatively coupled to one another in order to provide redundancy of each of the plurality of objects in the event of a fault of one of the plurality of nodes. The method may also include monitoring access to each object to determine a frequency of access for each object. The method may additionally include redistributing one or more of the copies of the objects such that at least one particular node of the plurality of nodes includes copies of only objects accessed at a frequency below a predetermined frequency threshold based on the determined frequency of access for each object. The method may further include placing the at least one particular node in a reduced-power mode.
    Type: Grant
    Filed: August 18, 2014
    Date of Patent: March 22, 2016
    Assignee: DELL PRODUCTS L.P.
    Inventors: Seth Feder, Farzad Khosrowpour, Kevin Marks
  • Patent number: 9292394
    Abstract: An indication of a page type which failed error correction decoding is received. A threshold to adjust is selected from a plurality of thresholds based at least in part on the page type. A third adjusted threshold associated with the page type is generated, including by: determining a first number of flipped bits using a first adjusted threshold associated with the page type, determining a second number of flipped bits using a second adjusted threshold associated with the page type, and generating the third adjusted threshold using the first number of flipped bits and the second number of flipped bits.
    Type: Grant
    Filed: December 2, 2014
    Date of Patent: March 22, 2016
    Assignee: SK Hynix memory solutions inc.
    Inventors: Yingquan Wu, Marcus Marrow
  • Patent number: 9292395
    Abstract: A debug stub server comprises: an arbitration unit that receives a plurality of control instructions given to a debug program from a plurality of information terminals, selects a simultaneously executable control instruction set from among the plurality of control instructions by arbitrating the plurality of control instructions, and forwards the selected control instruction set to the debug program; and a forwarding unit that forwards a debug result obtained by the debug program based on the control instruction set selected by the arbitration unit to the plurality of information terminals.
    Type: Grant
    Filed: December 7, 2011
    Date of Patent: March 22, 2016
    Assignee: NEC CORPORATION
    Inventor: Yuichi Nakamura
  • Patent number: 9292396
    Abstract: An information handling system includes a processor and a management controller separate from the processor. The management controller is operable to boot the information handling system to a system service management module, direct the system service management module to execute diagnostics code on the processor and to store a result from the execution of the diagnostics code in a predetermined memory location. The management controller is also operable to retrieve the result from the predetermined memory location.
    Type: Grant
    Filed: July 30, 2013
    Date of Patent: March 22, 2016
    Assignee: Dell Products, LP
    Inventors: Weijia Zhang, Mark A. Young, Jerry M. Jones, Sumeet Kukreja, Vance E. Corn, Jon R. Hass, William C. Edwards
  • Patent number: 9292397
    Abstract: The present invention relates generally to networking, and more particularly to techniques and products for verifying, qualifying and/or quantifying the performance of networking devices and infrastructure. According to certain aspects, test equipment according to embodiments of the invention performs stress tests using both client and server emulation with very low overhead, providing a virtually unlimited number of servers and/or clients. According to further aspects, tests include the transfer of real files between clients and servers, not just test patterns. According to further aspects, test equipment includes an easy to use Web GUI interface. According to further aspects, tests are performed using TCP protocol, which is the predominant form of network traffic.
    Type: Grant
    Filed: May 14, 2013
    Date of Patent: March 22, 2016
    Assignee: NETLOAD, INC.
    Inventors: Alexander Michael Kleyman, Yakov Teplitsky
  • Patent number: 9292398
    Abstract: Embodiments relate to design-based weighting for logic built-in self-test (LBIST). An aspect includes an integrated circuit development system for implementing design-based weighting for LBIST. The system includes a memory system to create an integrated circuit layout. A processing circuit is coupled to the memory system. The processing circuit is configured to execute integrated circuit development tools to perform a method. The method includes analyzing, by the processing circuit, a plurality of integrated circuit design organizational units to determine preferred weightings of the integrated circuit design organizational units that provide a highest level of failure coverage when applied to a random pattern generator. Based on determining the preferred weightings, the processing circuit creates an integrated circuit layout that includes a plurality of weighted test paths to respectively apply the preferred weightings to the integrated circuit design organizational units.
    Type: Grant
    Filed: December 13, 2013
    Date of Patent: March 22, 2016
    Assignee: International Business Machines Corporation
    Inventors: Gregory J. Cook, Timothy J. Koprowski, Mary P. Kusko, Cedric Lichtenau
  • Patent number: 9292399
    Abstract: Embodiments relate to design-based weighting for logic built-in self-test (LBIST). An aspect includes a computer program product for implementing design-based weighting for LBIST. The computer program product includes a tangible storage medium readable by a processing circuit and storing instructions for execution by the processing circuit for performing a method. The method includes analyzing, by the processing circuit, a plurality of integrated circuit design organizational units to determine preferred weightings of the integrated circuit design organizational units that provide a highest level of failure coverage when applied to a random pattern generator. Based on determining the preferred weightings, the processing circuit creates an integrated circuit layout that includes a plurality of weighted test paths to respectively apply the preferred weightings to the integrated circuit design organizational units. The integrated circuit layout is incorporated in a device under test.
    Type: Grant
    Filed: September 30, 2014
    Date of Patent: March 22, 2016
    Assignee: International Business Machines Corporation
    Inventors: Gregory J. Cook, Timothy J. Koprowski, Mary P. Kusko, Cedric Lichtenau
  • Patent number: 9292400
    Abstract: A system, method, and computer program product are provided for determining a network for a user. In use, a network-related event associated with a user is identified. Additionally, a score is calculated for the user, in response to the identification of the event. Further, a network is determined for the user, based on the score.
    Type: Grant
    Filed: June 21, 2012
    Date of Patent: March 22, 2016
    Assignee: Amdocs Software Systems Limited
    Inventors: Nir Rapaport, Ronen David
  • Patent number: 9292401
    Abstract: Systems and methods described herein facilitate determining desktop readiness using interactive measures. A host is in communication with a server and the host includes a virtual desktop and a virtual desktop agent. The virtual desktop agent is configured to perform one or more injecting events via one or more monitoring agents, wherein each of the injecting events is a simulated input device event. The desktop agent is further configured to receive, via a display module, a response to the injecting event(s), wherein the response is a display update causing pixel color values for the display module to alter. The desktop agent is also configured to identify, via the monitoring agent(s), whether the response to the injecting event(s) is an expected response. The desktop agent is also configured to determine, via the monitoring agent(s), a readiness of the virtual desktop based on the expected response.
    Type: Grant
    Filed: October 31, 2012
    Date of Patent: March 22, 2016
    Assignee: VMware, Inc.
    Inventors: Banit Agrawal, Lawrence Andrew Spracklen, Rishi Bidarkar
  • Patent number: 9292402
    Abstract: Novel tools and techniques that offer more robust solutions for application service management. Some such solutions provide a service management framework for managing a software application. In some cases, the framework can include multiple tools to detect and/or remedy application problems at a variety of different levels. In another aspect, some solutions can define multiple application lifecycle phases, ranging from minor impairment to catastrophic failure. For each of such phases, the service management framework can define one or more diagnostic criteria and/or one or more corrective actions that can be taken to remedy a suboptimal condition of the application.
    Type: Grant
    Filed: April 15, 2013
    Date of Patent: March 22, 2016
    Assignee: Century Link Intellectual Property LLC
    Inventors: Ramapriya Mallige, Santhosh Plakkatt, Manoj Ramchandra, Viswanath Seetharam
  • Patent number: 9292403
    Abstract: Mechanisms are provided for a graphical user interface tool for system-wide topology and performance monitoring with per-partition views. A graphical user interface application presents a consolidated view of physical and logical information based on the received performance data. The mechanisms provide real-time performance and utilization information in a visual format relative to the physical components in a topographical layout. The user may drill down to lower levels to view more detailed performance and utilization information.
    Type: Grant
    Filed: December 14, 2011
    Date of Patent: March 22, 2016
    Assignee: International Business Machines Corporation
    Inventors: William A. Bostic, Randall R. Heisch, Venkat R. Indukuru, Allen E. Johnson, Jesse L. Sathre, Philip L. Vitale
  • Patent number: 9292404
    Abstract: A computer-implemented method may include tracking a child's usage of a computing system. The computer-implemented method may also include generating an event history based on the child's usage of the computing system and identifying a restricted event that violated a parental-control policy. The computer-implemented method may further include creating an event trail by identifying at least one event in the event history that led to the restricted event. Various other methods, systems, and computer-readable media are also disclosed.
    Type: Grant
    Filed: February 2, 2009
    Date of Patent: March 22, 2016
    Assignee: Symantec Corporation
    Inventors: Adam Schepis, Matt Boucher
  • Patent number: 9292405
    Abstract: Data for simulation are selected from an in-memory database of an in-memory database server or simultaneous scenarios simulation at a business application server. The simulation results of a plurality of scenarios received from the business application server are temporarily stored at the in-memory database. One scenario from the plurality of scenarios is selected based on using user-defined rules at the in-memory database server. The selected scenario is communicated to the business application server.
    Type: Grant
    Filed: March 8, 2013
    Date of Patent: March 22, 2016
    Assignee: SAP SE
    Inventors: Pranav Wankawala, Irene Chen, Vimala K
  • Patent number: 9292406
    Abstract: A computer implemented method of monitoring the performance of a computer comprises determining the value of an activity metric of the monitored computer. The contribution(s) to the said value of one or more predetermined activities is/are determined In one embodiment, the said contribution(s) are subtracted from the said total value to provide a net value representing a measure of the performance of the computer. A predetermined data set may be used to identify the one or more predetermined activities. In another embodiment, the value of at least one activity metric of the monitored computer is determined excluding contributions to that value from the said one or more predetermined activities identified from the said data set to provide a net value representing a measure of the performance of the computer. The net value may be used to control the power consumption of the computer.
    Type: Grant
    Filed: August 21, 2010
    Date of Patent: March 22, 2016
    Assignee: 1E LIMITED
    Inventors: Sumir Karayi, Mark Blackburn, Andrew Hawkins, Richard Cudd, Sophie Chang
  • Patent number: 9292407
    Abstract: Determination of an optimum batch size for aggregating data wherein, for a number of batch sizes, costs are estimated for sending batched information to persistent storage and for losing batched data. Then, the optimum batch size is selected from the number of different batch sizes based on sums of these costs.
    Type: Grant
    Filed: March 29, 2012
    Date of Patent: March 22, 2016
    Assignee: International Business Machines Corporation
    Inventor: Arun Kwangil Iyengar
  • Patent number: 9292408
    Abstract: A method for automated detection of a real IT system problem may include obtaining monitor measurements of metrics associated with activities of a plurality of configuration items of the IT system. The method may also include detecting anomalies in the monitor measurements. The method may further include grouping concurrent anomalies of the detected anomalies corresponding to configuration items of the plurality of configuration items which are topologically linked to be regarded as a system anomaly. The method may further include calculating a significance score for the system anomaly, and determining that the system anomaly relates to a real system problem based on the calculated significance score.
    Type: Grant
    Filed: September 21, 2011
    Date of Patent: March 22, 2016
    Assignee: Hewlett Packard Enterprise Development LP
    Inventors: Ruth Bernstein, Ira Cohen, Eran Samuni
  • Patent number: 9292409
    Abstract: Some embodiments of the present disclosure relates to an automotive control unit (ACU) able to communicate with sensors using a plurality of different communication protocols. The ACU comprises a control unit that operates a sensor interface module to selectively generate a plurality of control signals corresponding to a plurality of different communication protocols, wherein respective control signals have characteristics corresponding to one of the plurality of different communication protocols. A modulation unit receives one of the control signals and generates a modulated communication signal having characteristics that correspond to a communication protocol of the one of the control signals. A communication bus provides the communication signal to a sensor network comprising one or more sensors. By operating the modulation unit to operate according to different communication protocols the ACU can be operated to communicate with multiple sensors using different communication protocols (e.g.
    Type: Grant
    Filed: June 3, 2013
    Date of Patent: March 22, 2016
    Assignee: Infineon Technologies AG
    Inventors: Dirk Hammerschmidt, Peter Hoffmann
  • Patent number: 9292410
    Abstract: A computerized method that combines identifying conflicting requirements and monitoring requirements integrity. Traceability link strengths are computed between a code element and a plurality of requirements. Revised traceability link strengths are computed between a revised version of the same code element and the plurality of requirements. The revised traceability link strengths are compared to the pre-existing traceability link strengths and a deviation decreased is identified when the revised traceability link strength is less than the pre-existing traceability link strength. An additional traceability link strength is computed between the revised version of the same code element and a new requirement, the new requirement first appearing with the revised version of the same code element. A conflict between the new requirement and the pre-existing requirements is identified when both a deviation decrease is identified and when additional traceability link strength exceeds a correlation threshold.
    Type: Grant
    Filed: November 6, 2011
    Date of Patent: March 22, 2016
    Assignee: International Business Machines Corporation
    Inventors: Jonathan Bnayahu, Moti Nisenson, Yahalomit Simionovici
  • Patent number: 9292411
    Abstract: A debug control system and method thereof which includes a debug device and a wireless communication module. The debug device is configured to communicate electrical data with a target device via a first signal transmission interface. The wireless communication module is configured to communicate electrical data with the debug device via a second communication interface, and is configured to communicate electrical data with a host device. Electrical data exchanged between the debug control system and the target device is configured to debug or update firmware residing on the target device.
    Type: Grant
    Filed: March 7, 2013
    Date of Patent: March 22, 2016
    Assignee: Phoenix Technologies Ltd.
    Inventor: Chia Chien Chuang
  • Patent number: 9292412
    Abstract: Enabling remote debugging of virtual machines, in one aspect, may comprise attaching a debug virtual machine to a target virtual machine deployed in a virtualized environment. Interactions and/or access to the target virtual machine may be performed via the attached debug virtual machine. The debug virtual machine may be created and attached to the target virtual machine in response to receiving a request to debug the target machine, for example, from a remote user of the target virtual machine.
    Type: Grant
    Filed: August 28, 2013
    Date of Patent: March 22, 2016
    Assignee: GLOBALFOUNDRIES INC.
    Inventors: Ajay Mohindra, Sambit Sahu, Upendra Sharma