Abstract: A technique for deploying an application in a cloud computing environment includes: collecting, while a user is deploying an application, metadata and instructions issued by the user on deploying the application, the metadata comprising service metadata, application metadata and topology metadata, wherein the service metadata comprise metadata on a service required for deploying the application, the application metadata comprise metadata on the application, and the topology metadata comprise metadata indicative of a relationship between the service and the application; and storing the collected metadata and instructions as a model for re-deploying the application.

Abstract: A technique for deploying an application in a cloud computing environment includes: collecting, when a user is deploying an application, metadata and instructions on deploying the application, the metadata comprising service metadata, application metadata and topology metadata, wherein the service metadata comprise metadata on a service required for deploying the application, the application metadata comprise metadata on the application, and the topology metadata comprise metadata indicative of a relationship between the service and the application; and storing the collected metadata and instructions as a model for re-deploying the application.

Abstract: The disclosure is related to providing an operation environment of a registered network having first devices to a user in an unregistered network having second devices. In order to provide, the second devices in the unregistered network may be detected when user equipment associated with the user enters a service area of the unregistered network. As compatible devices, devices compatible with the first devices in the registered network may be selected from the detected second devices. Then, system images of the first devices compatible with the selected compatible devices may be obtained. The obtained system images of the first devices may be installed at the selected compatible devices, respectively.

Abstract: An automobile, vehicle, vessel or other device may include a plurality of modules, software applications, computer program products, controllers or other logically executing entities to facilitate controlling, implementing or otherwise enabling various operations according to computer-readable instructions, code or other information stored within a memory, such as within a file or other memory construct. A controller having capabilities sufficient to facilitate updating, modifying, creating or otherwise manipulating such stored files and/or corresponding instructions is contemplated.

Abstract: A system and technique for deploying an application in a cloud computing environment includes: a collecting module executable by a processor unit to collect, while a user is deploying an application, metadata and instructions issued by the user on deploying the application, the metadata comprising service metadata, application metadata and topology metadata, wherein the service metadata comprise metadata on a service required for deploying the application, the application metadata comprise metadata on the application, and the topology metadata comprise metadata indicative of a relationship between the service and the application; and a storing module executable by the processor unit to store the collected metadata and instructions as a model for re-deploying the application.

Abstract: Implementations of the disclosure provide for a self-amending software builder. A method of the disclosure includes performing at least one test on an application having source code that is stored in a source code repository and has incurred a plurality of code changes by a plurality of users; detecting a failure of the application during the test; identifying, using a processing device, an offending code change of the plurality of code changes corresponding to the failure and at least one dependent code change of the plurality of code changes that depends on the offending code change; and updating, using the processing device, a master copy of the application in view of at least one of the offending code change or the dependent code change.

Abstract: A method and apparatus for copy process configuration in an emulated integrated development environment (IDE). The configuration may allow users to easily refer to the files that contain copy processes. Users may configure copy processes just by specifying the workfile names that contain the elements of the copy process definitions. Users may also view the absolute path of the definition files selecting a copy process name in a program code.

Abstract: A class of digital signal processor instructions, comprising at least a first instruction type and a second instruction type, is proposed. The class of instructions may be added to the instruction set of a digital signal vector processor and a program instruction is selected from the digital signal processor instruction set. The digital signal processor is adapted to cause execution of a method comprising obtaining a program instruction, selecting a real valued input as one of a first real valued input and a second real valued input (the first and second real valued inputs organized as adjacent elements of a first input vector), performing an arithmetic operation on the selected real valued input to provide a real valued result, and providing a first real valued output and a second real valued output during a first operation cycle (the first and second real valued outputs organized as adjacent elements of a second output vector).

Abstract: A method includes: calculating a percentage of an instruction belonging to a certain instruction type among instruction types included in each of a plurality of blocks partitioned from a program; extracting an execution address and a number of execution instructions from an arithmetic processing unit that executes the program and performs sampling of the execution address and the number of execution instructions at a plurality of time points, calculating a first execution frequency of the instruction included in each of the plurality of blocks based on the extracted execution address and the number of execution instructions; calculating a second execution frequency of the instruction belonging to the instruction type by multiplying the first execution frequency of the block by the percentage of the instruction in the block; calculating total number of second execution frequencies calculated for each of the plurality of blocks.

Abstract: Embodiments of methods, apparatuses, and machine-readable mediums for performing a bit reversal instruction in a computer processor are described. In some embodiments, the execution of such instruction causes the bit ordering for a source operand to be reversed and stored.

Abstract: Methods and apparatuses relating to vector operations with operand base system conversion and re-conversion are described. In one embodiment, a method includes executing a single instruction by receiving a vector element of a first input vector and a vector element of a second input vector expressed in a first base system, converting the vector elements into a second lower base system to form a converted vector element of the first input vector and a converted vector element of the second input vector, performing an operation on the converted vector element of the first input vector and the converted vector element of the second input vector to form a result, accumulating in a register a portion of the result with a portion of a result of a prior operation expressed in the second lower base system, and converting contents of the register into the first base system.

Abstract: Embodiments relate to speculative branch handling for transaction abort. An aspect includes detecting a beginning of a current execution of a transaction. Another aspect includes, based on detecting the beginning of the transaction, disabling speculative execution based on branch prediction of an initial branch instruction of the transaction, wherein the initial branch instruction branches to two possible paths, and wherein a first path of the two possible paths comprises an abort handler. Another aspect includes disabling updating of a history table for the initial branch instruction.

Abstract: A method, a non-transitory computer readable medium, and a processor for repacking dynamic wavefronts during program code execution on a processing unit, each dynamic wavefront including multiple threads are presented. If a branch instruction is detected, a determination is made whether all wavefronts following a same control path in the program code have reached a compaction point, which is the branch instruction. If no branch instruction is detected in executing the program code, a determination is made whether all wavefronts following the same control path have reached a reconvergence point, which is a beginning of a program code segment to be executed by both a taken branch and a not taken branch from a previous branch instruction. The dynamic wavefronts are repacked with all threads that follow the same control path, if all wavefronts following the same control path have reached the branch instruction or the reconvergence point.

Abstract: A microprocessor includes compressed and uncompressed microcode memory storages, having N-bit wide and M-bit wide addressable words, respectively, where N<M. The microprocessor also includes a fetch unit, an instruction translator, and an execution stage. When the instruction translator receives an architectural instruction, it writes information identifying source and destination registers specified by the architectural instruction to an indirection register. It also issues one or more fetch addresses to retrieve a sequence of one or more microcode instructions from one of the uncompressed microcode memory storage and the compressed microcode memory storage to implement the architectural instruction. It merges information in the indirection register with the sequence of one or more microcode instructions to generate a sequence of one or more implementing microinstructions.

Abstract: An apparatus and method is described herein for providing robust speculative code section abort control mechanisms. Hardware is able to track speculative code region abort events, conditions, and/or scenarios, such as an explicit abort instruction, a data conflict, a speculative timer expiration, a disallowed instruction attribute or type, etc. And hardware, firmware, software, or a combination thereof makes an abort determination based on the tracked abort events. As an example, hardware may make an initial abort determination based on one or more predefined events or choose to pass the event information up to a firmware or software handler to make such an abort determination. Upon determining an abort of a speculative code region is to be performed, hardware, firmware, software, or a combination thereof performs the abort, which may include following a fallback path specified by hardware or software.

Abstract: A processor receives a first instruction with a first instruction address within a first instruction stream. The processor selects a row of a branch target buffer and a row of a one-dimensional array based on the first instruction address. The processor reads information in the current row of the one-dimensional array, where the current row of one-dimensional array includes a first target address and a column of the row of the branch target buffer expected to contain a second target address. The processor receives a second instruction within a second instruction stream, which includes a second instruction address equal to the first target address. The processor reads information included in the row of the branch target buffer, where the information included the row of the branch target buffer includes the second target address. The processor encounters a branch including a third target address within the first instruction stream.

Abstract: Dynamic resource allocation is provided in which additional resources, such as additional architected registers, are provided to an instruction, if it is determined that resources in addition to those configured to be provided to the instruction are to be used for the particular instruction. An instruction to be executed is dispatched on a pipe of a pipeline and that pipe is configured to have a set number of architected registers for use by the instruction. However, if one or more other architected registers are needed, those additional architected registers are dynamically allocated to the instruction by assigning one or more source ports of an additional pipe to the instruction.

Abstract: Embodiments relate to load queue entry reuse for operand store compare (OSC) history table update. An aspect includes allocating a load queue entry in a load queue to a load instruction that is issued into an instruction pipeline, the load queue entry comprising a valid tag that is set and a keep tag that is unset. Another aspect includes based on the flushing of the load instruction, unsetting the valid tag and setting the keep tag. Another aspect includes reissuing the load instruction into the instruction pipeline. Another aspect includes based on determining that the allocated load queue entry corresponds to the reissued load instruction, setting the valid tag and leaving the keep tag set. Another aspect includes based on completing the reissued load instruction, and based on the valid tag and the keep tag being set, updating the OSC history table corresponding to the load instruction.

Abstract: Embodiments relate to load queue entry reuse for operand store compare (OSC) history table update. An aspect includes allocating a load queue entry in a load queue to a load instruction that is issued into an instruction pipeline, the load queue entry comprising a valid tag that is set and a keep tag that is unset. Another aspect includes based on the flushing of the load instruction, unsetting the valid tag and setting the keep tag. Another aspect includes reissuing the load instruction into the instruction pipeline. Another aspect includes based on determining that the allocated load queue entry corresponds to the reissued load instruction, setting the valid tag and leaving the keep tag set. Another aspect includes based on completing the reissued load instruction, and based on the valid tag and the keep tag being set, updating the OSC history table corresponding to the load instruction.

Abstract: A processor receives a first instruction with a first instruction address within a first instruction stream. The processor selects a row of a branch target buffer and a row of a one-dimensional array based on the first instruction address. The processor reads information in the current row of the one-dimensional array, where the current row of one-dimensional array includes a first target address and a column of the row of the branch target buffer expected to contain a second target address. The processor receives a second instruction within a second instruction stream, which includes a second instruction address equal to the first target address. The processor reads information included in the row of the branch target buffer, where the information included the row of the branch target buffer includes the second target address. The processor encounters a branch including a third target address within the first instruction stream.

Abstract: Embodiments relate to speculative branch handling for transaction abort. An aspect includes detecting a beginning of a current execution of a transaction. Another aspect includes, based on detecting the beginning of the transaction, disabling speculative execution based on branch prediction of an initial branch instruction of the transaction, wherein the initial branch instruction branches to two possible paths, and wherein a first path of the two possible paths comprises an abort handler. Another aspect includes disabling updating of a history table for the initial branch instruction.

Abstract: A queue management capability enables allocation and management of tracking queue entries, such as load and/or store queue entries, at execution time. By introducing execution-time allocation of load/store queue entries, the allocation point of those entries is delayed further into the execution stage of the instruction pipeline, reducing the overall time the entry remains allocated to a specific instruction. The queue management capability may also resolve deadlock conditions resulting from execution-time allocation of the queue entries and/or provide a mechanism to avoid such deadlock conditions.

Abstract: A computer processor employs an instruction processing pipeline that processes a sequence of wide instructions each having an encoding that represents a plurality of different operations. The plurality of different operations of the given wide instruction are logically organized into a number of phases having a predefined ordering such that some or all of the plurality of different operations of the given wide instruction are executed as at least one dataflow. In certain circumstances where stalling is absent, the plurality of different operations of the phases of the given wide instruction can be issued for execution by the instruction processing pipeline over a plurality of consecutive machine cycles.

Abstract: Technologies are generally described for a scheme for controlling rebooting process of computing nodes. In some examples, a method performed under control of a router connected between a storage and a computing node may include receiving a signal that initiates a rebooting process of the computing node; enabling an FPGA (Field-Programmable Gate Array) to transmit at least one packet; and transmitting the at least one packet from the storage to the computing node based at least in part on a predefined FPGA program that is stored in the FPGA.

Abstract: An information handling system may include a processor, a network interface communicatively coupled to the processor, a storage resource communicatively coupled to the processor, and a basic input/output system (BIOS). The BIOS may be configured to, during a pre-boot environment of the information handling system: receive a datagram at the network interface from a network communicatively coupled to the network interface; determine if a variable is set within a header of the datagram indicating that a data payload of the datagram is to be bypassed by at least a portion of a network stack and a storage stack of the BIOS; and responsive to determining the variable is set, bypass the data payload by at least a portion of the network stack and the storage stack of the BIOS.

Abstract: An approach is provided for personalizing an error message for a user. A modified help system monitors interactions with the help system and includes instructions about error conditions. The instructions are in formats that match four learning styles indicating a preference for visual input, spoken verbal input, written verbal input, and a combination of visual and verbal input. Selections of content to resolve error conditions and types of interactions are recorded. Learning format, learning type, interactivity level, interactivity type, and semantic density of the selected content are determined. A learning style model is generated. Based on the model, the learning style of the user is determined to be one of the four learning styles. A predetermined error message describing a detected error condition is retrieved. The error message is augmented with an instruction in a format that matches the learning style of the user and is presented to the user.

Abstract: Implementation for initializing a bare metal host to an operational hypervisor is disclosed. A method of the disclosure includes detecting, by a processing device, an application programming interface request (API) request to initiate configuration of a host operating system (OS) on a host. The method also includes receiving, by the processing device, from a virtualization management system, a request to install the host to a hypervisor with a defined configuration. The method further includes providing, by the processing device, a status of a configuration of the host to the virtualization management system in view of the defined configuration.

Abstract: A system includes a processor configured to load a dashboard application including control over a secondary application. The processor is also configured to determine, via the dashboard application, a condition associated with the launch of the secondary application. Further, the processor is configured to determine if the condition has occurred and, upon occurrence of the condition, instruct launch of the secondary application from the dashboard application.

Abstract: A service manages a plurality of virtual machine instances for low latency execution of user codes. The service can provide the capability to execute user code in response to events triggered on an auxiliary service to provide implicit and automatic rate matching and scaling between events being triggered on the auxiliary service and the corresponding execution of user code on various virtual machine instances. An auxiliary service may be configured as an event triggering service to detect events and generate event messages for execution of the user codes. The service can request, receive, or poll for event messages directly from the auxiliary service or via an intermediary message service. Event messages can be rapidly converted to requests to execute user code on the service. The time from processing the event message to initiating a request to begin code execution is less than a predetermined duration, for example, 100 ms.

Abstract: A method for migrating configuration information during live migration of a virtual machine is disclosed. The method includes, after receiving a message of live migration that a virtual machine migrates from a source physical host to a target physical host sent by a virtual machine management server, acquiring an identifier of a source forwarding switch of the virtual machine and an identifier of a target forwarding switch of the virtual machine, and sending prestored configuration information to the target forwarding switch corresponding to the identifier of the target forwarding switch, so that the target forwarding switch stores the configuration information. The method also includes sending a configuration information deletion instruction to the source forwarding switch corresponding to the identifier of the source forwarding switch, so that the source forwarding switch deletes the prestored configuration information.

Abstract: File mapping and converting for dynamic disk personalization for multiple platforms are provided. A volatile file operation is detected in a first platform. The file supported by the first platform. A determination is made that the file is sharable with a second platform. The volatile operation is performed on the file in the first platform and the modified file is converted to a second file supported by the second platform. The modified file and second file are stored in a personalized disk for a user. The personalized disk is used to modify base images for VMs of the user when the user accesses the first platform or second platform. The modified file is available within the first platform and the second file is available within the second platform.

Abstract: Multiple operating systems are supported on a computing device by disk virtualization technologies that allow switching between a native operating system and a virtualized guest operating system without performing a format conversion of the native operating system image, which is stored in a partition of a physical data storage device. The disk virtualization technologies establish a virtual storage device in a manner that allows the guest operating system to directly access the partition of the physical storage device that contains the native operating system image.

Abstract: In cases where decided that the guaranteed resource capacity for virtual machine cannot be acquired all at one time, the computer system of the present invention decides whether or not resource capacity guaranteed for virtual machine can be continuously acquired by the start of the virtual machine operation, and if decided that the resource capacity can be continuously acquired, the computer system allocates the total acquired resource capacity to the virtual machine deployed on the physical machine.

Abstract: A method performed by a physical computing system includes, with a hypervisor, presenting a virtualized Remote Direct Memory Access (RDMA) device to a guest, with the hypervisor, allocating a portion of total guest memory to the guest, with the hypervisor, determining a memory threshold for the guest, the memory threshold being based on a number of virtual machines managed by the hypervisor and a size of total guest memory, with the hypervisor, receiving from the guest, a first request to register a first size sub-portion of the portion of total guest memory to the virtualized RDMA device, and with the hypervisor, in response to determining that the first size sub-portion exceeds the memory threshold, returning a notification to the guest, the notification indicating that the first request failed. The first size sub-portion is less than the portion of total guest memory.

Abstract: Methods, systems, and computer program products for initializing a page with watchdog code, by: positioning a first set of instructions in a first address range on the page; determining that there is a second address range that is unused by the first set of instructions; and initializing the second address range with a second set of instructions, the second set of instructions being watchdog instructions.

Abstract: A system, methods, and apparatus for virtual device timeout by memory offlining. A hypervisor receives a message from a source virtual machine to be transmitted to a destination machine and reserves a block of memory associated with the message. The message received from the source virtual machine is transmitted to the destination machine. The hypervisor then determines whether to reclaim the block of memory. If reclaiming the block of memory, the hypervisor offlines the block of memory by offlining one or more pages corresponding to the block of memory and/or offlining all memory corresponding to the source virtual machine. The hypervisor then indicates to the source virtual machine that the block of memory is accessible.

Abstract: A virtualization manager receives a request to configure a virtual interface of a virtual machine, the request comprising a selected logical network to be associated with the virtual interface and a virtual function capability option selection for the virtual interface. The virtualization manager then determines whether there is an available virtual function associated with the requested logical network. Responsive to determining there is an available virtual function, the virtualization manager assigns the virtual function to the virtual interface. Responsive to determining there is not an available virtual function, the virtualization manager further configures the virtual interface according to the virtual function capability option selection.

Abstract: A virtualization manager receives a request to disconnect a virtual device associated with a virtual machine. The virtualization manager then determines a usage state of the virtual device in view of collected usage statistics for the virtual device. Responsive to determining that the determined usage state of the virtual device indicates that the virtual device is in use, the virtualization manager requests confirmation for disconnecting the virtual device from the virtual machine.

Abstract: A virtualization manager receives a request to migrate a virtual machine from a source hypervisor to a destination hypervisor supporting virtual function capability. Responsive to determining that an availability status indicates that a virtual function is available for use on the destination hypervisor by the virtual machine, the virtualization manager migrates the virtual machine from the source hypervisor to the destination hypervisor. Responsive to determining that the virtual machine has been migrated to the destination hypervisor successfully, the virtualization manager connects the identified virtual function to the virtual machine.

Abstract: A method for live migrating a virtual machine includes connecting to a virtual machine operated in a first host by a client; transmitting condition data of the virtual machine to a second host by the first host during a transmitting time, the first host and the second host being located at different net domains; transmitting a variance of condition data of the virtual machine generated in the transmitting time to the second host by the first host; providing a notification to the client to reconnect to the second host by the first host; modifying a network packets transmitting rule by the client based on the notification of the first host, and activating the virtual machine by the second host based on the condition data of the virtual machine and the variance of the condition data of the virtual machine thereby maintaining the connection between the client and the virtual machine.

Abstract: A virtualized network including one or more virtual machines is operable to instantiate dynamic reconfiguration of one or more virtual machines. The virtualized network includes an analytics engine, autonomics module and orchestrator module. The autonomics module receives intelligence data from the analytics engine and in one instance, may direct an action of dynamic reconfiguration of one or more virtual machines, based on the intelligence data. The autonomics module instructs the orchestrator module, via a control plane, to instantiate the dynamic reconfiguration of one or more virtual machines. The dynamic reconfiguration may involve, without limitation, replacing a configuration of a virtual machine, migration of a configuration from a first to a second virtual machine, or deploying a second (new) virtual machine to replace or supplement functionality of a first virtual machine.

Abstract: An information processing apparatus includes a storage device and a processor that runs a virtual machine. The processor detects a waiting process that is ready for execution on the virtual machine, and writes process information about the detected waiting process in a storage area of the storage device, which is accessible area to management software managing the virtual machine.

Abstract: A methods and device for accessing virtual machine (VM) data are described. A computing device for accessing virtual machine comprises an access request process module, a data transfer proxy module and a virtual disk. The access request process module receives a data access request sent by a VM and adds the data access request to a request array. The data transfer proxy module obtains the data access request from the request array, maps the obtained data access request to a corresponding virtual storage unit, and maps the virtual storage unit to a corresponding physical storage unit of a distributed storage system. A corresponding data access operation may be performed based on a type of the data access request.

Abstract: In an embodiment, a system includes a graphics processing unit (GPU) that includes one or more GPU engines, and a microcontroller. The microcontroller is to assign a respective schedule slot for each of a plurality of virtual machines (VMs). When a particular VM is scheduled to access a first GPU engine, the particular VM has exclusive access to the first GPU engine. Other embodiments are described and claimed.

Abstract: Various embodiments are generally directed to providing virtualization using relatively minimal processing and storage resources to enable concurrent isolated execution of multiple application routines in which one of the application routines is made visible at a time. An apparatus to virtualize an operating system includes a processor component, a visibility checker for execution by the processor component to make a visibility check call to a kernel routine to request an indication of whether an instance of a framework routine that comprises the visibility checker is visible, and resource access code of the instance for execution by the processor component to perform a resource access operation to access a hardware component based on the indication and on receipt of an application programming interface (API) call from an application routine that specifies an API function to access the hardware component. Other embodiments are described and claimed.

Abstract: Embodiments directed toward a method, and a system. A method can be directed toward deciding whether to accept a virtual machine migration on a host. The method can include receiving a request to host a migrated virtual machine. The method can include determining if the host is overcommitted. The method can include selecting a low priority virtual machine in response to the host being overcommitted. The method can include determining if a resource for the low priority virtual machine can be reduced to accommodate the migrated virtual machine. The method can include reducing the resources for the low priority virtual machine in response to the resources being able to be reduced. The method can include accepting the request to host the migrated virtual machine in response to the reduction of the resources.

Abstract: Techniques promote monitoring of hypervisor systems by presenting dynamic representations of hypervisor architectures that include performance indicators. A reviewer can interact with the representation to progressively view select lower-level performance indicators. Higher level performance indicators can be determined based on lower level state assessments. A reviewer can also view historical performance metrics and indicators, which can aid in understanding which configuration changes or system usages may have led to sub-optimal performance.

Abstract: A method and computing device for selecting a protocol stack for performing protocol processing on data is presented. The computing device is configured with a hypervisor for managing a first virtual machine. According to the method, when a socket creation instruction sent by the first virtual machine is received, a protocol stack instance is selected from the protocol stack instances provided by the computing device. Then, a socket is created in the selected protocol stack instance according to the socket creation instruction; and a creation result is transmitted to the first virtual machine. Therefore, in a virtualized environment, multiple virtual machines disposed in a same computing device can share a network protocol processing capability, and protocol stacks of the virtual machines achieve load balance.

Abstract: A technique for operating a computer system to support an application, a first application server environment, and a second application server environment includes intercepting a work request relating to the application issued to the first application server environment prior to execution of the work request. A thread adapted for execution in the first application server environment is created. A context is attached to the thread that non-disruptively modifies the thread into a hybrid thread that is additionally suitable for execution in the second application server environment. The hybrid thread is returned to the first application server environment.

Abstract: A virtual-machine-based system that identifies an application or process in a virtual machine in order to locate resources associated with the identified application. Access to the located resources is then controlled based on a context of the identified application. Those applications without the necessary context will have a different view of the resource.