Patents Issued in December 6, 2016
  • Patent number: 9513869
    Abstract: The present disclosure relates to methods and systems for performing operations in a communications protocol. An example method can include submitting, from a device, a request for a queue entry representing a command from a host comprising a request for data stored at a device memory location; receiving the command from the host; and executing the command. An example method can also include selecting a bit string representing whether a requested data stream has been received, and storing the bit string into a memory buffer portion to mark the buffer portion. The method can include receiving, into the memory buffer, the stream. The method can include retrieving contents of the buffer portion, and determining whether the contents contain the bit string. If so, the method can include determining that portions of the stream have not been received. Otherwise, the method can include determining that the stream has been received.
    Type: Grant
    Filed: August 22, 2014
    Date of Patent: December 6, 2016
    Assignee: HGST Netherlands B.V.
    Inventors: Dejan Vucinic, Zvonimir Z. Bandic, Qingbo Wang, Cyril Guyot, Robert Mateescu, Frank R. Chu
  • Patent number: 9513870
    Abstract: Simultaneous results of modulo7 and modulo9 operations on an unsigned binary number N are achieved by dividing N by a number d, d being power of 2 then the resulting quotient and remainder are used to calculate modulo 7 and modulo9 by repeatedly split-and accumulate operations. The solution allows shared use of a significant amount of logic components, by a scalable architecture modulo7 and modulo9 can be found on large numbers and allows flexible use if only modulo7 or only modulo9 calculation is required.
    Type: Grant
    Filed: April 22, 2014
    Date of Patent: December 6, 2016
    Assignee: Dialog Semiconductor (UK) Limited
    Inventor: Stanly Jacob
  • Patent number: 9513871
    Abstract: A method of an aspect includes receiving a floating point round-off amount determination instruction. The instruction indicates a source of one or more floating point data elements, indicates a number of fraction bits after a radix point, and indicates a destination storage location. A result including one or more result floating point data elements is stored in the destination storage location in response to the floating point round-off amount determination instruction. Each of the one or more result floating point data elements includes a difference between a corresponding floating point data element of the source in a corresponding position, and a rounded version of the corresponding floating point data element of the source that has been rounded to the indicated number of the fraction bits. Other methods, apparatus, systems, and instructions are disclosed.
    Type: Grant
    Filed: December 30, 2011
    Date of Patent: December 6, 2016
    Assignee: Intel Corporation
    Inventors: Cristina S. Anderson, Bret L. Toll, Robert Valentine, Simon Rubanovich, Amit Gradstein
  • Patent number: 9513872
    Abstract: A system is described for generating random numbers. The system may include a plurality of information sources and one or more sampling devices coupled to each of the information sources. Each information source may have a characteristic which may differ from the characteristic of any other information source. The sampling devices may sample the information sources at some sampling interval. A sample value may be captured from each of the information sources by the sampling devices coupled thereto at the sampling interval. An output representative of a substantially random number may be derived from the sample values captured at the sampling interval.
    Type: Grant
    Filed: November 18, 2010
    Date of Patent: December 6, 2016
    Assignee: ACLARA TECHNOLOGIES LLC
    Inventors: Glenn A. Emelko, Gregory B. Gillooly
  • Patent number: 9513873
    Abstract: A compute-implemented method and apparatus for assisting release planning, including steps of: obtaining remaining requirements that are expected to be included in a current release plan; obtaining the release plan, which comprises a set of planned requirements that are already included in the release plan and a set of release constraints; determining that there is a conflict between the release constraints and the planned requirements; rendering, in response to this determination, a proposal to create a modified release plan that is a function of the remaining requirements and of the current release plan; and forecasting, as a function of the remaining requirements and of the modified release plan, whether the addition of another requirement to the release plan would create a conflict with the release constraints.
    Type: Grant
    Filed: August 7, 2014
    Date of Patent: December 6, 2016
    Assignee: International Business Machines Corporation
    Inventors: Hao Chen, Claudio Cozzi, Ya B. Dang, Howard M. Hess, Steven M. Kagan, Feng Li, Shao C. Li, Xin Zhou, Jun Zhu
  • Patent number: 9513874
    Abstract: Various technologies related to an enterprise computing platform are presented. Documents in a framework can be edited via logical views as described. An enterprise computing platform having a variety of frameworks can be configured to operate in a variety of business domains. Features such as parallel computing, distributed computing, logical documents, document transformation, space visualization, data security, and others can be accomplished via configuration rather than coding.
    Type: Grant
    Filed: November 29, 2011
    Date of Patent: December 6, 2016
    Assignee: Infosys Limited
    Inventors: Dinesh Govind Joshi, Mahesh Huyilalu Shivaram, Ganesan Kaushik, Subramanian Baskaran, Vinoop Aradhya
  • Patent number: 9513875
    Abstract: A method and system for processing instruction information. Each instruction information character string of a sequence of instruction information character strings are sequentially extracted and processed. It is independently ascertained for each instruction information character string in the sequence whether to generate a code line for each instruction information character string, by: determining whether a requirement is satisfied and generating the code line and storing the code line in a code buffer if the requirement has been determined to be satisfied and not generating the code line if the requirement has been determined to not be satisfied. The requirement relates to whether the instruction information character string being processed comprises a naming instruction or a generation instruction. It is determined that the requirement is satisfied for one or more instruction information character strings in the sequence.
    Type: Grant
    Filed: February 11, 2015
    Date of Patent: December 6, 2016
    Assignee: International Business Machines Corporation
    Inventor: Kunio Namba
  • Patent number: 9513876
    Abstract: A present invention embodiment includes a system with at least one processor for accessing data. The system creates a rule including one or more conditional expressions to link a first data object of a first data source to a second data object of a second data source. Data of the first data object is retrieved from the first data source in accordance with a request for the first data object. The system processes the rule to retrieve data of the second data object from the second data source that satisfies the one or more conditional expressions of the rule. Results for the request are produced by merging the data retrieved from the first and second data objects. Embodiments of the present invention further include a method and computer program product for accessing data in substantially the same manner described above.
    Type: Grant
    Filed: December 17, 2014
    Date of Patent: December 6, 2016
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Eric A. Bordeau, Gili Mendel
  • Patent number: 9513877
    Abstract: A computer program product includes instructions to identify a primary symbol table associated with a primary source code file and identify a secondary symbol table associated with a secondary source code file. The computer program product includes instructions to receive a source code association indication. The source code association indication includes at least one association relationship between the primary source code file and the secondary source code file. The computer program product includes instructions to create a comprehensive symbol table. The comprehensive symbol table comprises contents of the primary symbol table and contents of the secondary symbol table. A corresponding computer-implemented method and computer system are also disclosed.
    Type: Grant
    Filed: May 24, 2016
    Date of Patent: December 6, 2016
    Assignee: International Business Machines Corporation
    Inventor: Jonathan C. Gellin
  • Patent number: 9513878
    Abstract: According to some embodiments, a method and system including a first technology stack to receive a model description describing defining aspects of an application model; to generate, according to the model description, a model entity representation of the application model; and to transfer the model description to a second technology stack; and a second technology stack to generate, according to the model description, a model entity representation of the application model.
    Type: Grant
    Filed: December 21, 2012
    Date of Patent: December 6, 2016
    Assignee: SAP SE
    Inventors: Christel Rueger, Rainer Schaefer, Marcus Hoepfner, Matthias Jensen, Joerg Weller, Thomas Rinneberg, Mario Kabadiyski
  • Patent number: 9513879
    Abstract: A principal model is configured to facilitate automatic generation of at least one resource for use by a computer-executable application. The principal model includes a group of classes, references, attributes, and associations between any of the classes. At least one model item required for a task that is absent from the principal model is identified. The absent model item is instantiated in a decoration model that operates with the principal model to augment operational functionality of the principal model. The decoration model includes a class, a reference, and an attribute for any corresponding one of the group of classes, references, and attributes of the principal model.
    Type: Grant
    Filed: December 27, 2013
    Date of Patent: December 6, 2016
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Benjamin Halberstadt, Eliezer Israel, Boris Melamed, Guy Yitzhaki
  • Patent number: 9513880
    Abstract: A device receives a state chart generated via a technical computing environment. The state chart includes a function block that includes a function that includes function input(s)/output(s). The state chart includes a state block that includes a function call to the function of the function block. The function call includes call input(s)/output(s). The device initiates execution of the state chart, parses the function into the function input(s)/output(s), and parses the function call into the call input(s)/output(s). The device processes, during the execution of the state chart, the function input(s)/output(s) with a graphical engine of the technical computing environment to generate function-related code. The device processes, during the execution of the state chart, the call input(s)/output(s) with a textual engine of the technical computing environment to generate function call-related code, and provides the function-related code and the function call-related code in generated code.
    Type: Grant
    Filed: May 23, 2014
    Date of Patent: December 6, 2016
    Assignee: The MathWorks, Inc.
    Inventors: Srinath Avadhanula, Pieter J. Mosterman, Ebrahim Mestchian
  • Patent number: 9513881
    Abstract: A system for assisted generation of composite applications which are composed of instantiable components includes a portal system executing in memory of a computer to: a) dynamically access a data source of one or more components being potentially suitable for being used within the composite application, b) parse the data source for a predetermined searched component according to a predetermined functionality specification standard, c) rank found components according to predetermined ranking criteria, d) define a list of selected usable components from the ranking, e) store at least a subset of the selected components locally, and, f) automatically deploy the composite application from the selected components.
    Type: Grant
    Filed: June 20, 2008
    Date of Patent: December 6, 2016
    Assignee: International Business Machines Corporation
    Inventors: Peter Fischer, Hendrik Haddorp, Oliver Koeth, Andreas Nauerz
  • Patent number: 9513882
    Abstract: Architecture that includes a platform independent, configuration driven, presentation composition engine. The composition engine that allows dynamic generation of multiplatform user experience (UX) based on a data contract. By composition, the user can select the parts, interactions, and constraints between the interaction and parts, as well as the placement with respect to each other. The UX is dynamically composed from components that are targeted to particular data classes. At runtime, platform dependent component implementations are automatically selected by the engine based on the execution platform of the composition host. A user can create or customize the UX without writing code by composing from a wide variety of presentation widgets that access a wide variety of data sources that can work on many platforms. Compositions are targeted to both a data class and presentation type and can be either predefined or generated.
    Type: Grant
    Filed: April 15, 2010
    Date of Patent: December 6, 2016
    Assignee: Microsoft Technology Licensing, LLC
    Inventors: Evgueni N. Bykov, Ferit Findik, Ryan S. Benson, Volodymyr V. Otryshko
  • Patent number: 9513883
    Abstract: A method is provided that receives an image that includes graphical metadata for specifying alignment information. The method renders the image by using the alignment information. Rendering the image by using the alignment information includes positioning text on the image, aligning the image with another image, and identifying visual boundaries of the rendered image. The graphical metadata includes a geometric shape that specifies a region on the image where the text is to be rendered. The alignment metadata also specifies a maximum size for text rendered on the image. In some embodiments, the image is a multi-layer image that includes a first layer for the image and a second layer for the graphical metadata. In some embodiments, the layer that includes the graphical metadata is designated to include graphical metadata. The graphical metadata is not rendered on a graphical user interface where the image is rendered.
    Type: Grant
    Filed: October 1, 2010
    Date of Patent: December 6, 2016
    Assignee: APPLE INC.
    Inventors: Patrick O. Heynen, Marian E. Goldeen, Jordan P. McCommons, William J. Feth
  • Patent number: 9513884
    Abstract: Thermal-aware source code compilation including: receiving, by a compiler, an identification of a target computing system, the identification of the target computing system specifying temperature sensors that measure temperature of a memory module; compiling the source code into an executable application including inserting in the executable application computer program instructions for thermal-aware execution, the computer program instructions, when executed on the target computing system, carry out the steps of: retrieving temperature measurements of one or more of the target computing system's temperature sensors; determining, in real-time in dependence upon the temperature measurements, whether a memory module is overheated; if a memory module is overheated, entering a thermal-aware execution state including, for each memory allocation in the executable application, allocating memory on a different memory module than the overheated memory module; and upon the temperature sensors indicating the memory modu
    Type: Grant
    Filed: August 16, 2011
    Date of Patent: December 6, 2016
    Assignee: International Business Machines Corporation
    Inventors: Cary L. Bates, Nicholas P. Johnson, Justin K. King
  • Patent number: 9513885
    Abstract: A system and method for dynamically creating web applications from data is described. Simple data is transformed into a declarative application data model that is then parsed by a server and compiled into a functional web application. Application functionality is partly determined by rules applied to web application objects in response to user actions. These rules are triggered by various cues, including user actions and relationships among objects in the web applications. A web application is considered an n-dimensional problem space, and relationships among application objects can be modeled using set theory. The status of a particular relationship among objects and user actions can trigger specific application behavior. Additionally application behavior can be triggered in other ways, like conditions in arbitrary scripts or combinations of multiple triggers combined using logical connectives.
    Type: Grant
    Filed: August 22, 2013
    Date of Patent: December 6, 2016
    Inventor: Peter Warren
  • Patent number: 9513886
    Abstract: A compiler tool-chain may automatically compile an application to execute on a limited local memory (LLM) multi-core processor by including automated heap management transparently to the application. Management of the heap in the LLM for the application may include identifying access attempts to a program variable, transferring the program variable to the LLM, when not already present in the LLM, and returning a local address for the program variable to the application. The application then accesses the program variable using the local address transparently without knowledge about data in the LLM. Thus, the application may execute on a LLM multi-core processor as if the LLM multi-core processor has an unlimited heap space.
    Type: Grant
    Filed: January 28, 2014
    Date of Patent: December 6, 2016
    Assignee: Arizona Board of Regents on Behalf of Arizona State University
    Inventors: Ke Bai, Aviral Shrivastava
  • Patent number: 9513888
    Abstract: A method of installing an application on a mobile communication device which comprises receiving, on a mobile communication device, a selection of a virtually preloaded application, identifying the repository from a plurality of repositories, communicating with the repository to obtain the full application, identifying a first location of an icon associated with the virtually preloaded application on the mobile communication device, relocating the icon associated with the virtually preloaded application to a second location, and installing the full application on the mobile communication device. The virtually preloaded application corresponds to a full application available in a repository.
    Type: Grant
    Filed: January 30, 2014
    Date of Patent: December 6, 2016
    Assignee: Sprint Communications Company L.P.
    Inventors: David K. Fultz, Dhananjay Indurkar, Nathan Schwermann, M. Jeffrey Stone
  • Patent number: 9513889
    Abstract: Disclosed are systems, methods and computer program products for automating installation of applications. In one aspect, the system launches an application installer of a software application; identifies control elements in an active window of the application installer, wherein the control elements include at least user interface (UI) elements responsible for transitioning the active window to another window of the application installer; transitions to other windows of the application installer and identifies control elements in all other windows of the application installer until the application is installed; generates an automatic installation rule for the application that automatically activates one or more windows of the application installer and one or more control elements of said window to install the application without a participation of a user.
    Type: Grant
    Filed: March 5, 2014
    Date of Patent: December 6, 2016
    Assignee: AO Kaspersky Lab
    Inventor: Anton M. Ivanov
  • Patent number: 9513890
    Abstract: Method and system are disclosed for providing multiple installations of a software application. The method/system creates an installation template from a single correct or “golden” installation of the software application and uses the installation template to produce additional installations of the software application. In one embodiment, any references to a specific host or computing system in the files or directories of the installed software application are replaced with a temporary variable in the installation template. The installation template may then be stored on a designated server and uploaded to any computing system needing a new installation of the software application. Once uploaded, the variable is replaced with system-specific references to complete the new installations. Since the installations are produced from the installation template and not from floppy disks or CD-ROMs, the process takes significantly less time.
    Type: Grant
    Filed: April 10, 2014
    Date of Patent: December 6, 2016
    Assignee: United Services Automobile Association (USAA)
    Inventor: Richard Douglas Weathersby
  • Patent number: 9513891
    Abstract: Embodiments of the present application relate to a method of publishing a wireless application, a method of implementing a wireless application, a device for publishing a wireless application, a device for implementing a wireless application, and a computer program product for publishing a wireless application. A method of publishing a wireless application is provided. The method includes integrating a permanent interface layer of a software development kit (SDK) into a wireless application, publishing the integrated wireless application, and installing the dynamic implementation layer of the SDK onto a server. The SDK includes the permanent interface layer and a dynamic implementation layer, the permanent interface layer including an interface protocol to be invoked by the wireless application and the dynamic implementation layer including an interface implementation corresponding to the interface protocol.
    Type: Grant
    Filed: November 6, 2015
    Date of Patent: December 6, 2016
    Assignee: Alibaba Group Holding Limited
    Inventors: Chongbo Sun, Gongping Chen, Weigang Guan
  • Patent number: 9513892
    Abstract: Systems and methods of capturing and deploying the operating system of a computing device. The method comprising: creating a file that contains one or more settings of the operating system of a source computer and storing the file in storage on the source computer, copying an image of the operating system and the file containing one or more settings of the operating system, and deploying the image to one or more target computers.
    Type: Grant
    Filed: April 26, 2007
    Date of Patent: December 6, 2016
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Sam J. Lee, Shehzaad B. Bidiwala
  • Patent number: 9513893
    Abstract: A digital broadcast network is disclosed that can provide scheduled updates for non-critical data in a different manner than critical data updates. Updates that included non-critical information can be scheduled to be broadcast, over a digital broadcast network, during an update window, which can be a specific period of time. Receiving devices can be notified of the update window and, utilizing background functionality, the non-critical updates can be accepted and applied at the receiving device. The non-critical updates might be accepted and applied during the update window if the receiving device is in an idle state or a period of low activity. The non-critical updates can be broadcast on a separate channel or stream. During periods other than during the update window, other data can be transmitted on the separate channel or stream. Critical updates can be applied in real-time.
    Type: Grant
    Filed: October 11, 2007
    Date of Patent: December 6, 2016
    Assignee: QUALCOMM Incorporated
    Inventors: George Allen Rothrock, Jonathan McCartie, Nicholas Glassman
  • Patent number: 9513894
    Abstract: A method, system, and computer program product for upgrading high-availability database systems. The method commences by specifying a subject database configuration state (e.g., an initial state) as well as an upgraded database configuration state (e.g., an upgraded state). Then, the method performs operations for compiling the specifications and validating the upgraded database configuration state with respect to the specified subject database configuration state. Compile errors are reported and a user can change the specifications. Once the compiler determines that the upgraded configuration state can be reached from the subject database configuration state, then the method generates an upgrade plan. The upgrade plan is executed by a computer-implemented controller. During execution of the plan, the controller pauses for accepting user intervention at key execution points. The controller monitors state changes to establish checkpoints.
    Type: Grant
    Filed: August 31, 2012
    Date of Patent: December 6, 2016
    Assignee: Oracle International Corporation
    Inventors: Steven S. H. Lim, Joydip Kundu
  • Patent number: 9513895
    Abstract: A method for automatically patching a management server in a distributed network. The method includes receiving an instruction to patch an unpatched management server. Retrieving, from a software repository, a patch file comprising a patch for the unpatched management server, where the unpatched management server is configured to manage a distributed application in the distributed network, and where the unpatched management server is located on a node of the distributed network. Establishing a connection with a management agent located on the node, where the management agent is configured to communicate with the unpatched management server over the network and manage a part of the distributed application that is located on the node. Sending, over the connection, the patch file to the management agent. Receiving, by the management agent, the patch file. Applying, by the management agent, the patch to the unpatched management server to obtain a patched management server.
    Type: Grant
    Filed: October 31, 2012
    Date of Patent: December 6, 2016
    Assignee: Oracle International Corporation
    Inventor: Sonali Inamdar
  • Patent number: 9513896
    Abstract: A server includes a receiver configured to receive, from an information processing apparatus that executes update, an instruction for transmitting metadata of update data used for the update; a determining unit configured to determine whether the update data includes preliminary download data, wherein the preliminary download data has an update date and time later than a current date and time, and the update date and time is a date and time from which the update becomes available; a transmitter configured to transmit, when the determining unit determines that the update data includes preliminary download data, metadata of the preliminary download data to the information processing apparatus via a communication network; and a prohibiting unit configured to prohibit transfer of the metadata of the preliminary download data on the basis of the number of information processing apparatuses that are downloading the preliminary download data.
    Type: Grant
    Filed: March 11, 2014
    Date of Patent: December 6, 2016
    Assignee: RICOH COMPANY, LTD.
    Inventor: Shigeru Nakamura
  • Patent number: 9513897
    Abstract: A portal is established between a software installer and a client to allow on-line management of a software implementation project. The installer of customizable software and the client may communicate through the portal to establish specifications for the software product. The software may be implemented by incorporating preconfigured software components into the software product. A portion of the preconfigured components may be modified based on the specifications of the client. The specifications may be identified by providing the client with a set-up wizard through the portal. The set-up wizard prompts the client for information and the software system may be configured based on logic generated in response to client input.
    Type: Grant
    Filed: July 29, 2012
    Date of Patent: December 6, 2016
    Assignee: ALLSCRIPTS SOFTWARE, LLC
    Inventors: Axel Granholm, Chris McLeod, Christine Stephens, Darlene Donkin
  • Patent number: 9513898
    Abstract: Systems and methods for updating software in a hazard detection system are described herein. Software updates may be received by, stored within, and executed by a hazard detection system, without disturbing the system's ability to monitor for alarm events and sound an alarm in response to a monitored hazard event. The software updates may be received as part of a periodic over-the-air communication with a remote server or as part of a physical connection with a data source such as a computer. The software updates may include several portions of code designed to operate with different processors and/or devices within the hazard detection system. The software updates may also include language specific audio files that can be accessed by the hazard detection system to play back language specific media files via a speaker.
    Type: Grant
    Filed: June 30, 2014
    Date of Patent: December 6, 2016
    Assignee: GOOGLE INC.
    Inventors: Jonathan Solnit, Kelly Veit, Edwin H. Satterthwaite, Jr., Jeffrey Lee
  • Patent number: 9513899
    Abstract: A hospital bed is programmable with new firmware that is downloaded to the bed over a network. The firmware is downloaded to the bed automatically from a remote computer device. The remote computer device receives a message from the hospital bed which includes data regarding the version number of the bed's current firmware, and if the version number indicates that the firmware is an outdated version, the remote computer device downloads a new version of the firmware to the bed.
    Type: Grant
    Filed: November 26, 2014
    Date of Patent: December 6, 2016
    Assignee: Hill-Rom Services, Inc.
    Inventors: Williams F. Collins, Jr., James M. Allen, Keith A. Huster, Carl W. Riley, Patricia A. Glidewell, Irvin J. Vanderpohl, III, Richard J. Schuman, Benjamin E. Howell, Timothy D. Wildman
  • Patent number: 9513900
    Abstract: A protective cover for an electronic device includes a memory configured to store at least an active firmware image and another firmware image, and circuitry configured to execute instructions provided in the firmware image. The circuitry receives commands and a firmware image included from the electronic device. The circuitry determines whether the firmware is targeted to a non-active block of the memory and if so, writes the firmware image to the non-active memory block.
    Type: Grant
    Filed: May 22, 2015
    Date of Patent: December 6, 2016
    Assignee: Otter Products, LLC
    Inventors: James J. Wojcik, Kim J. Hansen, James Stephanick
  • Patent number: 9513901
    Abstract: A method and system of implementing continuous deployment of scripts in languages that only support single deployment. The method and system may develop incremental scripts based on differences between a pending script and an implemented script.
    Type: Grant
    Filed: March 31, 2015
    Date of Patent: December 6, 2016
    Assignee: International Business Machines Corporation
    Inventors: Xiao Long Chen, Na Lv, Xi Ning Wang, Zhe Yan, Zhuo Zhao
  • Patent number: 9513902
    Abstract: Embodiments of the invention relate to automated code coverage measurement and tracking per user story and requirement. An aspect of the invention includes receiving one or more software development requirements. One or more tasks are generated from the one or more software development requirements. A task identifier (ID) is assigned to each of the one or more tasks, and each of the task IDs is assigned to at least one code component. An application is released that includes at least one code components.
    Type: Grant
    Filed: September 30, 2014
    Date of Patent: December 6, 2016
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Edward Boden, Robert C. Hansen, Anthony F. Pioli
  • Patent number: 9513903
    Abstract: A fault-tolerant system including a calculation unit and an output synthesizer is provided. The calculation unit receives a first environmental parameter and input data, wherein the calculation unit further includes a first and a second calculation circuits. The first calculation circuit is arranged to perform a calculation on the input data in response to the first environmental parameter to generate a first calculation result. The second calculation circuit is different from the first calculation circuit, and arranged to perform the calculation on the input data in response to the first environmental parameter to generate a second calculation result. The output synthesizer selects a first and a second set of bits from the first and the second calculation result according to a control signal, and synthesizes the first set of bits and the second set of bits in sequence to generate an adjusted calculation result.
    Type: Grant
    Filed: October 15, 2013
    Date of Patent: December 6, 2016
    Assignee: Industrial Technology Research Institute
    Inventors: Yung-Chang Chang, Hsing-Chuang Liu, Chih-Jen Yang
  • Patent number: 9513904
    Abstract: A computer processing system with a hierarchical memory system that associates a number of valid bits for each cache line of the hierarchical memory system. The valid bits are provided for each cache line stored in a respective cache and make explicit which bytes are semantically defined and which are not for the associated given cache line. Memory requests to the cache(s) of the hierarchical memory system can include an address specifying a requested cache line as well as a mask that includes a number of bits each corresponding to a different byte of the requested cache line. The values of the bits of the byte mask indicate which bytes of the requested cache line are to be returned from the hierarchical memory system. The memory request is processed by the top level cache of the hierarchical memory system, looking for one or more valid bytes of the requested cache line corresponding to the target address of the memory request.
    Type: Grant
    Filed: October 15, 2014
    Date of Patent: December 6, 2016
    Assignee: MILL COMPUTING, INC.
    Inventors: Roger Rawson Godard, Arthur David Kahlich
  • Patent number: 9513905
    Abstract: In one embodiment, a processor may include a vector unit to perform operations on multiple data elements responsive to a single instruction, and a control unit coupled to the vector unit to provide the data elements to the vector unit, where the control unit is to enable an atomic vector operation to be performed on at least some of the data elements responsive to a first vector instruction to be executed under a first mask and a second vector instruction to be executed under a second mask. Other embodiments are described and claimed.
    Type: Grant
    Filed: March 28, 2008
    Date of Patent: December 6, 2016
    Assignee: Intel Corporation
    Inventors: Mikhail Smelyanskiy, Sanjeev Kumar, Daehyun Kim, Jatin Chhugani, Changkyu Kim, Christopher J. Hughes, Victor W. Lee, Anthony D. Nguyen, Yen-Kuang Chen
  • Patent number: 9513906
    Abstract: A Vector Checksum instruction. Elements from a second operand are added together one-by-one to obtain a first result. The adding includes performing one or more end around carry add operations. The first result is placed in an element of a first operand of the instruction. After each addition of an element, a carry out of a chosen position of the sum, if any, is added to a selected position in an element of the first operand.
    Type: Grant
    Filed: January 23, 2013
    Date of Patent: December 6, 2016
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Jonathan D. Bradbury, Eric M. Schwarz
  • Patent number: 9513907
    Abstract: Instructions and logic provide SIMD vector population count functionality. Some embodiments store in each data field of a portion of n data fields of a vector register or memory vector, a plurality of bits of data. In a processor, a SIMD instruction for a vector population count is executed, such that for that portion of the n data fields in the vector register or memory vector, the occurrences of binary values equal to each of a first one or more predetermined binary values, are counted and the counted occurrences are stored, in a portion of a destination register corresponding to the portion of the n data fields in the vector register or memory vector, as a first one or more counts corresponding to the first one or more predetermined binary values.
    Type: Grant
    Filed: August 6, 2013
    Date of Patent: December 6, 2016
    Assignee: Intel Corporation
    Inventor: Elmoustapha Ould-Ahmed-Vall
  • Patent number: 9513908
    Abstract: According to one general aspect, an apparatus may include a load/store unit, an execution unit, and a first and a second data path. The load/store unit may be configured to load/store data from/to a memory and transmit the data to/from an execution unit, wherein the data includes a plurality of elements. The execution unit may be configured to perform an operation upon the data. The load/store unit may be configured to transmit the data to/from the execution unit via either a first data path configured to communicate, without transposition, the data between the load/store unit and the execution unit, or a second data path configured to communicate, with transposition, the data between the load/store unit and the execution unit, wherein transposition includes dynamically distributing portions of the data amongst a plurality of elements according to an instruction.
    Type: Grant
    Filed: September 3, 2013
    Date of Patent: December 6, 2016
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Ashraf Ahmed, Nicholas Todd Humphries, Marc Michael Augustin
  • Patent number: 9513909
    Abstract: Embodiments relate to variable branch prediction. An aspect includes determining a branch selection of an execution unit of a processor and determining whether a present prediction state of the state machine correctly predicted the branch selection by the execution unit. The aspect includes determining whether a predetermined condition is met for performing an alternative state transition and, based on determining that the predetermined condition is met, changing the present prediction state of the branch prediction state machine from the one state to another state according to an alternative state transition process based on the branch selection of the execution unit and the determination whether the present prediction state of the state machine correctly predicted the branch selection by the execution unit.
    Type: Grant
    Filed: March 18, 2016
    Date of Patent: December 6, 2016
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Narasimha R. Adiga, James J. Bonanno, Ashutosh Misra, Anthony Saporito
  • Patent number: 9513910
    Abstract: Methods, parallel computers, and computer program products for requesting shared variable directory (SVD) information from a plurality of threads in a parallel computer are provided. Embodiments include a runtime optimizer detecting that a first thread requires a plurality of updated SVD information associated with shared resource data stored in a plurality of memory partitions. Embodiments also include a runtime optimizer broadcasting, in response to detecting that the first thread requires the updated SVD information, a gather operation message header to the plurality of threads. The gather operation message header indicates an SVD key corresponding to the required updated SVD information and a local address associated with the first thread to receive a plurality of updated SVD information associated with the SVD key. Embodiments also include the runtime optimizer receiving at the local address, the plurality of updated SVD information from the plurality of threads.
    Type: Grant
    Filed: December 18, 2012
    Date of Patent: December 6, 2016
    Assignee: International Business Machines Corporation
    Inventors: Charles J. Archer, James E. Carey, Philip J. Sanders, Brian E. Smith
  • Patent number: 9513911
    Abstract: A method of detecting stack overflows includes the following steps: storing in at least one dedicated register at least one data item chosen from: a data item (SPHaut) indicating a maximum permitted value for a stack pointer, and a data item (SPBas) indicating a minimum permitted value for said stack pointer; effecting a comparison between a current value (SP) or past value (SPMin, SPMax) of said stack pointer and said data item or each of said data items; and generating a stack overflow exception if said comparison indicates that said current or past value of said stack pointer is greater than said maximum permitted value or less than said minimum permitted value. A processor for implementing such a method is also provided.
    Type: Grant
    Filed: November 21, 2014
    Date of Patent: December 6, 2016
    Assignee: Thales
    Inventors: Philippe Grossi, Dominique David, Francois Brun
  • Patent number: 9513912
    Abstract: Methods and controllers for executing an instruction set are provided. In one such method, executing an instruction set includes executing an instruction of one type in the instruction set, executing a context switch instruction, and executing an instruction of a second type in the instruction set. in one such controller, a single machine executes instructions in an instruction set with instructions having an operational code, and instructions that do not have an operational code.
    Type: Grant
    Filed: July 27, 2012
    Date of Patent: December 6, 2016
    Assignee: Micron Technology, Inc.
    Inventors: Luca De Santis, Maria-Luisa Gallese, Emanuele Sirizotti, Walter Di-Francesco
  • Patent number: 9513913
    Abstract: A processor of an aspect includes a plurality of packed data registers, and a decode unit to decode an instruction. The instruction is to indicate one or more source packed data operands. The one or more source packed data operands are to have four 32-bit results of four prior SM4 cryptographic rounds, and four 32-bit values. The processor also includes an execution unit coupled with the decode unit and the plurality of the packed data registers. The execution unit, in response to the instruction, is to store four 32-bit results of four immediately subsequent and sequential SM4 cryptographic rounds in a destination storage location that is to be indicated by the instruction.
    Type: Grant
    Filed: July 22, 2014
    Date of Patent: December 6, 2016
    Assignee: Intel Corporation
    Inventors: Shay Gueron, Vlad Krasnov
  • Patent number: 9513914
    Abstract: A technique realizes execution of various combinations of arithmetic operations in, for example, SIMD floating-point multiply-add arithmetic operation, with less instruction kind codes. An arithmetic operating apparatus sets, in one or more unused bits of a single arithmetic instruction, particular instruction information to instruct at least one of arithmetic operators to perform a process different from an ordinary process.
    Type: Grant
    Filed: March 12, 2009
    Date of Patent: December 6, 2016
    Assignee: FUJITSU LIMITED
    Inventor: Shigeki Itou
  • Patent number: 9513915
    Abstract: A computer system for optimizing instructions includes a processor including an instruction execution unit configured to execute instructions and an instruction optimization unit configured to optimize instructions and memory to store machine instructions to be executed by the instruction execution unit. The computer system is configured to perform a method including analyzing machine instructions from among a stream of instructions to be executed by the instruction execution unit, the machine instructions including a memory load instruction and a data processing instruction to perform a data processing function based on the memory load instruction, identifying the machine instructions as being eligible for optimization, merging the machine instructions into a single optimized internal instruction, and executing the single optimized internal instruction to perform a memory load function and a data processing function corresponding to the memory load instruction and the data processing instruction.
    Type: Grant
    Filed: March 28, 2012
    Date of Patent: December 6, 2016
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Michael K. Gschwind, Valentina Salapura
  • Patent number: 9513916
    Abstract: A computer-implemented method includes determining that two or more instructions of an instruction stream are eligible for optimization, where the two or more instructions include a memory load instruction and a data processing instruction to process data based on the memory load instruction. The method includes merging, by a processor, the two or more instructions into a single optimized internal instruction and executing the single optimized internal instruction to perform a memory load function and a data processing function corresponding to the memory load instruction and the data processing instruction.
    Type: Grant
    Filed: March 8, 2013
    Date of Patent: December 6, 2016
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Michael K. Gschwind, Valentina Salapura
  • Patent number: 9513917
    Abstract: A vector friendly instruction format and execution thereof. According to one embodiment of the invention, a processor is configured to execute an instruction set. The instruction set includes a vector friendly instruction format. The vector friendly instruction format has a plurality of fields including a base operation field, a modifier field, an augmentation operation field, and a data element width field, wherein the first instruction format supports different versions of base operations and different augmentation operations through placement of different values in the base operation field, the modifier field, the alpha field, the beta field, and the data element width field, and wherein only one of the different values may be placed in each of the base operation field, the modifier field, the alpha field, the beta field, and the data element width field on each occurrence of an instruction in the first instruction format in instruction streams.
    Type: Grant
    Filed: January 31, 2014
    Date of Patent: December 6, 2016
    Assignee: Intel Corporation
    Inventors: Robert C. Valentine, Jesus Corbal San Adrian, Roger Espasa Sans, Robert D. Cavin, Bret L. Toll, Santiago Galan Duran, Jeffrey G. Wiedemeier, Sridhar Samudrala, Milind Baburao Girkar, Edward Thomas Grochowski, Jonathan Cannon Hall, Dennis R. Bradford, Elmoustapha Ould-Ahmed-Vall, James C. Abel, Mark Charney, Seth Abraham, Suleyman Sair, Andrew Thomas Forsyth, Lisa Wu, Charles Yount
  • Patent number: 9513918
    Abstract: An apparatus and method are described for permuting data elements with masking. For example, a method according to one embodiment includes the following operations: reading values from a mask data structure to determine whether masking is implemented for each data element of a destination operand; if masking not implemented for a particular data element, then selecting data elements from a first source operand and a second source operand based on index values stored in destination operand to be copied to data element positions within the destination operand, wherein any one of the data elements from either the first source operand and the second source operand may be copied to any one of the data element positions within the destination operand; and if masking is implemented for a particular data element of the destination operand, then performing a designated masking operation with respect to that particular data element.
    Type: Grant
    Filed: December 22, 2011
    Date of Patent: December 6, 2016
    Assignee: INTEL CORPORATION
    Inventors: Elmoustapha Ould-Ahmed-Vall, Robert Valentine, Mostafa Hagog, Jesus Corbal, Bret L Toll, Mark J Charney, Tal Uliel, Zeev Sperber, Amit Gradstein
  • Patent number: 9513919
    Abstract: An apparatus and method for performing parallel decoding of prefix codes such as Huffman codes. For example, one embodiment of an apparatus comprises: a first decompression module to perform a non-speculative decompression of a first portion of a prefix code payload comprising a first plurality of symbols; and a second decompression module to perform speculative decompression of a second portion of the prefix code payload comprising a second plurality of symbols concurrently with the non-speculative decompression performed by the first compression module.
    Type: Grant
    Filed: April 28, 2015
    Date of Patent: December 6, 2016
    Assignee: Intel Corporation
    Inventors: Sudhir K. Satpathy, Sanu K. Mathew, Vinodh Gopal, James D. Guilford