Abstract: A memory device is provided. The memory device includes a plurality of memory banks, at least one buffer bank and a controller. Each memory bank has a bank index and includes a plurality of bank memory units for storing data associated with a logical address corresponding to the bank index. The buffer bank includes a plurality of buffer memory units. The controller receives a read command and a write command in a first clock cycle, wherein the read command and the write command are requesting to access a specific memory bank among the memory banks. If an access request of the read command and the write command exceeds a bandwidth limitation of the specific memory bank, the controller utilizes the buffer bank to accomplish the read command and the write command.

Abstract: A storage device with a memory may implement software queueing that can supplement hardware accelerated queueing mechanisms. A software queue supplementing a hardware queue can extend the size and allow pending operations to proceed even if the hardware queue is saturated. The use of software-based queues may extend processing capacity in a hardware-accelerated front-end storage device architecture. The software queue may process excess commands that cannot be handled by a hardware queue with a limited depth.

Abstract: A method for selecting and utilizing an access method for a VSAM data set includes monitoring a VSAM data set utilizing a first access method to access data therein. When performing such monitoring, specific indicators associated with the VSAM data set are observed. These indicators may include, for example, a number of input/output requests to the VSAM data set, a deferred request count against a control interval of the VSAM data set, a number of systems attempting to access the VSAM data set, and a number of reads/writes simultaneously occurring to the VSAM data set. The method analyzes these indicators to determine whether I/O performance of the VSAM data set would be enhanced by switching to a second access method. If the I/O performance would be enhanced, the method may be configured to automatically switch to the second access method. A corresponding system and computer program product are also disclosed.

Abstract: A non-volatile memory device includes a non-volatile memory and a memory controller which executes read from the non-volatile memory using a read option. The non-volatile memory includes a plurality of memory area units (e.g. dies described below), and each memory area unit includes a plurality of memory areas (e.g. pages). The memory controller holds management information in which a read option is recorded per memory area unit which is a unit larger than a memory area which is a read unit. The memory controller specifies a memory area unit including a read source memory area, selects a read option matching the specified memory area unit, and executes read from the read source memory area using the selected read option.

Abstract: The present invention provides a data storage device including a flash memory and a controller. The controller writes the first data sector into a first physical page of the physical pages in response to a write command arranged to write a first data sector into a first logical page, records the mapping relationship of the first logical page and the first physical page in a first large-data-maintenance table and determines whether a small-data-maintenance table has a first data link of the first logical page when one of the large-data-maintenance tables is the first large-data-maintenance table corresponding to the first logical block and the first data sector is less than a predetermined length, and deletes the first data link of the small-data-maintenance table when the small-data-maintenance table has the first data link of the first logical page.

Abstract: A memory module includes a nonvolatile memory device and a volatile memory device connected to a first data channel through a first input/output port and to a second data channel through a second input/output port. The volatile memory device activates one of the first and second input/output ports based on an operation mode. The memory module includes a registering clock driver that transmits a first control signal for data exchange through the first input/output port and a second control signal for data exchange through the second input/output port, to the volatile memory device. A memory controller of the memory module generates the second control signal, exchanges data with the volatile memory device through the second data channel, and controls the nonvolatile memory device. The memory controller detects a request from a host or a power status and generates the second control signal based on the detection result.

Abstract: A system can monitor data usage, including an amount of searchable data used and/or a rate at which the searchable data is manipulated, on a storage allocation in a networked environment. The storage allocation can have a quantity/number of partitions, including at least one partition, configured to store the searchable data. The system can detect that the data usage is beyond a specified threshold and then based at least in part on factors such as network traffic, CPU usage, and/or data usage, the system can modify the storage allocation to increase or decrease a size of the partition and/or the quantity of partitions. Network traffic for the storage allocation can be directed away from the portion of the storage allocation being modified. When modifying the storage allocation is complete, the network traffic can be directed to the modified portion of the storage allocation.

Abstract: A memory network includes a first local memory group, a second local memory group, and multiple first channels. The first local memory group includes multiple first memory devices that are not directly connected to each other. The second local memory group includes multiple second memory devices that are not directly connected to each other. The first channels are configured to connect the first memory devices to the second memory devices in a one to one relationship.

Abstract: According to one embodiment, a memory controller controlling write to and read from a 3D NAND flash memory including a plurality of blocks, one block being constituted by a plurality of pages stacked in a depth direction includes a frame generator that generates frame data including an error detecting code or an error correcting code, and a frame divider that divides the frame data to generate a plurality of divided frames including a first divided frame and a second divided frame. The first divided frame and the second divided frame are written into different pages from one another.

Abstract: According to one embodiment, when a first command and first data are received from a host, and in a case where the number of free blocks is less than a first threshold, a controller executes a first processing. The first processing includes reading valid data included in one first block that includes the valid data and invalid data and writing the read valid data and at least a part of write data specified by the write command into the free block.

Abstract: A control device includes a memory device and a processor. The memory device is configured to store therein log information obtained by accumulating logs received from an apparatus. The logs relate to a plurality of processes. The processor is configured to determine on basis of the log information and preset expectation information whether the plurality of processes are normally terminated in a case where the log information includes information indicating that the plurality of processes are normally terminated. The expectation information includes first state information in association with expected state information. The first state information indicates a first state of an object before execution of the plurality of processes. The expected state information indicates an expected state of the object after the execution. The processor is configured to write the log information into a storage device upon determining that the plurality of processes are abnormally terminated.

Abstract: Methods, systems, and computer program products for receiving a memory access request, the memory access request including a virtual memory address; locating a page entry in a page entry structure, the page entry corresponding to the virtual memory address; identifying that a page corresponding to the page entry includes a sub-page, the sub-page included within a subset of a memory space allocated to the page; determining a page frame number corresponding to the sub-page and an offset corresponding to the sub-page; and accessing the offset within the sub-page.

Abstract: An improved interface for managing disparate read, write, and erase sizes and operations in data storage devices is provided. By improving an interface between a storage system driver layer and associated storage devices, performance of data storage is improved, including improving data storage speed and storage media endurance. Storage media management operations are made more efficient and consistent by providing improved types and sequences of commands sent from the driver layer to the device control layer such that data write operations are performed in a sequential manner as write commands are directed to portions of data as opposed to buffering individual portions of data followed by a large wholescale write/erase process for the buffered data.

Abstract: A system and method that provides for the backup and recovery of personalized user data. An exemplary method includes storing user data files in electronic memory of a user device, continuously tracking user actions by one or more user devices to detect interact with at least one external resource; determining whether the tracked user actions have modified one or more of the plurality of user data files; and if the processor determines that the tracked user actions have modified a user data file, storing the modified user data file in a data storage system.

Abstract: A method includes sending a set of destructive modification requests to a set of storage units regarding a set of encoded data slices. The method further includes determining, by each storage unit of a decode threshold number of storage units of the set of storage units, whether to preserve a respective corresponding one of the decode threshold number of encoded data slices prior to executing a corresponding one of the set of destructive modification requests. When determined to preserve the respective corresponding one of the decode threshold number of encoded data slices, determining, by a first storage unit of the decode threshold number of storage units, to flag a first encoded data slice of the decode threshold number of encoded data slices or temporarily store a copy of the first encoded data slice. When determined to flag the first encoded data slice, flagging the first encoded data slice as preserved.

Abstract: Attributing consumed storage capacity among entities storing data in a storage array includes: identifying a data object stored in the storage array and shared by a plurality of entities, where the data object occupies an amount of storage capacity of the storage array; and attributing to each entity a fractional portion of the amount of storage capacity occupied by the data object.

Abstract: Methods, systems, and apparatuses, including computer programs encoded on computer-readable media, for receiving a write request that includes data and a client address at which to store the data. The data is segmented into the one or more storage units. A storage unit identifier for each of the one or more storage units is computed that uniquely identifies content of a storage unit. A mapping between each storage unit identifier to a block server is determined. For each of the one or more storage units, the storage unit and the corresponding storage unit identifier is sent to a block server. The block server stores the storage unit and information on where the storage unit is stored on the block server for the storage unit identifier. Multiple client addresses associated with a storage unit with the same storage unit identifier are mapped to a single storage unit.

Abstract: Embodiments disclosed herein provide systems and method for storing metadata to unused portions of a virtual disk file. In a particular embodiment, a method provides selecting a virtual disk file stored on a data storage volume and identifying unused portions of the virtual disk file. The method further provides writing metadata for the virtual disk file in the unused portions of the virtual disk file.

Abstract: Disclosed are systems and methods for adjusting a frequency of memory of a computing device. The method may include counting, in connection with a hardware device, a number of instructions executed and a number of requests to the memory during N milliseconds and calculating a workload ratio that is equal to a ratio of the number of instructions executed to the number of requests to memory. If the workload ratio is less than a ratio-threshold, then the memory vote is determined based upon a frequency of the hardware device. A frequency of the memory is managed based upon an aggregation of the memory-frequency vote and other frequency votes.

Abstract: An apparatus for implementing an enhanced-write-bandwidth caching stream includes a memory that stores machine instructions and a processor that executes the machine instructions. The apparatus apportions a first address space and a second address space that comprises a logical namespace. The apparatus also subjects the first address space to host-write throttling, and exempts the second address space from host-write throttling. The apparatus further requires that valid data in memory cells corresponding to the second address space be invalidated at an interval not to exceed a number of host writes equaling the capacity of the second address space.

Abstract: An apparatus for implementing an enhanced-write-bandwidth caching stream includes a memory that stores machine instructions and a processor that executes the machine instructions. The apparatus receives a first host write stream and a second host write stream that comprises latency-sensitive host write requests. The apparatus also subjects the first host write stream to host-write throttling, and exempts the second host write stream from host-write throttling. The apparatus further requires that the second host write stream invalidate logical blocks in an order corresponding to a previous order in which the respective logical blocks were previously programmed.

Abstract: A method for memory management includes streaming bits to a memory buffer on a memory device using a write data channel that optimizes a speed of writing to the memory devices. The bits are written to non-volatile memory cells in the memory device at a first speed, using a bi-directional bus. Bits are read from the memory device over a read channel to provide reads at a second speed that is slower than the first speed, using the bi-directional bus.

Abstract: Apparatus and method for determining when to save values of read counters are disclosed. Read counters store values that indicate the number of reads in respective blocks of a memory device. The values of the read counters may be stored in volatile memory, and may be periodically stored to non-volatile memory. The frequency at which the values of the read counters are stored to non-volatile memory may be dependent on the read disturb effect. One measure of the read disturb effect may be based on the characteristics of the respective blocks of the memory device, such as whether the respective block is open/closed, has on-chip copy, and whether the read is to a boundary wordline.

Abstract: Operations of a variety of components of a storage system stack are redefined to make the system more efficient when the underlying media has a “multi-log” type interface such as the case with NAND flash SSD memory or shingled magnetic recording media. The responsibilities of components of the storage system stack are modified such that each responsibility is performed at the most efficient component (level of abstraction) of the storage stack.

Abstract: A memory system includes a memory device including a memory cell array having a first region of multiple first memory cells and a second region of multiple second memory cells, first word lines each connected to a gate of one of the first memory cells, and second word lines each connected to a gate of one of the second memory cells, and a controller configured to control an operation of the memory device. The memory device selects one word line when reading from or writing to the first memory cells and selects more than one word line when reading from or writing to the second memory cells.

Abstract: A memory system includes a semiconductor storage device that includes a plurality of blocks, and a controller configured to designate a block of the semiconductor storage device as a partial bad block if, after performing a write operation on the block, status information read from the semiconductor storage device indicates that the write operation failed, and read data that is returned when a read operation is performed on data written pursuant to the write operation has errors that are correctable. The controller is configured to manage a partial bad block differently from a bad block.

Abstract: The present disclosure relates to examples of controlling recycling of blocks of memory. In one example implementation according to aspects of the present disclosure, a method comprises allocating at least one block of memory selected from a subset of blocks to be written in accordance with an equalizing technique to equalize a variation between blocks of memory based on at least one factor. The method further comprises resupplying the subset of blocks.

Abstract: A system that collects statistics and auditing information may receive a first request from an analytics application to access a first set of data. An application program interface (API) of the system may access the first set of data within an in-memory buffer of the system. The first set of data may be retained within the in-memory buffer as defined by a policy. The policy may include retaining the first set of data within the in-memory buffer even after the first set of data is written to non-volatile storage.

Abstract: According to an embodiment, a memory system includes: a non-volatile memory; an encoding unit that generates a code word in which zero and one occur at different occurrence rates by encoding data; and a control unit that writes k third data items and fourth data items into the non-volatile memory. The k is an integer larger than or equal to zero and smaller than or equal to n. The n is an integer larger than or equal to two. The k third data items are obtained by encoding k second data items with the encoding unit among first data items including n second data items and having a first data length. The fourth data items are obtained by removing data corresponding to the k third data items from the first data items. The third data items are generated by encoding the second data items with encoders, respectively.

Abstract: A method of operating a data storage device performing garbage collection in response to locality information for pages of a data block. The method includes acquiring mapping table information for the plurality of pages, and determining validity of each one of the plurality of pages while scanning mapping tables indicated by mapping table information associated with the plurality of pages.

Abstract: A memory system has a first memory which comprises a nonvolatile memory data region, and a second memory which stores data before storing in a third memory, the data not being written back on the third memory in a lower-level with access priority lower than access priority of the first memory, among data inside the nonvolatile memory data region, wherein the second memory has a bit error rate lower than a bit error rate of the first memory.

Abstract: Embodiments of the present disclosure provide a method and apparatus of maintaining data consistency by receiving, when a first storage processor is in a Ready state, a request for configuration information of a storage object from a second storage processor; in response to receiving the request, setting the first storage processor to an Updating-Peer state, and sending the configuration information to the second storage processor to maintain consistency of the configuration information in the first and second storage processors; and in response to the configuration information being sent, setting the first storage processor back to the Ready state.

Abstract: The present disclosure provides a data storage system including a data memory device and controller having interface error detection and handling logic. In one example, a solid-state data memory device is provided and includes a semiconductor package. A memory array is provided in the semiconductor package and an interface is provided that is communicatively couplable to a device bus for receiving data to be stored to the memory array. An error detection component is provided in the semiconductor package and is associated with the interface of the solid-state data memory device. The error detection component is configured to detect errors occurring on data received at the interface prior to the data being stored to the memory array.

Abstract: According to one embodiment, a controller executes first refreshing in a case where a first value of a first block is larger than a first threshold and less than a second threshold. The first refreshing includes reprogramming a plurality of second memory cells among a plurality of first memory cells included in the first block.

Abstract: A method of data progression in a data storage system having at least two tiers of storage space. A first tier may include storage space in a SLC SSD and a second tier may include storage space in a MLC SSD. The method may include setting a predetermined free space threshold for the first tier of storage space, monitoring free space in the first tier of storage space, and when the amount of available free space in the first tier of storage space decreases to the predetermined free space threshold, generating an on-demand snapshot of at least a portion of the data of the first tier of storage space by designating that data as read-only. The on-demand snapshot may then be transferred to the second tier of storage space, thereby freeing the corresponding portion of data of the first tier of storage space for new writes.

Abstract: Techniques are described for managing access of executing programs to non-local block data storage. In some situations, a block data storage service uses multiple server storage systems to reliably store network-accessible block data storage volumes that may be used by programs executing on other physical computing systems. A group of multiple server block data storage systems that store block data volumes may in some situations be co-located at a data center, and programs that use volumes stored there may execute on other physical computing systems at that data center. If a program using a volume becomes unavailable, another program (e.g., another copy of the same program) may in some situations obtain access to and continue to use the same volume, such as in an automatic manner in some such situations.

Abstract: Embodiments of the present disclosure disclose a server management method and a management device. The method comprises determining whether a USB device is connected to the server, the USB device including a permission of a respective user to the server. The method further comprises: in response to determining that the USB device is connected to the server, transmitting the permission to the server to enable the server to be operated based on the permission.

Abstract: A solid state memory unit and method for protecting a solid state memory having a microprocessor are disclosed. The method may include receiving user-input requests for access to blocks of the solid state memory, the blocks of the solid state memory storing ordered virtual files. The user-input requests may have a respective sequence of virtual file position values. The method may include comparing the sequence of virtual file position values with a predetermined sequence of virtual file position values to verify the user-input requests, and when the sequence of virtual file position values equals the predetermined sequence of virtual file position values, responding to, via the microprocessor, requests for access to the blocks of the solid state memory to decrypt and transfer requested files stored. The predetermined sequence may correspond to a predetermined sequence of requests for access to files that can be selected by the user.

Abstract: The present disclosure relates to systems and methods of an optimized data layout in an erasure coded storage system. The system may be realized as a deterministic layout of storage devices in an erasure coded storage system. The system implements a method for writing pieces of a data object across storage devices of a specified write set included an erasure coded storage subsystem. The system further implements a method for reading a subset of pieces of a data object from an active read subset of storage devices in a read set included in the erasure coded storage subsystem and restoring the data object from the subset of pieces. The system may further include operating an inactive read subset of storage devices in a read set in a low power mode.

Abstract: A solid state memory system includes: an interface circuit; a device processor, coupled to the interface circuit, configured to receive a dynamic power limit command through the interface circuit and update a metadata log based on the dynamic power limit command; a non-volatile memory array coupled to the interface circuit; and a power manager unit, coupled between the device processor and the non-volatile memory array, configured to alter an operating configuration of the non-volatile memory array to meet the requirement of the dynamic power limit command.

Abstract: Embodiments are disclosed for adaptive power reduction for a solid-state storage device to dynamically control power consumption. Aspects of the embodiments include receiving a power limit command from a host; receiving power consumption feedback; using the power limit command and the power consumption feedback to calculate a new degree of parallelism; using the new degree of parallelism to control one or more of: i) processor parallelism, including activation of different numbers of processors, ii) memory parallelism, including memory pool length; and iii) nonvolatile memory parallelism, including activation of different numbers of nonvolatile memory devices.

Abstract: A storage control apparatus configured to control a storage apparatus accessed by an information processing apparatus when the information processing apparatus executes a job, the storage control apparatus includes a memory configured to store plan information that indicates a plan in which the information processing apparatus executes the job and history information that indicates an history of access from the information processing apparatus to the storage apparatus when the information processing apparatus executes the job, and a processor coupled to the memory and configured to perform, based on the plan information and the history information, a prediction of whether the information processing apparatus accesses the storage apparatus in a certain time segment, and control power supply to the storage apparatus based on the prediction.

Abstract: In a memory device, odd bit lines of a flag memory cell array are connected with a short circuit to a dynamic data cache. Even bit lines of the flag memory cell array are disconnected from the dynamic data cache. When an even page of a main memory cell array is read, the odd flag memory cells, comprising flag data, are read at the same time so that it can be determined whether the odd page of the main memory cell array has been programmed. If the flag data indicates that the odd page has not been programmed, threshold voltage windows can be adjusted to determine the states of the sensed even memory cell page.

Abstract: According to an embodiment, a memory system includes a nonvolatile memory, an interface, and a controller. The nonvolatile memory includes a plurality of unit areas. The unit area is a unit of erase processing of data. The interface receives a plurality of write data each to which a stream identifier is given. The controller circuit writes, to a first unit area, write data which is received by the interface and to which one stream identifier is given. The first unit area is one of the plurality of unit areas and is a unit area to which the one stream identifier is associated. The allocator sets another unit area to a new first unit area after the first unit area becomes full. The allocator associates another stream identifier different from the one stream identifier with the new first unit area.

Abstract: A second virtual volume having a plurality of second virtual areas is a clone of a first virtual volume having a plurality of first virtual areas. A first real area is allocated from a pool of real areas and based on storage devices to the first virtual volume. A storage controller allocates a second real area to the second virtual area before a write occurs in the second virtual area corresponding to the first virtual area to which the first real area is allocated. A physical area is allocated to a logical area corresponding to the first real area in each storage device, and data based on user data stored in the first real area is stored in the physical area. Each storage device allocates the physical area allocated to the logical area corresponding to the first real area to a logical area corresponding to the second real area.

Abstract: Examples of a multi-level memory with direct access are described. Examples include designating an amount of a non-volatile random access memory (NVRAM) for use as memory for a computer system. Examples also include designating a second amount of the NVRAM to for use as storage for the computing device. Examples also include re-designating at least a first portion of the first amount of NVRAM from use as memory to use as storage.

Abstract: Techniques for effectuating a virtual NUMA architecture for virtual machines are disclosed herein. In an embodiment, a system determines the physical topology of a datacenter. When instantiating a virtual machine, the system determines a number of NUMA nodes for that VM based on the physical topology. The system then directs a second system to instantiate the virtual machine with the determined number of NUMA nodes.

Abstract: A method for managing main memory including DRAM and NVRAM in a computer depending on the operation state of the computer is provided. The method includes: (a) upon start of the computer, loading a program and the like into the DRAM, and loading predetermined read-only data and the like into the NVRAM; (b) in a state transition from a normal operation to a suspend state, moving data in the DRAM to the NVRAM; (c) in a state transition from the suspend state to the normal operation, reading data from the NVRAM for program execution; (d) in the case where a data write to the NVRAM occurs, stopping the data write, and moving data in a data area of the NVRAM subjected to the data write, to the DRAM; and (e) performing the data write to the DRAM to which the data has been moved.

Abstract: Encoded information, including first data and second data that was derived using the first data, is received. The second data can be used to determine the accuracy of the first data. The first data is stored in a first memory location that has a first address, and the second data is stored in a second memory location that has a second address. First information that is useful for determining the first address is stored, and second information that is useful for determining the second address is stored. Accessing the first data using the first information also causes the second data to be accessed using the second information.

Abstract: A storage system according to the present invention has a plurality of flash packages equipped with a deduplication function. When a storage controller transmits a write data and a feature value of write data to a flash package, the flash package compares contents of the write data with data having a same feature value as the feature value of the write data. As a result of the comparison, if there is no corresponding data, the write data is stored in the flash memory, but if there is a corresponding data, the new data will not be stored. Thus, a greater number of data can be stored in the flash memory while preventing deterioration of performance.